[llvm] [Exegesis][RISCV] Add RISCV support for llvm-exegesis (PR #89047)

[via llvm-commits]

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@@ -0,0 +1,59 @@
+# RUN: llvm-exegesis -mode=latency -mtriple=riscv64-unknown-linux-gnu --mcpu=generic --benchmark-phase=assemble-measured-code -opcode-name=AMOAND_D -mattr="+a" | FileCheck --check-prefix=AMOAND_D %s
+
+AMOAND_D:      ---
+AMOAND_D-NEXT: mode: latency
+AMOAND_D-NEXT: key:
+AMOAND_D-NEXT:   instructions:
+AMOAND_D-NEXT:     - 'AMOAND_D [[RE01:X[0-9]+]] X10 [[RE01:X[0-9]+]]'
+AMOAND_D-NEXT: config: ''
+AMOAND_D-NEXT: register_initial_values:
+AMOAND_D-NEXT: - '[[RE01:X[0-9]+]]=0x0'
+AMOAND_D-LAST: ...
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AnastasiyaChernikova wrote:

Thank you for the catch. I fixed this in tests under RISCV. But we have the same problem in some tests in other platforms. Created separate pull request for other platforms https://github.com/llvm/llvm-project/pull/93222 

https://github.com/llvm/llvm-project/pull/89047