[llvm] [DAG] Add legalization handling for AVGCEIL/AVGFLOOR nodes (PR #92096)
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Wed May 22 09:48:02 PDT 2024
================
@@ -4560,8 +4560,15 @@ unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, const APInt &DemandedElts,
Tmp = ComputeNumSignBits(Op.getOperand(0), DemandedElts, Depth + 1);
// SRA X, C -> adds C sign bits.
if (const APInt *ShAmt =
- getValidMinimumShiftAmountConstant(Op, DemandedElts))
+ getValidMinimumShiftAmountConstant(Op, DemandedElts)) {
Tmp = std::min<uint64_t>(Tmp + ShAmt->getZExtValue(), VTBits);
+ } else {
+ KnownBits KnownAmt =
+ computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
+ if (KnownAmt.isConstant() && KnownAmt.getConstant().ult(VTBits))
+ Tmp = std::min<uint64_t>(Tmp + KnownAmt.getConstant().getZExtValue(),
+ VTBits);
+ }
----------------
RKSimon wrote:
Updated to getMaxValue() (for upper bound) + getMinValue() (for min sign extension) - the shift amount isn't just a `bitcast(v4i32 constant)` hidden constant, so we do need the abilities of computeKnownBits.
We could update getValidMinimumShiftAmountConstant (et. al) to return `std::optional<APInt>` to allow it to fallback to computeKnownBits, although that would mean the function would return a value that might not actual exist in the shift amount, I don't think we've used that property but it would still be a change.
https://github.com/llvm/llvm-project/pull/92096
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