[llvm] [PATCH] [Xtensa] Implement FrameLowering methods and stack operation lowering. (PR #92960)

via llvm-commits llvm-commits at lists.llvm.org
Tue May 21 13:21:22 PDT 2024


github-actions[bot] wrote:

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git-clang-format --diff 253c28fa829cee0104c2fc59ed1a958980b5138c 316fb855b143c799c1cbf77d15011010309716cb -- llvm/lib/Target/Xtensa/XtensaFrameLowering.cpp llvm/lib/Target/Xtensa/XtensaFrameLowering.h llvm/lib/Target/Xtensa/XtensaISelLowering.cpp llvm/lib/Target/Xtensa/XtensaISelLowering.h
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View the diff from clang-format here.
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diff --git a/llvm/lib/Target/Xtensa/XtensaISelLowering.cpp b/llvm/lib/Target/Xtensa/XtensaISelLowering.cpp
index 05eb65bb62..8aebf60e46 100644
--- a/llvm/lib/Target/Xtensa/XtensaISelLowering.cpp
+++ b/llvm/lib/Target/Xtensa/XtensaISelLowering.cpp
@@ -562,8 +562,8 @@ SDValue XtensaTargetLowering::LowerDYNAMIC_STACKALLOC(SDValue Op,
   // Round up Size to 32
   SDValue SizeTmp =
       DAG.getNode(ISD::ADD, DL, VT, Size, DAG.getConstant(31, DL, MVT::i32));
-  SDValue SizeRoundUp =
-      DAG.getNode(ISD::AND, DL, VT, SizeTmp, DAG.getConstant(~31, DL, MVT::i32));
+  SDValue SizeRoundUp = DAG.getNode(ISD::AND, DL, VT, SizeTmp,
+                                    DAG.getConstant(~31, DL, MVT::i32));
 
   unsigned SPReg = Xtensa::SP;
   SDValue SP = DAG.getCopyFromReg(Chain, DL, SPReg, VT);

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https://github.com/llvm/llvm-project/pull/92960


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