[llvm] [Exegesis][RISCV] Add RISCV support for llvm-exegesis (PR #89047)

[via llvm-commits]

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@@ -1009,6 +1011,10 @@ static std::vector<MCInst> loadImmediateSegmentRegister(unsigned Reg,
 #endif // defined(__x86_64__) && defined(__linux__)
 }
 
+unsigned ExegesisX86Target::findRegisterByName(const StringRef RegName) const {
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AnastasiyaChernikova wrote:

Addressed

https://github.com/llvm/llvm-project/pull/89047