[llvm] af16d49 - Revert "[SystemZ] LivePhysRegs to LiveRegUnits (NFC) (#85162)"

Nikita Popov via llvm-commits llvm-commits at lists.llvm.org
Sun May 26 23:32:53 PDT 2024


Author: Nikita Popov
Date: 2024-05-27T08:29:24+02:00
New Revision: af16d49bb25ad446ee4b243fbd8ca2bc9ac3f8b9

URL: https://github.com/llvm/llvm-project/commit/af16d49bb25ad446ee4b243fbd8ca2bc9ac3f8b9
DIFF: https://github.com/llvm/llvm-project/commit/af16d49bb25ad446ee4b243fbd8ca2bc9ac3f8b9.diff

LOG: Revert "[SystemZ] LivePhysRegs to LiveRegUnits (NFC) (#85162)"

This reverts commit 558c51968f8f8252128f38a2b860c9ae0a86edba.

PR merged without review.

Added: 
    

Modified: 
    llvm/lib/Target/SystemZ/SystemZPostRewrite.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/SystemZ/SystemZPostRewrite.cpp b/llvm/lib/Target/SystemZ/SystemZPostRewrite.cpp
index 2536727c70d56..e15f9027cc209 100644
--- a/llvm/lib/Target/SystemZ/SystemZPostRewrite.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZPostRewrite.cpp
@@ -17,7 +17,7 @@
 #include "SystemZInstrInfo.h"
 #include "SystemZSubtarget.h"
 #include "llvm/ADT/Statistic.h"
-#include "llvm/CodeGen/LiveRegUnits.h"
+#include "llvm/CodeGen/LivePhysRegs.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 using namespace llvm;
@@ -161,8 +161,7 @@ bool SystemZPostRewrite::expandCondMove(MachineBasicBlock &MBB,
   assert(DestReg == MI.getOperand(1).getReg() &&
          "Expected destination and first source operand to be the same.");
 
-  const TargetRegisterInfo &TRI = TII->getRegisterInfo();
-  LiveRegUnits LiveRegs(TRI);
+  LivePhysRegs LiveRegs(TII->getRegisterInfo());
   LiveRegs.addLiveOuts(MBB);
   for (auto I = std::prev(MBB.end()); I != MBBI; --I)
     LiveRegs.stepBackward(*I);
@@ -172,18 +171,15 @@ bool SystemZPostRewrite::expandCondMove(MachineBasicBlock &MBB,
   MF.insert(std::next(MachineFunction::iterator(MBB)), RestMBB);
   RestMBB->splice(RestMBB->begin(), &MBB, MI, MBB.end());
   RestMBB->transferSuccessors(&MBB);
-  const BitVector &BV = TRI.getAllocatableSet(MF);
-  for (Register Reg : BV.set_bits())
-    if (!LiveRegs.available(Reg))
-      RestMBB->addLiveIn(Reg);
+  for (MCPhysReg R : LiveRegs)
+    RestMBB->addLiveIn(R);
 
   // Create a new block MoveMBB to hold the move instruction.
   MachineBasicBlock *MoveMBB = MF.CreateMachineBasicBlock(BB);
   MF.insert(std::next(MachineFunction::iterator(MBB)), MoveMBB);
   MoveMBB->addLiveIn(SrcReg);
-  for (Register Reg : BV.set_bits())
-    if (!LiveRegs.available(Reg))
-      MoveMBB->addLiveIn(Reg);
+  for (MCPhysReg R : LiveRegs)
+    MoveMBB->addLiveIn(R);
 
   // At the end of MBB, create a conditional branch to RestMBB if the
   // condition is false, otherwise fall through to MoveMBB.


        


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