[llvm] [AMDGPU] Remove #if 0 code for buffer stores in SIInsertWaitcnts (PR #92903)
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Tue May 21 05:13:58 PDT 2024
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-amdgpu
Author: Jay Foad (jayfoad)
<details>
<summary>Changes</summary>
---
Full diff: https://github.com/llvm/llvm-project/pull/92903.diff
1 Files Affected:
- (modified) llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp (-12)
``````````diff
diff --git a/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp b/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
index 5577ce9eb1282..89076c110e46e 100644
--- a/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
@@ -900,18 +900,6 @@ void WaitcntBrackets::updateByEvent(const SIInstrInfo *TII,
}
}
}
-#if 0 // TODO: check if this is handled by MUBUF code above.
- } else if (Inst.getOpcode() == AMDGPU::BUFFER_STORE_DWORD ||
- Inst.getOpcode() == AMDGPU::BUFFER_STORE_DWORDX2 ||
- Inst.getOpcode() == AMDGPU::BUFFER_STORE_DWORDX4) {
- MachineOperand *MO = TII->getNamedOperand(Inst, AMDGPU::OpName::data);
- unsigned OpNo;//TODO: find the OpNo for this operand;
- RegInterval Interval = getRegInterval(&Inst, MRI, TRI, OpNo);
- for (int RegNo = Interval.first; RegNo < Interval.second;
- ++RegNo) {
- setRegScore(RegNo + NUM_ALL_VGPRS, t, CurrScore);
- }
-#endif
} else /* LGKM_CNT || EXP_CNT || VS_CNT || NUM_INST_CNTS */ {
// Match the score to the destination registers.
for (unsigned I = 0, E = Inst.getNumOperands(); I != E; ++I) {
``````````
</details>
https://github.com/llvm/llvm-project/pull/92903
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