[llvm] [RISCV] Introduce the RISCVLoopIdiomRecognizePass (PR #92441)

Philip Reames via llvm-commits llvm-commits at lists.llvm.org
Mon May 20 08:10:29 PDT 2024


preames wrote:

Glancing at this change and the corresponding AArch64 pass, I find myself questioning the high level strategy a bit.  Unless I'm missing something major, there doesn't really look to be much that is AArch64 specific to the AArch64 version of this pass.  

As a starting point, have you considered simply generalizing the aarch64 pass into a shared pass which can run on both targets?  This would get you code generation via masked.loads for this case - but not the VP & VL predicated form.

Once this was done, you could parameterize the code generation (only, not the matching) on whether the target preferred VL style predication or not.  

https://github.com/llvm/llvm-project/pull/92441


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