[llvm] [EarlyIfConversion] Fix the logic to determine predictable branch. (PR #92405)

[Mikhail Gudim via llvm-commits]

https://github.com/mgudim updated https://github.com/llvm/llvm-project/pull/92405

>From 2641ed09f4a48c141865ca4186a951ea03b73827 Mon Sep 17 00:00:00 2001
From: Mikhail Gudim <mgudim at gmail.com>
Date: Thu, 16 May 2024 10:31:38 -0400
Subject: [PATCH 1/2] [EarlyIfConversion] Fix the logic to determine
 predictable branch.

Branch is considered predictable when ALL of the operands used to evaluate
condition are loop-invariant.
---
 llvm/lib/CodeGen/EarlyIfConversion.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/llvm/lib/CodeGen/EarlyIfConversion.cpp b/llvm/lib/CodeGen/EarlyIfConversion.cpp
index 2a7bee1618deb..2f8729fcbb945 100644
--- a/llvm/lib/CodeGen/EarlyIfConversion.cpp
+++ b/llvm/lib/CodeGen/EarlyIfConversion.cpp
@@ -879,7 +879,7 @@ bool EarlyIfConverter::shouldConvertIf() {
   // from a loop-invariant address predictable; we were unable to prove that it
   // doesn't alias any of the memory-writes in the loop, but it is likely to
   // read to same value multiple times.
-  if (CurrentLoop && any_of(IfConv.Cond, [&](MachineOperand &MO) {
+  if (CurrentLoop && all_of(IfConv.Cond, [&](MachineOperand &MO) {
         if (!MO.isReg() || !MO.isUse())
           return false;
         Register Reg = MO.getReg();

>From 75e50a628796bc3d960c97fc1024b224f4fc5c0e Mon Sep 17 00:00:00 2001
From: Mikhail Gudim <mgudim at gmail.com>
Date: Tue, 21 May 2024 19:08:42 -0400
Subject: [PATCH 2/2] updated tests

---
 llvm/lib/CodeGen/EarlyIfConversion.cpp | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/llvm/lib/CodeGen/EarlyIfConversion.cpp b/llvm/lib/CodeGen/EarlyIfConversion.cpp
index 2f8729fcbb945..7409124fb4549 100644
--- a/llvm/lib/CodeGen/EarlyIfConversion.cpp
+++ b/llvm/lib/CodeGen/EarlyIfConversion.cpp
@@ -881,10 +881,10 @@ bool EarlyIfConverter::shouldConvertIf() {
   // read to same value multiple times.
   if (CurrentLoop && all_of(IfConv.Cond, [&](MachineOperand &MO) {
         if (!MO.isReg() || !MO.isUse())
-          return false;
+          return true;
         Register Reg = MO.getReg();
         if (Register::isPhysicalRegister(Reg))
-          return false;
+          return true;
 
         MachineInstr *Def = MRI->getVRegDef(Reg);
         return CurrentLoop->isLoopInvariant(*Def) ||
@@ -892,10 +892,10 @@ bool EarlyIfConverter::shouldConvertIf() {
                  if (Op.isImm())
                    return true;
                  if (!MO.isReg() || !MO.isUse())
-                   return false;
+                   return true;
                  Register Reg = MO.getReg();
                  if (Register::isPhysicalRegister(Reg))
-                   return false;
+                   return true;
 
                  MachineInstr *Def = MRI->getVRegDef(Reg);
                  return CurrentLoop->isLoopInvariant(*Def);