[llvm] [RISCV] Do not check UsePostRAScheduler in enablePostRAScheduler (PR #92781)

[Michael Maitland via llvm-commits]

michaelmaitland wrote:

> > No other targets use this value to control whether PostMachineScheduler is enabled. They only use it to check whether the legacy PostRASchedulerList scheduelr is enabled.
> 
> No targets use these default implementations which would use the field from the scheduler for the PostRA MachineScheduler?
> 
> ```
> bool TargetSubtargetInfo::enablePostRAScheduler() const {                        
>   return getSchedModel().PostRAScheduler;                                        
> }                                                                                
>                                                                                  
> bool TargetSubtargetInfo::enablePostRAMachineScheduler() const {                 
>   return enableMachineScheduler() && enablePostRAScheduler();                    
> } 
> ```

I didn't see this. I rephrase to targets that override `enablePostRAScheduler` or `enablePostRAMachineScheduler` do not use PostRAScheduler.

https://github.com/llvm/llvm-project/pull/92781