[llvm] AArch64/ARM/PPC/X86: Add some atomic tests (PR #92933)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Thu May 23 00:51:40 PDT 2024
================
@@ -787,3 +787,100 @@ define double @load_double_seq_cst(ptr %fptr) {
%v = load atomic double, ptr %fptr seq_cst, align 8
ret double %v
}
+
+define void @store_bfloat(ptr %fptr, bfloat %v) {
+; X86-LABEL: store_bfloat:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movw %cx, (%eax)
+; X86-NEXT: retl
+;
+; X64-SSE-LABEL: store_bfloat:
+; X64-SSE: # %bb.0:
+; X64-SSE-NEXT: pextrw $0, %xmm0, %eax
+; X64-SSE-NEXT: movw %ax, (%rdi)
+; X64-SSE-NEXT: retq
+;
+; X64-AVX-LABEL: store_bfloat:
+; X64-AVX: # %bb.0:
+; X64-AVX-NEXT: vpextrw $0, %xmm0, %eax
+; X64-AVX-NEXT: movw %ax, (%rdi)
+; X64-AVX-NEXT: retq
+ store atomic bfloat %v, ptr %fptr unordered, align 2
+ ret void
+}
+
+; Work around issue #92899 by casting to float
----------------
arsenm wrote:
#93146 fixes this. Whether or not compiler-rt is wired up correctly to use the same IR type is a separate problem, but the IR has a clear handleable meaning
https://github.com/llvm/llvm-project/pull/92933
More information about the llvm-commits
mailing list