[llvm] [RISCV][GISel] Support G_{U|S}{ADD|SUB}SAT (PR #92935)

[Yingwei Zheng via llvm-commits]

dtcxzyw wrote:

> Legalize or legalize and select? There are no assembler files.

See the check line `CHECK,RV32ZBB`. TBH, I think the MIR tests are enough. Should I also add some codegen tests?


https://github.com/llvm/llvm-project/pull/92935