[llvm] [PowerPC] handle toc-data in load selection of fast-isel (PR #91916)

[Zaara Syeda via llvm-commits]

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@@ -11,8 +11,7 @@ define signext i32 @foo() #1 {
 ; SMALL-LABEL: foo:
 ; SMALL:       # %bb.0: # %entry
 ; SMALL-NEXT:    la 3, a[TD](2)
-; SMALL-NEXT:    lwz 3, 0(3)
-; SMALL-NEXT:    extsw 3, 3
+; SMALL-NEXT:    lwa 3, 0(3)
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syzaara wrote:

The large code model support for 64-bit was merged: https://github.com/llvm/llvm-project/pull/90619/files
I think we need to rebase this and update the test here since the code gen should be like:
        addis 3, a[TD]@u(2)
        la 3, a[TD]@l(3)
        lwa 3, 0(3)

https://github.com/llvm/llvm-project/pull/91916