[llvm] [AMDGPU] Allocate i1 argument to SGPRs (PR #72461)

[Matt Arsenault via llvm-commits]

================
@@ -121,6 +127,15 @@ struct AMDGPUIncomingArgHandler : public CallLowering::IncomingValueHandler {
                         const CCValAssign &VA) override {
     markPhysRegUsed(PhysReg);
 
+    if (VA.getLocVT() == MVT::i1) {
+      MIRBuilder.buildCopy(ValVReg, PhysReg);
+      MRI.setRegClass(ValVReg, MIRBuilder.getMF()
+                                   .getSubtarget<GCNSubtarget>()
+                                   .getRegisterInfo()
+                                   ->getBoolRC());
----------------
arsenm wrote:

You shouldn't need to introduce a register class here, RegBankSelect should set it later 

https://github.com/llvm/llvm-project/pull/72461