[clang] [llvm] [X86] Support EGPR for inline assembly. (PR #92338)
Nick Desaulniers via llvm-commits
llvm-commits at lists.llvm.org
Wed May 22 09:53:13 PDT 2024
================
@@ -58016,15 +58035,27 @@ X86TargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
break;
case 'r': // GENERAL_REGS
case 'l': // INDEX_REGS
+ if (Subtarget.useInlineAsmGPR32()) {
+ if (VT == MVT::i8 || VT == MVT::i1)
+ return std::make_pair(0U, &X86::GR8_NOREX2RegClass);
+ if (VT == MVT::i16)
+ return std::make_pair(0U, &X86::GR16_NOREX2RegClass);
+ if (VT == MVT::i32 || VT == MVT::f32 ||
+ (!VT.isVector() && !Subtarget.is64Bit()))
+ return std::make_pair(0U, &X86::GR32_NOREX2RegClass);
+ if (VT != MVT::f80 && !VT.isVector())
+ return std::make_pair(0U, &X86::GR64_NOREX2RegClass);
+ break;
+ }
if (VT == MVT::i8 || VT == MVT::i1)
- return std::make_pair(0U, &X86::GR8_NOREX2RegClass);
+ return std::make_pair(0U, &X86::GR8RegClass);
if (VT == MVT::i16)
- return std::make_pair(0U, &X86::GR16_NOREX2RegClass);
+ return std::make_pair(0U, &X86::GR16RegClass);
if (VT == MVT::i32 || VT == MVT::f32 ||
(!VT.isVector() && !Subtarget.is64Bit()))
- return std::make_pair(0U, &X86::GR32_NOREX2RegClass);
+ return std::make_pair(0U, &X86::GR32RegClass);
if (VT != MVT::f80 && !VT.isVector())
- return std::make_pair(0U, &X86::GR64_NOREX2RegClass);
+ return std::make_pair(0U, &X86::GR64RegClass);
----------------
nickdesaulniers wrote:
Is it more concise to use ternary expressions here rather than duplicate so much logic?
```c++
if (VT == MVT::i8 || VT == MVT::i1)
return std::make_pair(0U, Subtarget.useInlineAsmGPR32() ? &X86::GR8_NOREX2RegClass : &X86::GR8RegClass);
if (VT == MVT::i16)
return std::make_pair(0U, Subtarget.useInlineAsmGPR32() ? &X86::GR16_NOREX2RegClass : &X86::GR16RegClass);
if (VT == MVT::i32 || VT == MVT::f32 ||
(!VT.isVector() && !Subtarget.is64Bit()))
return std::make_pair(0U, Subtarget.useInlineAsmGPR32() ? &X86::GR32_NOREX2RegClass : &X86::GR32RegClass);
if (VT != MVT::f80 && !VT.isVector())
return std::make_pair(0U, Subtarget.useInlineAsmGPR32() ? &X86::GR64_NOREX2RegClass : &X86::GR64RegClass);
```
https://github.com/llvm/llvm-project/pull/92338
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