[llvm] [AMDGPU] NFC: Add BBLiveOutMap & LiveOut Cache (PR #93089)
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Wed May 22 12:00:42 PDT 2024
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-amdgpu
Author: Jeffrey Byrnes (jrbyrnes)
<details>
<summary>Changes</summary>
This is part of a series of PRs which enable using the GCNRPTrackers during scheduling. I've split them up to (hopefully) make reviewing easier. For context see https://github.com/llvm/llvm-project/pull/88797 .
This PR uses getLiveRegMap to calculate BBLiveOutMap, which ultimately provides the per-region liveouts to the RPTrackers.
---
Full diff: https://github.com/llvm/llvm-project/pull/93089.diff
2 Files Affected:
- (modified) llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp (+55-1)
- (modified) llvm/lib/Target/AMDGPU/GCNSchedStrategy.h (+7)
``````````diff
diff --git a/llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp b/llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
index 94d93390d0916..a4d05f62a7f74 100644
--- a/llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
+++ b/llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
@@ -58,6 +58,11 @@ static cl::opt<bool>
"Wave Limited (amdgpu-limit-wave-threshold)."),
cl::init(false));
+static cl::opt<bool> GCNTrackers(
+ "amdgpu-use-amdgpu-trackers", cl::Hidden,
+ cl::desc("Use the AMDGPU specific RPTrackers during scheduling"),
+ cl::init(false));
+
const unsigned ScheduleMetrics::ScaleFactor = 100;
GCNSchedStrategy::GCNSchedStrategy(const MachineSchedContext *C)
@@ -526,6 +531,19 @@ GCNScheduleDAGMILive::getRealRegPressure(unsigned RegionIdx) const {
return RPTracker.moveMaxPressure();
}
+static MachineInstr *getLastMIForRegion(MachineBasicBlock::iterator RegionBegin,
+ MachineBasicBlock::iterator RegionEnd) {
+ MachineInstr *LastMI;
+ auto *BB = RegionBegin->getParent();
+ if (RegionEnd != BB->end() && !RegionEnd->isDebugInstr())
+ LastMI = &*RegionEnd;
+ else if (RegionEnd == BB->end())
+ LastMI = &*prev_nodbg(RegionEnd, RegionBegin);
+ else
+ LastMI = &*skipDebugInstructionsBackward(RegionEnd, RegionBegin);
+ return LastMI;
+}
+
void GCNScheduleDAGMILive::computeBlockPressure(unsigned RegionIdx,
const MachineBasicBlock *MBB) {
GCNDownwardRPTracker RPTracker(*LIS);
@@ -597,6 +615,16 @@ void GCNScheduleDAGMILive::computeBlockPressure(unsigned RegionIdx,
RPTracker.advanceBeforeNext();
MBBLiveIns[OnlySucc] = RPTracker.moveLiveRegs();
}
+
+ if (GCNTrackers) {
+ assert(LiveOuts.size() == Regions.size());
+ for (unsigned RegionIdx = 0; RegionIdx < Regions.size(); RegionIdx++) {
+ auto RegionBegin = Regions[RegionIdx].first;
+ auto RegionEnd = Regions[RegionIdx].second;
+ MachineInstr *LastMI = getLastMIForRegion(RegionBegin, RegionEnd);
+ LiveOuts[RegionIdx] = BBLiveOutMap.lookup(LastMI);
+ }
+ }
}
DenseMap<MachineInstr *, GCNRPTracker::LiveRegSet>
@@ -616,11 +644,24 @@ GCNScheduleDAGMILive::getBBLiveInMap() const {
return getLiveRegMap(BBStarters, false /*After*/, *LIS);
}
+DenseMap<MachineInstr *, GCNRPTracker::LiveRegSet>
+GCNScheduleDAGMILive::getBBLiveOutMap() const {
+ assert(!Regions.empty());
+ std::vector<MachineInstr *> BBEnders;
+ BBEnders.reserve(Regions.size());
+ auto I = Regions.rbegin(), E = Regions.rend();
+ for (; I != E; I++)
+ BBEnders.push_back(getLastMIForRegion(I->first, I->second));
+
+ return getLiveRegMap(BBEnders, true /*After*/, *LIS);
+}
+
void GCNScheduleDAGMILive::finalizeSchedule() {
// Start actual scheduling here. This function is called by the base
// MachineScheduler after all regions have been recorded by
// GCNScheduleDAGMILive::schedule().
LiveIns.resize(Regions.size());
+ LiveOuts.resize(Regions.size());
Pressure.resize(Regions.size());
RescheduleRegions.resize(Regions.size());
RegionsWithHighRP.resize(Regions.size());
@@ -639,8 +680,12 @@ void GCNScheduleDAGMILive::finalizeSchedule() {
void GCNScheduleDAGMILive::runSchedStages() {
LLVM_DEBUG(dbgs() << "All regions recorded, starting actual scheduling.\n");
- if (!Regions.empty())
+ if (!Regions.empty()) {
BBLiveInMap = getBBLiveInMap();
+ if (GCNTrackers) {
+ BBLiveOutMap = getBBLiveOutMap();
+ }
+ }
GCNSchedStrategy &S = static_cast<GCNSchedStrategy &>(*SchedImpl);
while (S.advanceStage()) {
@@ -1499,6 +1544,15 @@ bool PreRARematStage::sinkTriviallyRematInsts(const GCNSubtarget &ST,
DAG.Regions = NewRegions;
DAG.RescheduleRegions = NewRescheduleRegions;
+ if (GCNTrackers) {
+ DAG.BBLiveOutMap = DAG.getBBLiveOutMap();
+ auto I = DAG.Regions.begin(), E = DAG.Regions.end();
+ for (; I != E; I++) {
+ MachineInstr *LastMI = getLastMIForRegion(I->first, I->second);
+ DAG.LiveOuts.push_back(DAG.BBLiveOutMap.lookup(LastMI));
+ }
+ }
+
SIMachineFunctionInfo &MFI = *MF.getInfo<SIMachineFunctionInfo>();
MFI.increaseOccupancy(MF, ++DAG.MinOccupancy);
diff --git a/llvm/lib/Target/AMDGPU/GCNSchedStrategy.h b/llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
index 2084aae4128ff..243bb7f0c094d 100644
--- a/llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
+++ b/llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
@@ -205,6 +205,9 @@ class GCNScheduleDAGMILive final : public ScheduleDAGMILive {
// Region live-in cache.
SmallVector<GCNRPTracker::LiveRegSet, 32> LiveIns;
+ // Region live-out cache.
+ SmallVector<GCNRPTracker::LiveRegSet, 32> LiveOuts;
+
// Region pressure cache.
SmallVector<GCNRegPressure, 32> Pressure;
@@ -215,6 +218,10 @@ class GCNScheduleDAGMILive final : public ScheduleDAGMILive {
DenseMap<MachineInstr *, GCNRPTracker::LiveRegSet> getBBLiveInMap() const;
+ DenseMap<MachineInstr *, GCNRPTracker::LiveRegSet> BBLiveOutMap;
+
+ DenseMap<MachineInstr *, GCNRPTracker::LiveRegSet> getBBLiveOutMap() const;
+
// Return current region pressure.
GCNRegPressure getRealRegPressure(unsigned RegionIdx) const;
``````````
</details>
https://github.com/llvm/llvm-project/pull/93089
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