[clang] [llvm] [X86] Support EGPR for inline assembly. (PR #92338)

[Shengchen Kan via llvm-commits]

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@@ -58024,15 +58043,22 @@ X86TargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
     case 'r':   // GENERAL_REGS
     case 'l':   // INDEX_REGS
       if (VT == MVT::i8 || VT == MVT::i1)
-        return std::make_pair(0U, &X86::GR8_NOREX2RegClass);
+        return std::make_pair(0U, Subtarget.useInlineAsmGPR32()
+                                      ? &X86::GR8_NOREX2RegClass
+                                      : &X86::GR8RegClass);
       if (VT == MVT::i16)
-        return std::make_pair(0U, &X86::GR16_NOREX2RegClass);
+        return std::make_pair(0U, Subtarget.useInlineAsmGPR32()
+                                      ? &X86::GR16_NOREX2RegClass
+                                      : &X86::GR16RegClass);
       if (VT == MVT::i32 || VT == MVT::f32 ||
           (!VT.isVector() && !Subtarget.is64Bit()))
-        return std::make_pair(0U, &X86::GR32_NOREX2RegClass);
+        return std::make_pair(0U, Subtarget.useInlineAsmGPR32()
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KanRobert wrote:

The order should be reversed.
Subtarget.useInlineAsmGPR32() ? GR32 : GR32_NOREX2

https://github.com/llvm/llvm-project/pull/92338