[llvm] [AMDGPU] Allocate i1 argument to SGPRs (PR #72461)

[Matt Arsenault via llvm-commits]

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@@ -121,6 +127,15 @@ struct AMDGPUIncomingArgHandler : public CallLowering::IncomingValueHandler {
                         const CCValAssign &VA) override {
     markPhysRegUsed(PhysReg);
 
+    if (VA.getLocVT() == MVT::i1) {
+      MIRBuilder.buildCopy(ValVReg, PhysReg);
+      MRI.setRegClass(ValVReg, MIRBuilder.getMF()
+                                   .getSubtarget<GCNSubtarget>()
+                                   .getRegisterInfo()
+                                   ->getBoolRC());
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arsenm wrote:

The correct way to fix this is to fix RegBankSelect's mapping for COPY with s1 from SGPR physregs 


https://github.com/llvm/llvm-project/pull/72461