[llvm] [DAG][X86] expandABD - add branchless abds/abdu expansion for 0/-1 comparison result cases (PR #92780)

via llvm-commits llvm-commits at lists.llvm.org
Mon May 20 09:21:08 PDT 2024


github-actions[bot] wrote:

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git-clang-format --diff 3efaf9caa56393597839b796d34f92459c711605 4aab1727f37d2e1f9630f2f35995795794f70611 -- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp llvm/lib/Target/X86/X86ISelLowering.cpp
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View the diff from clang-format here.
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diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index c1c1ebbb7a..08d6776f88 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -1128,8 +1128,8 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
       setOperationAction(ISD::SETCC,              VT, Custom);
       setOperationAction(ISD::CTPOP,              VT, Custom);
       setOperationAction(ISD::ABS,                VT, Custom);
-      setOperationAction(ISD::ABDS,               VT, Custom);
-      setOperationAction(ISD::ABDU,               VT, Custom);
+      setOperationAction(ISD::ABDS, VT, Custom);
+      setOperationAction(ISD::ABDU, VT, Custom);
 
       // The condition codes aren't legal in SSE/AVX and under AVX512 we use
       // setcc all the way to isel and prefer SETGT in some isel patterns.

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https://github.com/llvm/llvm-project/pull/92780


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