[llvm] [RISCV] Do not check UsePostRAScheduler in enablePostRAScheduler (PR #92781)

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Mon May 20 10:03:12 PDT 2024


topperc wrote:

> No other targets use this value to control whether PostMachineScheduler is enabled. They only use it to check whether the legacy PostRASchedulerList scheduelr is enabled.

No targets use these default implementations which would use the field from the scheduler for the PostRA MachineScheduler?

```
bool TargetSubtargetInfo::enablePostRAScheduler() const {                        
  return getSchedModel().PostRAScheduler;                                        
}                                                                                
                                                                                 
bool TargetSubtargetInfo::enablePostRAMachineScheduler() const {                 
  return enableMachineScheduler() && enablePostRAScheduler();                    
} 
```

https://github.com/llvm/llvm-project/pull/92781


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