[llvm] [AArch64][GISel] Support SVE with 128-bit min-size for G_LOAD and G_STORE (PR #92130)

David Green via llvm-commits llvm-commits at lists.llvm.org
Tue May 21 15:02:31 PDT 2024


================
@@ -329,7 +335,23 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST)
     return ValTy.isPointerVector() && ValTy.getAddressSpace() == 0;
   };
 
-  getActionDefinitionsBuilder(G_LOAD)
+  auto &LoadActions = getActionDefinitionsBuilder(G_LOAD);
+  auto &StoreActions = getActionDefinitionsBuilder(G_STORE);
+
+  if (ST.hasSVE()) {
----------------
davemgreen wrote:

For most backends, there is no sensible way to lower scalable vectors without SVE, so they often just crash in some way. So the hasSVE isn't necessarily as important as it could be if the alternative is to just crash in some other way.

Having said that, I think it would be useful when dealing with optional architecture features to have a way to easily add legalization actions based on a condition. So adding something like `legalForTypesWithMemDesc(hasSVE, {...})`.

https://github.com/llvm/llvm-project/pull/92130


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