[llvm] [RISCV][TTI] Improve SiFive7 reduction cost (PR #90951)

Shih-Po Hung via llvm-commits llvm-commits at lists.llvm.org
Wed May 22 08:33:59 PDT 2024


================
@@ -76,37 +113,63 @@ RISCVTTIImpl::getRISCVInstructionCost(ArrayRef<unsigned> OpCodes, MVT VT,
     case RISCV::VFREDUSUM_VS: {
       unsigned VL = VT.getVectorMinNumElements();
       if (!VT.isFixedLengthVector())
-        VL *= *getVScaleForTuning();
-      Cost += Log2_32_Ceil(VL);
+        VL *= VScale;
+      // For the cases with small VL, we use a lookup table for accurate
+      // cost estimation.
+      unsigned LookUpSiFive7ReduceLatency[] = {0,  20, 27, 32, 34,
+                                               38, 40, 41, 42};
+      if (VL <= 32) {
+        Cost += LookUpSiFive7ReduceLatency[(VL + 3) >> 2];
+        break;
+      }
+      Cost += 6 + 7 * Log2_32_Ceil(VL);
       break;
     }
     case RISCV::VFREDOSUM_VS: {
       unsigned VL = VT.getVectorMinNumElements();
       if (!VT.isFixedLengthVector())
-        VL *= *getVScaleForTuning();
-      Cost += VL;
+        VL *= VScale;
+      Cost += VL * 6;
       break;
     }
     case RISCV::VMV_X_S:
-    case RISCV::VMV_S_X:
     case RISCV::VFMV_F_S:
-    case RISCV::VFMV_S_F:
-    case RISCV::VMOR_MM:
-    case RISCV::VMXOR_MM:
-    case RISCV::VMAND_MM:
-    case RISCV::VMANDN_MM:
-    case RISCV::VMNAND_MM:
     case RISCV::VCPOP_M:
     case RISCV::VFIRST_M:
-      Cost += 1;
+      /* Vector-to-scalar communication */
+      Cost += 8;
       break;
     default:
-      Cost += LMULCost;
+      Cost += getRVVBaseCost(Op, VT, TTI, TLI);
+      break;
     }
   }
   return Cost;
 }
 
+InstructionCost
+RISCVTTIImpl::getRISCVInstructionCost(ArrayRef<unsigned> OpCodes, MVT VT,
+                                      TTI::TargetCostKind CostKind) {
+  // Check if the type is valid for all CostKind
+  if (!VT.isVector())
+    return InstructionCost::getInvalid();
+  size_t NumInstr = OpCodes.size();
+  if (CostKind == TTI::TCK_CodeSize)
+    return NumInstr;
+
+  if (ST->getProcFamily() == RISCVSubtarget::SiFive7)
+    return getSiFiveX280RVVCost(OpCodes, VT, CostKind, this, TLI);
----------------
arcbbb wrote:

My bad! So it appears that (LMulCost / NumUnit) is for independent instruction, and (Latency) is for consuming instruction.

https://github.com/llvm/llvm-project/pull/90951


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