[llvm] 7dc2f66 - Reland "[SimplifyCFG] `switch`: Do Not Transform the Default Case if the Condition is Too Wide (#77831)"
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Fri May 24 19:39:28 PDT 2024
Author: Qiongsi Wu
Date: 2024-05-25T10:38:44+08:00
New Revision: 7dc2f6602212bf0a0433c157b70e4fc0d70bb730
URL: https://github.com/llvm/llvm-project/commit/7dc2f6602212bf0a0433c157b70e4fc0d70bb730
DIFF: https://github.com/llvm/llvm-project/commit/7dc2f6602212bf0a0433c157b70e4fc0d70bb730.diff
LOG: Reland "[SimplifyCFG] `switch`: Do Not Transform the Default Case if the Condition is Too Wide (#77831)"
https://github.com/llvm/llvm-project/pull/76669 taught SimplifyCFG to
handle switches when `default` has only one case. When the `switch`'s
condition is wider than 64 bit, the current implementation can calculate
the wrong default value. This PR skips cases where the condition is too
wide.
(cherry picked from commit 39bb790b906f4921a5d9fc09e856abe53ae7a320)
Added:
Modified:
llvm/lib/Transforms/Utils/SimplifyCFG.cpp
llvm/test/Transforms/SimplifyCFG/switch-dead-default.ll
Removed:
################################################################################
diff --git a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
index 4cbe7159651ae..fe6ec8819ff99 100644
--- a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
+++ b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
@@ -5710,6 +5710,11 @@ static bool eliminateDeadSwitchCases(SwitchInst *SI, DomTreeUpdater *DTU,
// optimization, such as lookup tables.
if (SI->getNumCases() == AllNumCases - 1) {
assert(NumUnknownBits > 1 && "Should be canonicalized to a branch");
+ IntegerType *CondTy = cast<IntegerType>(Cond->getType());
+ if (CondTy->getIntegerBitWidth() > 64 ||
+ !DL.fitsInLegalInteger(CondTy->getIntegerBitWidth()))
+ return false;
+
uint64_t MissingCaseVal = 0;
for (const auto &Case : SI->cases())
MissingCaseVal ^= Case.getCaseValue()->getValue().getLimitedValue();
diff --git a/llvm/test/Transforms/SimplifyCFG/switch-dead-default.ll b/llvm/test/Transforms/SimplifyCFG/switch-dead-default.ll
index e30a535c52323..4a457cc177e85 100644
--- a/llvm/test/Transforms/SimplifyCFG/switch-dead-default.ll
+++ b/llvm/test/Transforms/SimplifyCFG/switch-dead-default.ll
@@ -313,6 +313,39 @@ default:
declare void @llvm.assume(i1)
+define zeroext i1 @test8(i128 %a) {
+; We should not transform conditions wider than 64 bit.
+; CHECK-LABEL: define zeroext i1 @test8(
+; CHECK-SAME: i128 [[A:%.*]]) {
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP0:%.*]] = and i128 [[A]], 3894222643901120721397872246915072
+; CHECK-NEXT: switch i128 [[TMP0]], label [[LOR_RHS:%.*]] [
+; CHECK-NEXT: i128 1298074214633706907132624082305024, label [[LOR_END:%.*]]
+; CHECK-NEXT: i128 2596148429267413814265248164610048, label [[LOR_END]]
+; CHECK-NEXT: i128 3894222643901120721397872246915072, label [[LOR_END]]
+; CHECK-NEXT: ]
+; CHECK: lor.rhs:
+; CHECK-NEXT: br label [[LOR_END]]
+; CHECK: lor.end:
+; CHECK-NEXT: [[TMP1:%.*]] = phi i1 [ true, [[ENTRY:%.*]] ], [ false, [[LOR_RHS]] ], [ true, [[ENTRY]] ], [ true, [[ENTRY]] ]
+; CHECK-NEXT: ret i1 [[TMP1]]
+;
+entry:
+ %0 = and i128 %a, 3894222643901120721397872246915072
+ switch i128 %0, label %lor.rhs [
+ i128 1298074214633706907132624082305024, label %lor.end
+ i128 2596148429267413814265248164610048, label %lor.end
+ i128 3894222643901120721397872246915072, label %lor.end
+ ]
+
+lor.rhs: ; preds = %entry
+ br label %lor.end
+
+lor.end: ; preds = %entry, %entry, %entry, %lor.rhs
+ %1 = phi i1 [ true, %entry ], [ false, %lor.rhs ], [ true, %entry ], [ true, %entry ]
+ ret i1 %1
+}
+
!0 = !{!"branch_weights", i32 8, i32 4, i32 2, i32 1}
;.
; CHECK: [[PROF0]] = !{!"branch_weights", i32 0, i32 4, i32 2, i32 1, i32 8}
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