[llvm] [Exegesis][RISCV] Add RISCV support for llvm-exegesis (PR #89047)

via llvm-commits llvm-commits at lists.llvm.org
Fri May 24 08:35:43 PDT 2024


================
@@ -0,0 +1,66 @@
+//===-- RISCVCounters.cpp ---------------------------------------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#include "RISCVCounters.h"
+
+namespace llvm {
+namespace exegesis {
+
+// This implementation of RISCV target for Exegesis doesn't use libpfm
+// and provides manual implementation of performance counters.
+
+inline uint64_t getRISCVCpuCyclesCount() {
+#ifdef __riscv
+  uint64_t Counter;
+  asm("csrr %0, cycle" : "=r"(Counter)::"memory");
+  return Counter;
+#else
+  return 0;
+#endif
+}
+
+class RISCVCpuCyclesCounter : public pfm::CounterGroup {
+  uint64_t StartValue;
+  uint64_t EndValue;
+  uint64_t MeasurementCycles;
+
+public:
+  explicit RISCVCpuCyclesCounter(pfm::PerfEvent &&Event);
+
+  void start() override { StartValue = getRISCVCpuCyclesCount(); }
+
+  void stop() override { EndValue = getRISCVCpuCyclesCount(); }
+
+  Expected<llvm::SmallVector<int64_t, 4>>
+  readOrError(StringRef FunctionBytes) const override;
+};
+
+RISCVCpuCyclesCounter::RISCVCpuCyclesCounter(pfm::PerfEvent &&Event)
+    : CounterGroup(std::move(Event), {}) {
+  StartValue = getRISCVCpuCyclesCount();
+  EndValue = getRISCVCpuCyclesCount();
+  MeasurementCycles = EndValue - StartValue;
+  if (MeasurementCycles == 0) {
+    report_fatal_error("MeasurementCycles == 0, "
----------------
AnastasiyaChernikova wrote:

Addressed

https://github.com/llvm/llvm-project/pull/89047


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