The Week Of Monday 9 February 2026 Archives by thread
Starting: Mon Feb 9 00:03:17 PST 2026
Ending: Sat Feb 14 08:45:48 PST 2026
Messages: 5234
- [llvm] [Hexagon] Handle trunc to i1 in matchRightShift (PR #174737)
Andreas Jonson via llvm-commits
- [llvm] [ARM] Precommit tests: strictfp rounding vector intrinsics (PR #180479)
Serge Pavlov via llvm-commits
- [llvm] [llvm/CAS] Handle switch default to fix missing return warning (PR #180481)
Jack Huang via llvm-commits
- [llvm] [VPlan] Add `-vplan-print-after=` option (PR #178700)
Luke Lau via llvm-commits
- [llvm] f2d5b39 - [RISCV] Add cost for @llvm.vector.splice.{left,right} (#179219)
via llvm-commits
- [llvm] [RISCV] Add cost for @llvm.vector.splice.{left, right} (PR #179219)
Luke Lau via llvm-commits
- [llvm] [VectorCombine] Optimize vector combine in fold binop of reduction (PR #179416)
via llvm-commits
- [llvm] [llvm-objdump][AVR] Detect AVR architecture from ELF flags for disassembling (PR #180468)
Ben Shi via llvm-commits
- [llvm] [OFFLOAD] Support host plugin on Windows (PR #180401)
Alex Duran via llvm-commits
- [llvm] 6c31bf0 - [PredicateInfo] Fix crash on nonnull assume taking a constant (#180440)
via llvm-commits
- [llvm] [PredicateInfo] Fix crash on nonnull assume taking a constant (PR #180440)
Nikolas Klauser via llvm-commits
- [llvm] [CodeGen][AMDGPU] TwoAddress: Only skip undef COPY at REG_SEQUENCE lowering when there is Live info or no uses for subreg (PR #175598)
Carl Ritson via llvm-commits
- [clang] [llvm] [RISCV][CodeGen] Lower `abds`/`abdu` to `Zvabd` instructions (PR #180141)
Pengcheng Wang via llvm-commits
- [llvm] [LoopReduceMotion] Improve loop by extract reduction instruction (PR #179215)
via llvm-commits
- [llvm] [RISCV] Remove explicitly adding spilled registers as liveins. (PR #180483)
Jim Lin via llvm-commits
- [llvm] [MC][COFF] Associate pseudo probe desc section with its function (PR #177540)
Haohai Wen via llvm-commits
- [llvm] [RISCV] Remove redundant czero in multi-word comparisons (PR #180485)
Craig Topper via llvm-commits
- [llvm] 8554ed7 - AMDGPU: Add syntax for s_wait_event values (#180272)
via llvm-commits
- [llvm] AMDGPU: Add syntax for s_wait_event values (PR #180272)
Matt Arsenault via llvm-commits
- [llvm] [GVN] Support rnflow pattern matching and transform (PR #162259)
Madhur Amilkanthwar via llvm-commits
- [llvm] 531430b - [InstCombine] Relax one-use check for min/max(fpext x, fpext y) to fpext(min/max(x, y)) fold (#180164)
via llvm-commits
- [llvm] [InstCombine] Relax one-use check for min/max(fpext x, fpext y) to fpext(min/max(x, y)) fold (PR #180164)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] Fold min/max(fpext x, C) to fpext(min/max(x, fptrunc C)) (PR #179968)
Nikita Popov via llvm-commits
- [llvm] [X86] Optimized ADC + ADD to ADC (PR #176713)
LLVM Continuous Integration via llvm-commits
- [llvm] 2ead49f - [PhaseOrdering] Regenerate test checks (NFC)
Nikita Popov via llvm-commits
- [llvm] [InstCombine] Drop nonnull assumes if the pointer is already known to be nonnull (PR #180434)
Nikita Popov via llvm-commits
- [llvm] [MC][TableGen] Expand Opcode field of MCInstrDesc (PR #179652)
Jay Foad via llvm-commits
- [llvm] SelectionDAG: Improve expandFMINIMUM_FMAXIMUM (PR #137367)
YunQiang Su via llvm-commits
- [llvm] [SPARC] Add TTI implementation for getPopcntSupport (PR #178843)
Nikita Popov via llvm-commits
- [llvm] [GISel] computeKnownBits - add CTLS handling (PR #178063)
Gergo Stomfai via llvm-commits
- [clang] [llvm] [AMDGPU][GFX12.5] Reimplement monitor load as an atomic operation (PR #177343)
Pierre van Houtryve via llvm-commits
- [llvm] [MIParser] - Add support for MMRAs (PR #180320)
Pierre van Houtryve via llvm-commits
- [llvm] b79ba02 - [AMDGPU][GFX12.5] Reimplement monitor load as an atomic operation (#177343)
via llvm-commits
- [llvm] expandFMINIMUM_FMAXIMUM: Use FMINIMUMNUM and FMAXIMUMNUM if possible (PR #180487)
YunQiang Su via llvm-commits
- [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)
Luke Lau via llvm-commits
- [clang] [llvm] [clang][DebugInfo] Add virtual call-site target information in DWARF. (PR #167666)
Carlos Alberto Enciso via llvm-commits
- [llvm] [AMDGPU] Use V_FMAC_F64 in "if (cond) a -= c" (PR #168710)
Jay Foad via llvm-commits
- [llvm] [Analysis] isTriviallyVectorizable - add Intrinsic::clmul along with vectorisation tests (PR #180014)
Florian Hahn via llvm-commits
- [llvm] AMDGPU: Use promotion to f32 path for log/log10 for f16 by default (PR #180240)
Matt Arsenault via llvm-commits
- [llvm] [GlobalISel] Use named constant for impossible repair cost (PR #180490)
Eliz Habiboullah via llvm-commits
- [llvm] a654a27 - [InstCombine] Fold min/max(fpext x, C) to fpext(min/max(x, fptrunc C)) (#179968)
via llvm-commits
- [clang] [llvm] [AMDGPU] Asynchronous loads from global/buffer to LDS on pre-GFX12 (PR #180466)
Pierre van Houtryve via llvm-commits
- [llvm] [SimplifyLibCalls] Directly convert fmin/fmax to intrinsics (PR #177988)
Nikita Popov via llvm-commits
- [llvm] [BOLT][BTI] Refactor: move applyBTIFixup under MCPlusBuilder (PR #177164)
Gergely Bálint via llvm-commits
- [llvm] [IR] Update docstring for stripAndAccumulateConstantOffset (PR #180365)
Antonio Frighetto via llvm-commits
- [llvm] AMDGPU: Add a test for libcall simplify pow handling (PR #180491)
Matt Arsenault via llvm-commits
- [llvm] [AArch64][GlobalISel] Remove a couple of SUBREG_TO_REG from instruction selection. (PR #180253)
Jay Foad via llvm-commits
- [llvm] [Hexagon] Fix encoding of packets with fixups followed by alignment (PR #179168)
Cullen Rhodes via llvm-commits
- [llvm] 25315f2 - [AMDGPU] Remove `NoNaNsFPMath` uses (#180469)
via llvm-commits
- [llvm] [AMDGPU] Remove `NoNaNsFPMath` uses (PR #180469)
via llvm-commits
- [llvm] 2298b86 - [GISel] computeKnownBits - add CTLS handling (#178063)
via llvm-commits
- [clang] [llvm] [AMDGPU] Add `wave_id` and `wave_shuffle` Clang builtins. (PR #179492)
via llvm-commits
- [llvm] [LV] Support conditional scalar assignments of masked operations (PR #178862)
Florian Hahn via llvm-commits
- [llvm] [X86] Allow handling of i128/256/512 SELECT on the FPU (PR #180197)
Phoebe Wang via llvm-commits
- [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)
Tony Varghese via llvm-commits
- [flang] [llvm] [flang] Implement 'F_C_STRING' library function (Fortran 2023) (PR #174474)
via llvm-commits
- [llvm] [AArch64] Tweak fixed-length loop.dependence.mask costs (PR #175538)
Benjamin Maxwell via llvm-commits
- [llvm] [LV] Add initial support for partial alias masking (PR #177599)
Gaëtan Bossu via llvm-commits
- [llvm] [LV] Fix issue in VPFirstOrderRecurrencePHIRecipe::usesFirstLaneOnly (PR #179977)
David Sherwood via llvm-commits
- [llvm] [X86] Fix lower1BitShuffle blend-with-zero shuffles to AND mask (PR #180472)
Simon Pilgrim via llvm-commits
- [llvm] [LLVM] Relax clobbering checks for calls to consider writes only (PR #179721)
via llvm-commits
- [llvm] 233a991 - [AArch64] Tweak fixed-length loop.dependence.mask costs (#175538)
via llvm-commits
- [llvm] [PowerPC] Require PPC32 for 32-bit addc/adde/subc/sube (PR #179186)
Nikita Popov via llvm-commits
- [llvm] [LV] Convert scatter w/uniform addr and mask being header mask to scalar store. (PR #172799)
Luke Lau via llvm-commits
- [llvm] 2ffb543 - AMDGPU: Add a test for libcall simplify pow handling (#180491)
via llvm-commits
- [clang] [llvm] Make OpenCL an OSType rather than an EnvironmentType. (PR #170297)
Marcos Maronas via llvm-commits
- [flang] [llvm] Enabling support for Allocate clause in DO construct (PR #180172)
Jack Styles via llvm-commits
- [lld] [lld] Add explicit std::move(...) to avoid a few vector copies (PR #180474)
Hans Wennborg via llvm-commits
- [llvm] [RISCV] Lower (abd[s|u] a, b) to (abs (sub a, b)) for i32/i64 element when `Zvabd` exists. (PR #180494)
Pengcheng Wang via llvm-commits
- [llvm] [RISCV] Lower (abd[s|u] a, b) to (abs (sub a, b)) for i32/i64 element when `Zvabd` exists. (PR #180494)
via llvm-commits
- [llvm] [RISCV] Lower (abd[s|u] a, b) to (abs (sub a, b)) for i32/i64 element when `Zvabd` exists (PR #180494)
Pengcheng Wang via llvm-commits
- [llvm] [RISCV] Lower (abd[s|u] a, b) to (abs (sub a, b)) for i32/i64 element when `Zvabd` exists (PR #180494)
Luke Lau via llvm-commits
- [llvm] [RISCV] Lower (abd[s|u] a, b) to (abs (sub a, b)) for i32/i64 element when `Zvabd` exists (PR #180494)
Luke Lau via llvm-commits
- [llvm] [RISCV] Lower (abd[s|u] a, b) to (abs (sub a, b)) for i32/i64 element when `Zvabd` exists (PR #180494)
Craig Topper via llvm-commits
- [llvm] [RISCV] Lower (abd[s|u] a, b) to (abs (sub a, b)) for i32/i64 element when `Zvabd` exists (PR #180494)
Pengcheng Wang via llvm-commits
- [llvm] [RISCV] Lower (abd[s|u] a, b) to (abs (sub a, b)) for i32/i64 element when `Zvabd` exists (PR #180494)
Craig Topper via llvm-commits
- [llvm] [RISCV] Lower (abd[s|u] a, b) to (abs (sub a, b)) for i32/i64 element when `Zvabd` exists (PR #180494)
Craig Topper via llvm-commits
- [llvm] 4ef7be9 - [SimplifyLibCalls] Directly convert fmin/fmax to intrinsics (#177988)
via llvm-commits
- [llvm] [RISCV] Enable select optimization by default (PR #178394)
Pengcheng Wang via llvm-commits
- [llvm] [MachineScheduler] Add option to skip large regions with high pressure (PR #178422)
Nathan Corbyn via llvm-commits
- [llvm] [RISCV] Rename FeatureEnableSelectOptimize to TuneEnableSelectOptimize (PR #180496)
Pengcheng Wang via llvm-commits
- [llvm] [RISCV] Combine ADDD+WMULSU to WMACCSU (PR #180454)
Sam Elliott via llvm-commits
- [llvm] 3862a4f - [GlobalISel] Use named constant for impossible repair cost (#180490)
via llvm-commits
- [clang] [llvm] Clang: Add nsz to llvm.minnum and llvm.maxnum emitted from fmin and fmax (PR #113133)
Nikita Popov via llvm-commits
- [llvm] [DebugInfo] DWARFFormValue use formatv instead of format (PR #180498)
Konrad Kleine via llvm-commits
- [llvm] [CAS] getInternalFileBackedObjectData - fix MSVC not all control paths return a value warning. NFC. (PR #180499)
Simon Pilgrim via llvm-commits
- [llvm] [VPlan] Reject partial reductions with invalid costs in getScaledReds. (PR #180438)
Sander de Smalen via llvm-commits
- [llvm] [ValueTracking] Treat fmul NaN sign bit as unknown to prevent incorrect fabs folding (PR #180339)
Matt Arsenault via llvm-commits
- [llvm] 27a8ab0 - [AMDGPU] Fix V_INDIRECT_REG_READ_GPR_IDX expansion with immediate index (#179699)
via llvm-commits
- [llvm] [AMDGPU] Fix V_INDIRECT_REG_READ_GPR_IDX expansion with immediate index (PR #179699)
Petr Kurapov via llvm-commits
- [llvm] 964651a - [X86] Allow handling of i128/256/512 SELECT on the FPU (#180197)
via llvm-commits
- [llvm] [SDAG] Implement SplitVecOp for `ISD::VECTOR_FIND_LAST_ACTIVE` (PR #180290)
Sander de Smalen via llvm-commits
- [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)
Florian Hahn via llvm-commits
- [llvm] [VPlan] Simplify true && x -> x (PR #179426)
Florian Hahn via llvm-commits
- [llvm] [AMDGPU] Add legalization rules for atomicrmw max/min ops (PR #180502)
Anshil Gandhi via llvm-commits
- [llvm] [VPlan] Propagate FastMathFlags from phis to blends (PR #180226)
Ramkumar Ramachandra via llvm-commits
- [llvm] [SLP] Use the correct identity when combining binary opcodes with AND/MUL (PR #180457)
Simon Pilgrim via llvm-commits
- [llvm] [AArch64][SVE] Use loop.dependence.war.mask in vector.memcheck (PR #175943)
Benjamin Maxwell via llvm-commits
- [lld] [LLD][COFF] Fix out-of-bounds write when filling gaps with INT3 in code sections (PR #180411)
Petr Beneš via llvm-commits
- [llvm] 2eb8112 - [CAS] getInternalFileBackedObjectData - fix MSVC not all control paths return a value warning. NFC. (#180499)
via llvm-commits
- [llvm] [ConstantRange] Expand makeAllowedICmpRegion to use samesign to give tighter range (PR #174355)
Ramkumar Ramachandra via llvm-commits
- [llvm] [TwoAddressInstruction] Iterate through tied regs when analyzing revcopy (PR #179940)
Anton Sidorenko via llvm-commits
- [llvm] [NFC][VPlan] Test showing that unit-stride-mv should be done later in pipeline (PR #180292)
Florian Hahn via llvm-commits
- [llvm] [AMDGPU] Add legalization rules for G_ATOMICRMW_FADD (PR #175257)
Petar Avramovic via llvm-commits
- [llvm] [DAGCombiner] Fold trunc(build_vector(ext(x), ext(x)) -> build_vector(x,x) (PR #179857)
Liao Chunyu via llvm-commits
- [llvm] [UTC][VPlan] Use `-vplan-print-after` for VPlan-dump-based tests (PR #178736)
Ramkumar Ramachandra via llvm-commits
- [llvm] [X86] i512 shift expansion on AVX512 targets (PR #180432)
Simon Pilgrim via llvm-commits
- [llvm] [CodeGen] Improve documentation for SUBREG_TO_REG (PR #180504)
Jay Foad via llvm-commits
- [llvm] [offload] Adapt tests to new PluginInterface quoting [NFC] (PR #180505)
Robert Imschweiler via llvm-commits
- [llvm] [AMDGPU] Add intrinsic exposing s_alloc_vgpr (PR #163951)
Diana Picus via llvm-commits
- [llvm] [OFFLOAD] Fix TARGET_NAME in plugins common code (PR #180151)
Robert Imschweiler via llvm-commits
- [llvm] [DAGCombiner] Fix crash in reassociationCanBreakAddressingModePattern for multi-memop nodes (PR #180268)
Jay Foad via llvm-commits
- [llvm] [DominanceFrontier] Support post-dominators on graphs with single root (PR #179336)
Ramkumar Ramachandra via llvm-commits
- [clang] [compiler-rt] [llvm] [X86] AMD Zen 6 Initial enablement (PR #179150)
Mikołaj Piróg via llvm-commits
- [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)
Florian Hahn via llvm-commits
- [lld] [lld][ELF] Add range extension thunks for x86-64 (PR #180266)
Peter Smith via llvm-commits
- [llvm] 8cd86ff - [VPlan] Propagate FastMathFlags from phis to blends (#180226)
via llvm-commits
- [llvm] [VectorCombine][X86] Add test coverage for #161980 (PR #180508)
Simon Pilgrim via llvm-commits
- [llvm] [InstCombine] Bail out on type mismatch in foldBitCastBitwiseLogic (PR #179640)
Kacper Doga via llvm-commits
- [llvm] [LAA][LV]Allow recognition of strided pointers with constant stride (PR #171151)
Florian Hahn via llvm-commits
- [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries at IR level (PR #180509)
Pankaj Dwivedi via llvm-commits
- [clang] [llvm] [mlir] [LLVM] Improve IR parsing and printing for target memory locations (PR #176968)
via llvm-commits
- [llvm] [RISCV] Add an initial set of InstAliases for P extension. (PR #180315)
Christian Herber via llvm-commits
- [llvm] [LV] Handle partial sub-reductions with sub in middle block. (PR #178919)
Sander de Smalen via llvm-commits
- [llvm] [DAG] TargetLowering::expandCLMUL - avoid ISD::MUL if target hasBitTest (PR #177566)
Jay Foad via llvm-commits
- [lld] 0cd8fd9 - [lld] Add explicit std::move(...) to avoid a few vector copies (#180474)
via llvm-commits
- [llvm] [BOLT] Keep folded functions in BinaryFunctions map. NFC (PR #180392)
Alexey Moksyakov via llvm-commits
- [llvm] [SPIRV] Fix constant materialization for width > 64bit (PR #180182)
Juan Manuel Martinez Caamaño via llvm-commits
- [llvm] [NFC][VPlan] Rename VPEVLBasedIVPHIRecipe to VPCurrentIterationPHIRecipe (PR #177114)
Florian Hahn via llvm-commits
- [lld] [ELF] Add target-specific relocation scanning for x86 (PR #178846)
Peter Smith via llvm-commits
- [llvm] bf13405 - [CodeGen] Improve documentation for SUBREG_TO_REG (#180504)
via llvm-commits
- [llvm] 4bb16b1 - [VectorCombine][X86] Add test coverage for #161980 (#180508)
via llvm-commits
- [llvm] [SPIR-V] Emit ceil(Bitwidth / 32) words during OpConstant creation (PR #180218)
Juan Manuel Martinez Caamaño via llvm-commits
- [llvm] 6dbdfd8 - [InstCombine] Drop nonnull assumes if the pointer is already known to be nonnull (#180434)
via llvm-commits
- [libc] [llvm] [libc][math] Refactor tanhf implementation to header-only in src/__support/math folder. (PR #178554)
Xinlong Chen via llvm-commits
- [llvm] [AMDGPU] Fix LDS address correction in promoteConstantOffsetToImm for async stores (PR #180220)
Jay Foad via llvm-commits
- [llvm] [MemorySSA] Relax clobbering checks for calls to consider writes only (PR #179721)
Antonio Frighetto via llvm-commits
- [llvm] [InstCombine] Always fold nonnull assumptions into operand bundles (PR #169923)
Nikolas Klauser via llvm-commits
- [llvm] [LAA] Use SCEVPtrToAddr in tryToCreateDiffChecks. (PR #178861)
Florian Hahn via llvm-commits
- [llvm] [InstCombine] Optimise the expression `(C & A) | (select (C ^ true), B, false)` with `FoldOrOfAndsWithSelectToLogical` (PR #178438)
Rajveer Singh Bharadwaj via llvm-commits
- [llvm] [InstCombine] Optimise the expression `(C & A) | (select (C ^ true), B, false)` with `FoldOrOfAndsWithSelectToLogical` (PR #178438)
Rajveer Singh Bharadwaj via llvm-commits
- [llvm] [InstCombine] Optimise the expression `(C & A) | (select (C ^ true), B, false)` with `FoldOrOfAndsWithSelectToLogical` (PR #178438)
Rajveer Singh Bharadwaj via llvm-commits
- [llvm] [InstCombine] Optimise the expression `(C & A) | (select (C ^ true), B, false)` with `FoldOrOfAndsWithSelectToLogical` (PR #178438)
Rajveer Singh Bharadwaj via llvm-commits
- [llvm] [InstCombine] Optimise the expression `(C & A) | (select (C ^ true), B, false)` with `FoldOrOfAndsWithSelectToLogical` (PR #178438)
Andreas Jonson via llvm-commits
- [llvm] [InstCombine] Optimise the expression `(C & A) | (select (C ^ true), B, false)` with `FoldOrOfAndsWithSelectToLogical` (PR #178438)
Andreas Jonson via llvm-commits
- [llvm] [InstCombine] Optimise the expression `(C & A) | (select (C ^ true), B, false)` with `FoldOrOfAndsWithSelectToLogical` (PR #178438)
Andreas Jonson via llvm-commits
- [llvm] [InstCombine] Optimise the expression `(C & A) | (select (C ^ true), B, false)` with `FoldOrOfAndsWithSelectToLogical` (PR #178438)
Andreas Jonson via llvm-commits
- [llvm] [InstCombine] Optimise the expression `(C & A) | (select (C ^ true), B, false)` with `FoldOrOfAndsWithSelectToLogical` (PR #178438)
Rajveer Singh Bharadwaj via llvm-commits
- [llvm] [InstCombine] Optimise the expression `(C & A) | (select (C ^ true), B, false)` with `FoldOrOfAndsWithSelectToLogical` (PR #178438)
Rajveer Singh Bharadwaj via llvm-commits
- [llvm] [InstCombine] Optimise the expression `(C & A) | (select (C ^ true), B, false)` with `FoldOrOfAndsWithSelectToLogical` (PR #178438)
Rajveer Singh Bharadwaj via llvm-commits
- [llvm] [InstCombine] Optimise the expression `(C & A) | (select (C ^ true), B, false)` with `FoldOrOfAndsWithSelectToLogical` (PR #178438)
Rajveer Singh Bharadwaj via llvm-commits
- [llvm] [InstCombine] Optimise the expression `(C & A) | (select (C ^ true), B, false)` with `FoldOrOfAndsWithSelectToLogical` (PR #178438)
Rajveer Singh Bharadwaj via llvm-commits
- [llvm] [InstCombine] Optimise the expression `(C & A) | (select (C ^ true), B, false)` with `FoldOrOfAndsWithSelectToLogical` (PR #178438)
Rajveer Singh Bharadwaj via llvm-commits
- [llvm] [InstCombine] Optimise the expression `(C & A) | (select (C ^ true), B, false)` with `FoldOrOfAndsWithSelectToLogical` (PR #178438)
Andreas Jonson via llvm-commits
- [llvm] [InstCombine] Optimise the expression `(C & A) | (select (C ^ true), B, false)` with `FoldOrOfAndsWithSelectToLogical` (PR #178438)
Rajveer Singh Bharadwaj via llvm-commits
- [llvm] [InstCombine] Optimise the expression `(C & A) | (select (C ^ true), B, false)` with `FoldOrOfAndsWithSelectToLogical` (PR #178438)
Rajveer Singh Bharadwaj via llvm-commits
- [llvm] [InstCombine] Optimise the expression `(C & A) | (select (C ^ true), B, false)` with `FoldOrOfAndsWithSelectToLogical` (PR #178438)
Rajveer Singh Bharadwaj via llvm-commits
- [llvm] [InstCombine] Optimise the expression `(C & A) | (select (C ^ true), B, false)` with `FoldOrOfAndsWithSelectToLogical` (PR #178438)
Rajveer Singh Bharadwaj via llvm-commits
- [llvm] [MLIR] [Python] Added plumbing to run stubgen on the mlir._mlir package (PR #179211)
Jacques Pienaar via llvm-commits
- [llvm] sketch idea of getConstantBuildVector (PR #180074)
Simon Pilgrim via llvm-commits
- [libc] [llvm] [libc][math] Refactor tanhf16 implementation to header-only in src/__support/math folder. (PR #178645)
Xinlong Chen via llvm-commits
- [llvm] [VPlan] Run initial recipe simplification on VPlan0. (PR #176828)
Florian Hahn via llvm-commits
- [libc] [llvm] [libc][math] Refactor hypotf16 to Header Only. (PR #180511)
via llvm-commits
- [llvm] 2805c8a - [VPlan] Add missing REQUIRES: asserts to VPlan output test
Luke Lau via llvm-commits
- [llvm] [VPlan] Skip applying InstsToScalarize with forced instr costs. (PR #168269)
Florian Hahn via llvm-commits
- [llvm] [LoopVectorize] Fix crash with GC statepoint in epilogue vectorization (PR #179459)
Florian Hahn via llvm-commits
- [llvm] [CostModel][X86] getShuffleCost - SK_Transpose v4f64/v4i64 matches UNPCK - don't generalise to SK_PermuteTwoSrc (PR #180514)
Simon Pilgrim via llvm-commits
- [llvm] 45b037c - [AMDGPU] Add fp8/bf8 conversion instructions for gfx1170 (#180191)
via llvm-commits
- [clang] [llvm] [AMDGPU] Add fp8/bf8 conversion instructions for gfx1170 (PR #180191)
Mirko Brkušanin via llvm-commits
- [clang] [llvm] [AMDGPU] Add dot4 fp8/bf8 instructions for gfx1170 (PR #180516)
Mirko Brkušanin via llvm-commits
- [clang] [llvm] [llvm][DebugInfo] Avoid attaching retained nodes to unrelated subprograms in DIBuilder (PR #180294)
Jeremy Morse via llvm-commits
- [compiler-rt] [llvm] [Profile] Enable binary profile correlation for Mach-O binaries (PR #179937)
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David Sherwood via llvm-commits
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Paul Kirth via llvm-commits
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Nikita Popov via llvm-commits
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Ben Dunbobbin via llvm-commits
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- [llvm] [AArch64] Fix active.lane.mask(0, cttz.elts(x)) -> 'brkb' transform (PR #180177)
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Justin Bogner via llvm-commits
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Reid Kleckner via llvm-commits
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Min-Yih Hsu via llvm-commits
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Sean Fertile via llvm-commits
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Shilei Tian via llvm-commits
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Tony Tao via llvm-commits
- [lld] c703f5a - [lld][Webassembly] Avoid a signed overflow on large sections (#178287)
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Alexey Bataev via llvm-commits
- [llvm] 5131186 - [VPlan] Use UTC to auto-generate more VPlan checks.
Florian Hahn via llvm-commits
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Sam Elliott via llvm-commits
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Fateme Hosseini via llvm-commits
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Shilei Tian via llvm-commits
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Ben Langmuir via llvm-commits
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Ryan Buchner via llvm-commits
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Paul Kirth via llvm-commits
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Argyrios Kyrtzidis via llvm-commits
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Alex Reinking via llvm-commits
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Jordan R AW via llvm-commits
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Ryan Buchner via llvm-commits
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Eric Christopher via llvm-commits
- [llvm] 1094775 - [X86] Fix lower1BitShuffle blend-with-zero shuffles to AND mask (#180472)
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Eric Christopher via llvm-commits
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Florian Mayer via llvm-commits
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Lucas Ramirez via llvm-commits
- [llvm] ac85248 - [NewPM] Port x86-winehstate (#180687)
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Eric Christopher via llvm-commits
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Shilei Tian via llvm-commits
- [llvm] InstCombine: Fix wrong insert point for fdiv->copysign simplify (PR #180839)
Yingwei Zheng via llvm-commits
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Yingwei Zheng via llvm-commits
- [llvm] InstCombine: Fix wrong insert point for sqrt -> copysign simplify (PR #180838)
Yingwei Zheng via llvm-commits
- [llvm] InstCombine: Fix insert point for rounding intrinsic -> copysign (PR #180837)
Yingwei Zheng via llvm-commits
- [llvm] 36caa31 - [llubi] Add UTC helper (#180603)
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Aiden Grossman via llvm-commits
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Tom Stellard via llvm-commits
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- [clang] [llvm] [outliners] Turn nooutline into an Enum Attribute (PR #163665)
Sam Elliott via llvm-commits
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Sam Elliott via llvm-commits
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Yaxun Liu via llvm-commits
- [llvm] [DAGCombiner] Combine (fshl A, X, Y) | (shl X, Y) --> fshl (A|X), X, Y (PR #180888)
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- [llvm] [DAGCombiner] Combine (fshl A, B, S) | (fshr C, D, BW-S) --> (fshl (A|C), (B|D), S) (PR #180889)
Craig Topper via llvm-commits
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Steffen Larsen via llvm-commits
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Craig Topper via llvm-commits
- [llvm] [DAGCombiner] Combine (fshl A, B, S) | (fshr C, D, BW-S) --> (fshl (A|C), (B|D), S) (PR #180889)
Jay Foad via llvm-commits
- [llvm] [DAGCombiner] Combine (fshl A, B, S) | (fshr C, D, BW-S) --> (fshl (A|C), (B|D), S) (PR #180889)
Craig Topper via llvm-commits
- [llvm] [LegalizeTypes] Emit FSHL/FSHR from ExpandShiftByConstant when Legal. (PR #180888)
Craig Topper via llvm-commits
- [llvm] [NFC] Fix typos 'bicast' -> 'bitcast' (PR #180890)
Wang Yaduo via llvm-commits
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Kyungtak Woo via llvm-commits
- [clang] [llvm] [clang-sycl-linker][offload] Set TheImageKind based on IsAOTCompileNeeded flag (PR #180269)
Alexey Bader via llvm-commits
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Mikael Holmen via llvm-commits
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Kyungtak Woo via llvm-commits
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Anshil Gandhi via llvm-commits
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Sameer Sahasrabuddhe via llvm-commits
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LLVM GN Syncbot via llvm-commits
- [llvm] 128437f - [AMDGPU] Introduce asyncmark/wait intrinsics (#180467)
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- [llvm] [WebAssembly] Add a WASM table to `llvm/test/MC/WebAssembly/wasm64.s`. NFC (PR #180861)
Demetrius Kanios via llvm-commits
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Sam Elliott via llvm-commits
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Sam Elliott via llvm-commits
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Fangrui Song via llvm-commits
- [llvm] b2444d0 - [AArch64][ARM] Add some tests for fcmp or branches. NFC
David Green via llvm-commits
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Nikita Popov via llvm-commits
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Nikita Popov via llvm-commits
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Rohit Aggarwal via llvm-commits
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- [llvm] 1e42c76 - [Mips] Fix cttz.i32 fails to lower on mips16 (#179633)
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Luke Lau via llvm-commits
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Demetrius Kanios via llvm-commits
- [llvm] ffe446e - [RISCV] Relax reversed mask's mask requirement in reverse to strided load/store combine (#180706)
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Georgiy Samoylov via llvm-commits
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Nikita Popov via llvm-commits
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Paulius Velesko via llvm-commits
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Ben Dunbobbin via llvm-commits
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Kacper Doga via llvm-commits
- [llvm] 8b57b97 - [DTLTO][NFC] Minor improvements to the input file preparation class (#180824)
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Petar Avramovic via llvm-commits
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Nikita Popov via llvm-commits
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Luke Lau via llvm-commits
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Liu Ke via llvm-commits
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Mel Chen via llvm-commits
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Nikita Popov via llvm-commits
- [llvm] 6f0b8a7 - [SLP] Use the correct calling convention for vector math routines (#180759)
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Pengcheng Wang via llvm-commits
- [llvm] e84659b - [RISCV][CodeGen] Combine vwaddu+vabd(u) to vwabda(u)
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Rohit Aggarwal via llvm-commits
- [llvm] [AggressiveInstCombine] POPCNT generation for bit-count pattern (PR #180917)
Rohit Aggarwal via llvm-commits
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David Green via llvm-commits
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Florian Hahn via llvm-commits
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Matt Davis via llvm-commits
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Jonathan Thackray via llvm-commits
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David Green via llvm-commits
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Alexey Bataev via llvm-commits
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Florian Hahn via llvm-commits
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Florian Hahn via llvm-commits
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Benjamin Maxwell via llvm-commits
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Luke Lau via llvm-commits
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- [llvm] [RISCV] Combine ADDD(lo, hi, x, 0) -> WADDAU(lo, hi, x, 0). Combine WADDAU (WADDAU lo, hi, x, 0), y, 0 -> WADDAU lo, hi, x, y (PR #181396)
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- [llvm] [RISCV] Combine ADDD(lo, hi, x, 0) -> WADDAU(lo, hi, x, 0). Combine WADDAU (WADDAU lo, hi, x, 0), y, 0 -> WADDAU lo, hi, x, y (PR #181396)
Sam Elliott via llvm-commits
- [llvm] [RISCV] Combine ADDD(lo, hi, x, 0) -> WADDAU(lo, hi, x, 0). Combine WADDAU (WADDAU lo, hi, x, 0), y, 0 -> WADDAU lo, hi, x, y (PR #181396)
Craig Topper via llvm-commits
- [llvm] [RISCV] Combine ADDD(lo, hi, x, 0) -> WADDAU(lo, hi, x, 0). Combine WADDAU (WADDAU lo, hi, x, 0), y, 0 -> WADDAU lo, hi, x, y (PR #181396)
Craig Topper via llvm-commits
- [llvm] [RISCV] Combine ADDD(lo, hi, x, 0) -> WADDAU(lo, hi, x, 0). Combine WADDAU (WADDAU lo, hi, x, 0), y, 0 -> WADDAU lo, hi, x, y (PR #181396)
Craig Topper via llvm-commits
- [llvm] [RISCV] Combine ADDD(lo, hi, x, 0) -> WADDAU(lo, hi, x, 0). Combine WADDAU (WADDAU lo, hi, x, 0), y, 0 -> WADDAU lo, hi, x, y (PR #181396)
Craig Topper via llvm-commits
- [llvm] [RISCV] Combine ADDD(lo, hi, x, 0) -> WADDAU(lo, hi, x, 0). Combine WADDAU (WADDAU lo, hi, x, 0), y, 0 -> WADDAU lo, hi, x, y (PR #181396)
Craig Topper via llvm-commits
- [llvm] [RISCV] Combine ADDD(lo, hi, x, 0) -> WADDAU(lo, hi, x, 0). Combine WADDAU (WADDAU lo, hi, x, 0), y, 0 -> WADDAU lo, hi, x, y (PR #181396)
Craig Topper via llvm-commits
- [llvm] [RISCV] Combine ADDD(lo, hi, x, 0) -> WADDAU(lo, hi, x, 0). Combine WADDAU (WADDAU lo, hi, x, 0), y, 0 -> WADDAU lo, hi, x, y (PR #181396)
Craig Topper via llvm-commits
- [llvm] [RISCV] Combine ADDD(lo, hi, x, 0) -> WADDAU(lo, hi, x, 0). Combine WADDAU (WADDAU lo, hi, x, 0), y, 0 -> WADDAU lo, hi, x, y (PR #181396)
Craig Topper via llvm-commits
- [llvm] [SLP][NFC] Use static_assert to confirm SupportedOps is sorted (PR #181397)
Ryan Buchner via llvm-commits
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Hassnaa Hamdi via llvm-commits
- [llvm] [llvm/unittests/CAS] Fix `CASTests` compilation when `LLVM_ENABLE_ONDISK_CAS=OFF` (PR #181403)
Argyrios Kyrtzidis via llvm-commits
- [llvm] 1d588c5 - [RISCV] Rename tablegen class VALU_MV_VS2->VEXT_MV_VS2. NFC
Craig Topper via llvm-commits
- [llvm] [RISCV] Simplify Extension Predicates, Compatibility (PR #181255)
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- [llvm] f290379 - [SLP][NFC] Use static_assert to confirm SupportedOps is sorted (#181397)
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- [llvm] 648bd56 - [SystemZ][z/OS] Migrate most test case to use HLASM syntax (#181222)
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Craig Topper via llvm-commits
- [llvm] 5f8053b - [RISCV] In tryWideningMulAcc, check multiple users before checking operand 1. (#181321)
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- [llvm] af1a5c5 - [GISel][RISCV] Simplify the generated code for narrowScalarCTLS. (#180827)
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- [llvm] [GISel][RISCV] Simplify the generated code for narrowScalarCTLS. (PR #180827)
Craig Topper via llvm-commits
- [llvm] 343103a - [NFC] Pre-Commit test case for __builtin_ppc_test_data_class (#181181)
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Frederick Vu via llvm-commits
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- [compiler-rt] 7817197 - [ASan][Windows] Fix false positive for zero sized rtl allocations (#181015)
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Yingwei Zheng via llvm-commits
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- [llvm] 6eeb03b - [RISCV][NFC] Fix UBSan issue in ISel (#181422)
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- [llvm] [NFC] [HWAsan] Run UTC on hwasan tests (PR #181437)
Florian Mayer via llvm-commits
- [llvm] edae8a4 - [Hexagon] Fix APInt assertion in getBuildVectorConstInts (#181202)
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- [llvm] 3961394 - [TableGen] Introduce MatcherList to manage a linked list of Matchers. NFC (#177875)
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- [llvm] 4833c51 - Revert "[TableGen] Introduce MatcherList to manage a linked list of Matchers. NFC (#177875)"
Craig Topper via llvm-commits
- [llvm] [RISCV] Calculate max call frame size in RISCVTargetLowering::finalizeLowering. (PR #181302)
Sam Elliott via llvm-commits
- [llvm] 74599c6 - [RISCV] Add SpacemiT A100 processor definition (#174052)
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- [llvm] 74be8ed - [GlobalISel] Fix type mismatch in LegalizerHelper ternary (#180865)
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- [llvm] [Hexagon] Add :mem_noshuf for store-load pairs with no scheduler Order dep (PR #181456)
Brian Cain via llvm-commits
- [llvm] bc50d9a - [RISCV] Convert some multiclasses in RISCVInstrInfoV.td to classes if they only have one child def. NFC (#181408)
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- [llvm] 7fd56a0 - [RISCV] Calculate max call frame size in RISCVTargetLowering::finalizeLowering. (#181302)
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- [llvm] [gsymutil] Verify output string table size and address info offsets do not exceed 32-bit max (PR #181458)
Roy Shi via llvm-commits
- [llvm] [windows][x86][asm] fix nullptr deref in WinCOFFWriter::recordRelocation (PR #181459)
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- [lld] 78d9957 - Revert "[LLD] Add support for statically resolved vendor-specific RISCV relocations. (#169273)" (#181336)
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- [lld] d6dee90 - [ELF] Move RISCV scanSectionImpl next to getRelExpr. NFC
Fangrui Song via llvm-commits
- [llvm] 5c14267 - [Clang][RISCV] Add Zvabd intrinsics
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- [llvm] [LV] Fix strict weak ordering violation in handleUncountableEarlyExits sort (PR #181462)
Brian Cain via llvm-commits
- [llvm] 2060561 - Reapply "[msan] Switch switch() from strict handling to (icmp eq)-style handling" (#180636) (#181112)
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- [libc] [llvm] [libc][math] Refactor canonicalize family to header-only (PR #181467)
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- [llvm] [GISel] handle CTTZ in `computeKnownBits` (PR #181474)
Aayush Sabharwal via llvm-commits
- [clang] [llvm] [X86][AVX10.2] Decouple AMX-AVX512 from AVX10.2 (PR #148633)
Simon Pilgrim via llvm-commits
- [llvm] 45e666a - [Clang][inlineasm] Add special support for "rm" output constraints (#92040)
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- [llvm] 6e23353 - [DAGCombiner] Fix crash caused by illegal InterVT in ForwardStoreValueToDirectLoad (#181175)
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- [llvm] workflows/release-binaries: Use free arm Windows runners for PRs (PR #181477)
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- [clang] [llvm] [HLSL][DXIL][SPIRV] Added WaveActiveBitOr HLSL intrinsic (PR #165156)
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- [llvm] [NFC][TableGen] Minor code cleanup in RegisterInfoEmitter (PR #181479)
Rahul Joshi via llvm-commits
- [llvm] [NFC][WebAssembly] Add Fast-ISEl test for load-ext (PR #181480)
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- [llvm] a636dd4 - [inlineasm] The CFG is not necessarily preserved.
Bill Wendling via llvm-commits
- [llvm] c472187 - Revert "[Clang][inlineasm] Add special support for "rm" output constraints (#92040)"
Nikita Popov via llvm-commits
- [llvm] [NVPTX] implement `TLI.isTruncateFree(EVT, EVT)` (PR #181484)
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- [clang] [llvm] [LangRef] Describe semantic impact of non-temporal memory access. (PR #178264)
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- [llvm] [DAG] isKnownToBeAPowerOfTwo - add DemandedElts, OrZero arguments and support for zero constants (PR #181485)
Simon Pilgrim via llvm-commits
- [llvm] feat: add GlobalISel combine (PR #181486)
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- [llvm] [unittests][Support] Fix FileSystemTest for BSD semantics (PR #181487)
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Archived on: Sat Feb 14 08:45:51 PST 2026
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