[llvm] [SelectionDAG][x86] Ensure vector reduction optimization (PR #144231)

[Suhajda Tamás via llvm-commits]

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@@ -47892,7 +47892,8 @@ static SDValue combineArithReduction(SDNode *ExtElt, SelectionDAG &DAG,
 /// scalars back, while for x64 we should use 64-bit extracts and shifts.
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sutajo wrote:

Renamed it

https://github.com/llvm/llvm-project/pull/144231