[llvm] 7d2e182 - [X86] SimplifyDemandedVectorEltsForTargetNode - add handling for vpmaddwd/vpmaddubsw/vpmulhrsw vector width reduction (#180738)

[via llvm-commits]

Author: Simon Pilgrim
Date: 2026-02-10T14:25:40Z
New Revision: 7d2e182b0448bd06aabe534e3d08fd10f09ec805

URL: https://github.com/llvm/llvm-project/commit/7d2e182b0448bd06aabe534e3d08fd10f09ec805
DIFF: https://github.com/llvm/llvm-project/commit/7d2e182b0448bd06aabe534e3d08fd10f09ec805.diff

LOG: [X86] SimplifyDemandedVectorEltsForTargetNode - add handling for vpmaddwd/vpmaddubsw/vpmulhrsw vector width reduction (#180738)

Added: 
    

Modified: 
    llvm/lib/Target/X86/X86ISelLowering.cpp
    llvm/test/CodeGen/X86/vector-target-demanded-elts.ll

Removed: 
    


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diff  --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 594cfdc26312a..b8357087d30b1 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -44980,6 +44980,9 @@ bool X86TargetLowering::SimplifyDemandedVectorEltsForTargetNode(
     case X86ISD::PCMPGT:
     case X86ISD::PMULUDQ:
     case X86ISD::PMULDQ:
+    case X86ISD::MULHRS:
+    case X86ISD::VPMADDUBSW:
+    case X86ISD::VPMADDWD:
     case X86ISD::VSHLV:
     case X86ISD::VSRLV:
     case X86ISD::VSRAV:

diff  --git a/llvm/test/CodeGen/X86/vector-target-demanded-elts.ll b/llvm/test/CodeGen/X86/vector-target-demanded-elts.ll
index 84dbb03f5e292..dcfc941d9cb55 100644
--- a/llvm/test/CodeGen/X86/vector-target-demanded-elts.ll
+++ b/llvm/test/CodeGen/X86/vector-target-demanded-elts.ll
@@ -4,8 +4,7 @@
 define <4 x i32> @demanded_low_pmaddwd256_128(<16 x i16> %a0, <16 x i16> %a1) {
 ; CHECK-LABEL: demanded_low_pmaddwd256_128:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    vpmaddwd %ymm1, %ymm0, %ymm0
-; CHECK-NEXT:    # kill: def $xmm0 killed $xmm0 killed $ymm0
+; CHECK-NEXT:    vpmaddwd %xmm1, %xmm0, %xmm0
 ; CHECK-NEXT:    vzeroupper
 ; CHECK-NEXT:    retq
   %res = call <8 x i32> @llvm.x86.avx2.pmadd.wd(<16 x i16> %a0, <16 x i16> %a1)
@@ -16,8 +15,7 @@ define <4 x i32> @demanded_low_pmaddwd256_128(<16 x i16> %a0, <16 x i16> %a1) {
 define <8 x i32> @demanded_low_pmaddwd512_256(<32 x i16> %x0, <32 x i16> %x1) {
 ; CHECK-LABEL: demanded_low_pmaddwd512_256:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    vpmaddwd %zmm1, %zmm0, %zmm0
-; CHECK-NEXT:    # kill: def $ymm0 killed $ymm0 killed $zmm0
+; CHECK-NEXT:    vpmaddwd %ymm1, %ymm0, %ymm0
 ; CHECK-NEXT:    retq
   %res = call <16 x i32> @llvm.x86.avx512.pmaddw.d.512(<32 x i16> %x0, <32 x i16> %x1)
   %ext = shufflevector <16 x i32> %res, <16 x i32> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
@@ -27,8 +25,7 @@ define <8 x i32> @demanded_low_pmaddwd512_256(<32 x i16> %x0, <32 x i16> %x1) {
 define <8 x i16> @demanded_low_pmaddubs256_128(<32 x i8> %a0, <32 x i8> %a1) {
 ; CHECK-LABEL: demanded_low_pmaddubs256_128:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    vpmaddubsw %ymm1, %ymm0, %ymm0
-; CHECK-NEXT:    # kill: def $xmm0 killed $xmm0 killed $ymm0
+; CHECK-NEXT:    vpmaddubsw %xmm1, %xmm0, %xmm0
 ; CHECK-NEXT:    vzeroupper
 ; CHECK-NEXT:    retq
   %res = call <16 x i16> @llvm.x86.avx2.pmadd.ub.sw(<32 x i8> %a0, <32 x i8> %a1)
@@ -39,8 +36,7 @@ define <8 x i16> @demanded_low_pmaddubs256_128(<32 x i8> %a0, <32 x i8> %a1) {
 define <16 x i16> @demanded_low_pmaddubs512_256(<64 x i8> %x0, <64 x i8> %x1) {
 ; CHECK-LABEL: demanded_low_pmaddubs512_256:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    vpmaddubsw %zmm1, %zmm0, %zmm0
-; CHECK-NEXT:    # kill: def $ymm0 killed $ymm0 killed $zmm0
+; CHECK-NEXT:    vpmaddubsw %ymm1, %ymm0, %ymm0
 ; CHECK-NEXT:    retq
   %res = call <32 x i16> @llvm.x86.avx512.pmaddubs.w.512(<64 x i8> %x0, <64 x i8> %x1)
   %ext = shufflevector <32 x i16> %res, <32 x i16> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
@@ -50,8 +46,7 @@ define <16 x i16> @demanded_low_pmaddubs512_256(<64 x i8> %x0, <64 x i8> %x1) {
 define <8 x i16> @demanded_low_pmulhrsw256_128(<16 x i16> %a0, <16 x i16> %a1) {
 ; CHECK-LABEL: demanded_low_pmulhrsw256_128:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    vpmulhrsw %ymm1, %ymm0, %ymm0
-; CHECK-NEXT:    # kill: def $xmm0 killed $xmm0 killed $ymm0
+; CHECK-NEXT:    vpmulhrsw %xmm1, %xmm0, %xmm0
 ; CHECK-NEXT:    vzeroupper
 ; CHECK-NEXT:    retq
   %res = call <16 x i16> @llvm.x86.avx2.pmul.hr.sw(<16 x i16> %a0, <16 x i16> %a1)
@@ -62,8 +57,7 @@ define <8 x i16> @demanded_low_pmulhrsw256_128(<16 x i16> %a0, <16 x i16> %a1) {
 define <16 x i16> @demanded_low_pmulhrsw512_256(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2) {
 ; CHECK-LABEL: demanded_low_pmulhrsw512_256:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    vpmulhrsw %zmm1, %zmm0, %zmm0
-; CHECK-NEXT:    # kill: def $ymm0 killed $ymm0 killed $zmm0
+; CHECK-NEXT:    vpmulhrsw %ymm1, %ymm0, %ymm0
 ; CHECK-NEXT:    retq
   %res = call <32 x i16> @llvm.x86.avx512.pmul.hr.sw.512(<32 x i16> %x0, <32 x i16> %x1)
   %ext = shufflevector <32 x i16> %res, <32 x i16> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>