[llvm] [AArch64][ISel] Add clmul to pmullb/t lowering (PR #180568)

[Sander de Smalen via llvm-commits]

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@@ -2002,7 +2002,7 @@ AArch64TargetLowering::AArch64TargetLowering(const TargetMachine &TM,
       setPartialReduceMLAAction(MLAOps, MVT::nxv4i32, MVT::nxv8i16, Legal);
       setPartialReduceMLAAction(MLAOps, MVT::nxv8i16, MVT::nxv16i8, Legal);
 
-      setOperationAction(ISD::CLMUL, MVT::nxv16i8, Legal);
+      setOperationAction(ISD::CLMUL, {MVT::nxv16i8, MVT::nxv4i32}, Legal);
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sdesmalen-arm wrote:

Are we missing `nxv8i16` here, or is that omission on purpose?

https://github.com/llvm/llvm-project/pull/180568