[llvm] [ARM] support `r14` as an alias for `lr` (PR #179740)
Simon Tatham via llvm-commits
llvm-commits at lists.llvm.org
Mon Feb 9 06:40:17 PST 2026
================
@@ -91,6 +91,9 @@ Changes to the AMDGPU Backend
Changes to the ARM Backend
--------------------------
+* The `r14` register can now be used as an alias for the link register `lr`.
----------------
statham-arm wrote:
It looks as if this is specifically referring to inline asm?
I looked at the PR title and thought "Surely LLVM already knows that r14 means lr?" And in some contexts it has no trouble with it:
```
$ llvm-mc -triple armv7a -show-encoding <<< "bx r14"
bx lr @ encoding: [0x1e,0xff,0x2f,0xe1]
```
So this wording probably wants to be more specific, to avoid giving the impression that the missing feature was bigger than it was!
https://github.com/llvm/llvm-project/pull/179740
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