[llvm] [ARM] Precommit tests: strictfp rounding vector intrinsics (PR #180479)

[via llvm-commits]

llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-arm

Author: Serge Pavlov (spavloff)

<details>
<summary>Changes</summary>



---
Full diff: https://github.com/llvm/llvm-project/pull/180479.diff


2 Files Affected:

- (added) llvm/test/CodeGen/ARM/fp-intrinsics-vector-v8.ll (+101) 
- (modified) llvm/test/CodeGen/Thumb2/mve-intrinsics/strict-intrinsics.ll (+25) 


``````````diff
diff --git a/llvm/test/CodeGen/ARM/fp-intrinsics-vector-v8.ll b/llvm/test/CodeGen/ARM/fp-intrinsics-vector-v8.ll
new file mode 100644
index 0000000000000..061834ab4eaf8
--- /dev/null
+++ b/llvm/test/CodeGen/ARM/fp-intrinsics-vector-v8.ll
@@ -0,0 +1,101 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; RUN: llc -mtriple=armv8a-none-eabi %s -o - | FileCheck %s
+
+
+define <4 x float> @nearbyint_v4f32(<4 x float> %x) #0 {
+; CHECK-LABEL: nearbyint_v4f32:
+; CHECK:       @ %bb.0:
+; CHECK-NEXT:    vmov d1, r2, r3
+; CHECK-NEXT:    vmov d0, r0, r1
+; CHECK-NEXT:    vrintr.f32 s7, s3
+; CHECK-NEXT:    vrintr.f32 s6, s2
+; CHECK-NEXT:    vrintr.f32 s5, s1
+; CHECK-NEXT:    vrintr.f32 s4, s0
+; CHECK-NEXT:    vmov r2, r3, d3
+; CHECK-NEXT:    vmov r0, r1, d2
+; CHECK-NEXT:    bx lr
+  %val = call <4 x float> @llvm.experimental.constrained.nearbyint.v4f32(<4 x float> %x, metadata !"round.dynamic", metadata !"fpexcept.strict") #0
+  ret <4 x float> %val
+}
+
+define <4 x float> @rint_v4f32(<4 x float> %x) #0 {
+; CHECK-LABEL: rint_v4f32:
+; CHECK:       @ %bb.0:
+; CHECK-NEXT:    vmov d1, r2, r3
+; CHECK-NEXT:    vmov d0, r0, r1
+; CHECK-NEXT:    vrintx.f32 s7, s3
+; CHECK-NEXT:    vrintx.f32 s6, s2
+; CHECK-NEXT:    vrintx.f32 s5, s1
+; CHECK-NEXT:    vrintx.f32 s4, s0
+; CHECK-NEXT:    vmov r2, r3, d3
+; CHECK-NEXT:    vmov r0, r1, d2
+; CHECK-NEXT:    bx lr
+  %val = call <4 x float> @llvm.experimental.constrained.rint.v4f32(<4 x float> %x, metadata !"round.dynamic", metadata !"fpexcept.strict") #0
+  ret <4 x float> %val
+}
+
+define <4 x float> @round_v4f32(<4 x float> %x) #0 {
+; CHECK-LABEL: round_v4f32:
+; CHECK:       @ %bb.0:
+; CHECK-NEXT:    vmov d1, r2, r3
+; CHECK-NEXT:    vmov d0, r0, r1
+; CHECK-NEXT:    vrinta.f32 s7, s3
+; CHECK-NEXT:    vrinta.f32 s6, s2
+; CHECK-NEXT:    vrinta.f32 s5, s1
+; CHECK-NEXT:    vrinta.f32 s4, s0
+; CHECK-NEXT:    vmov r2, r3, d3
+; CHECK-NEXT:    vmov r0, r1, d2
+; CHECK-NEXT:    bx lr
+  %val = call <4 x float> @llvm.experimental.constrained.round.v4f32(<4 x float> %x, metadata !"fpexcept.strict") #0
+  ret <4 x float> %val
+}
+
+define <4 x float> @roundeven_v4f32(<4 x float> %x) #0 {
+; CHECK-LABEL: roundeven_v4f32:
+; CHECK:       @ %bb.0:
+; CHECK-NEXT:    vmov d1, r2, r3
+; CHECK-NEXT:    vmov d0, r0, r1
+; CHECK-NEXT:    vrintn.f32 s7, s3
+; CHECK-NEXT:    vrintn.f32 s6, s2
+; CHECK-NEXT:    vrintn.f32 s5, s1
+; CHECK-NEXT:    vrintn.f32 s4, s0
+; CHECK-NEXT:    vmov r2, r3, d3
+; CHECK-NEXT:    vmov r0, r1, d2
+; CHECK-NEXT:    bx lr
+  %val = call <4 x float> @llvm.experimental.constrained.roundeven.v4f32(<4 x float> %x, metadata !"fpexcept.strict") #0
+  ret <4 x float> %val
+}
+
+define <4 x float> @floor_v4f32(<4 x float> %x) #0 {
+; CHECK-LABEL: floor_v4f32:
+; CHECK:       @ %bb.0:
+; CHECK-NEXT:    vmov d1, r2, r3
+; CHECK-NEXT:    vmov d0, r0, r1
+; CHECK-NEXT:    vrintm.f32 s7, s3
+; CHECK-NEXT:    vrintm.f32 s6, s2
+; CHECK-NEXT:    vrintm.f32 s5, s1
+; CHECK-NEXT:    vrintm.f32 s4, s0
+; CHECK-NEXT:    vmov r2, r3, d3
+; CHECK-NEXT:    vmov r0, r1, d2
+; CHECK-NEXT:    bx lr
+  %val = call <4 x float> @llvm.experimental.constrained.floor.v4f32(<4 x float> %x, metadata !"fpexcept.strict") #0
+  ret <4 x float> %val
+}
+
+define <4 x float> @ceil_v4f32(<4 x float> %x) #0 {
+; CHECK-LABEL: ceil_v4f32:
+; CHECK:       @ %bb.0:
+; CHECK-NEXT:    vmov d1, r2, r3
+; CHECK-NEXT:    vmov d0, r0, r1
+; CHECK-NEXT:    vrintp.f32 s7, s3
+; CHECK-NEXT:    vrintp.f32 s6, s2
+; CHECK-NEXT:    vrintp.f32 s5, s1
+; CHECK-NEXT:    vrintp.f32 s4, s0
+; CHECK-NEXT:    vmov r2, r3, d3
+; CHECK-NEXT:    vmov r0, r1, d2
+; CHECK-NEXT:    bx lr
+  %val = call <4 x float> @llvm.experimental.constrained.ceil.v4f32(<4 x float> %x, metadata !"fpexcept.strict") #0
+  ret <4 x float> %val
+}
+
+attributes #0 = { strictfp }
diff --git a/llvm/test/CodeGen/Thumb2/mve-intrinsics/strict-intrinsics.ll b/llvm/test/CodeGen/Thumb2/mve-intrinsics/strict-intrinsics.ll
index 016b1202f457d..18a3fbc26219a 100644
--- a/llvm/test/CodeGen/Thumb2/mve-intrinsics/strict-intrinsics.ll
+++ b/llvm/test/CodeGen/Thumb2/mve-intrinsics/strict-intrinsics.ll
@@ -340,6 +340,31 @@ entry:
   ret <8 x half> %0
 }
 
+define arm_aapcs_vfpcc <8 x half> @test_roundeven_f16(<8 x half> %a) #0 {
+; CHECK-LABEL: test_roundeven_f16:
+; CHECK:       @ %bb.0: @ %entry
+; CHECK-NEXT:    vmovx.f16 s4, s0
+; CHECK-NEXT:    vrintn.f16 s0, s0
+; CHECK-NEXT:    vrintn.f16 s4, s4
+; CHECK-NEXT:    vins.f16 s0, s4
+; CHECK-NEXT:    vmovx.f16 s4, s1
+; CHECK-NEXT:    vrintn.f16 s4, s4
+; CHECK-NEXT:    vrintn.f16 s1, s1
+; CHECK-NEXT:    vins.f16 s1, s4
+; CHECK-NEXT:    vmovx.f16 s4, s2
+; CHECK-NEXT:    vrintn.f16 s4, s4
+; CHECK-NEXT:    vrintn.f16 s2, s2
+; CHECK-NEXT:    vins.f16 s2, s4
+; CHECK-NEXT:    vmovx.f16 s4, s3
+; CHECK-NEXT:    vrintn.f16 s4, s4
+; CHECK-NEXT:    vrintn.f16 s3, s3
+; CHECK-NEXT:    vins.f16 s3, s4
+; CHECK-NEXT:    bx lr
+entry:
+  %0 = tail call <8 x half> @llvm.experimental.constrained.roundeven.v8f16(<8 x half> %a, metadata !"fpexcept.strict")
+  ret <8 x half> %0
+}
+
 define arm_aapcs_vfpcc <4 x float> @test_vrndnq_f32(<4 x float> %a) #0 {
 ; CHECK-LABEL: test_vrndnq_f32:
 ; CHECK:       @ %bb.0: @ %entry

``````````

</details>


https://github.com/llvm/llvm-project/pull/180479