[llvm] [GlobalISel] Add integer combines from SelectionDAG (PR #181126)

[via llvm-commits]

llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-llvm-globalisel

Author: Osman Yasar (osmanyasar05)

<details>
<summary>Changes</summary>

This PR adds the patterns` // fold (A - (0 - B)) to (A + B)` and `// fold A - (A - B) -> B` from SelectionDAG: https://github.com/llvm/llvm-project/blob/838be78e44cd1f70006eb508bfc925e3e56aac03/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp#L4312

These rewrites should not need HasOneUse checks, since even with multiple uses, they cannot increase the instruction count.

---
Full diff: https://github.com/llvm/llvm-project/pull/181126.diff


2 Files Affected:

- (modified) llvm/include/llvm/Target/GlobalISel/Combine.td (+16) 
- (modified) llvm/test/CodeGen/AArch64/GlobalISel/combine-integer.mir (+43) 


``````````diff
diff --git a/llvm/include/llvm/Target/GlobalISel/Combine.td b/llvm/include/llvm/Target/GlobalISel/Combine.td
index f5c940bffc8fb..a90790afa8dfb 100644
--- a/llvm/include/llvm/Target/GlobalISel/Combine.td
+++ b/llvm/include/llvm/Target/GlobalISel/Combine.td
@@ -1946,6 +1946,20 @@ def APlusBMinusCPlusA : GICombineRule<
           (G_SUB $sub1, $B, $add1),
           (G_ADD $root, $A, $sub1)),
    (apply (G_SUB $root, $B, $C))>;
+  
+// fold (A - (0 - B)) to (A + B)
+def AMinusZeroMinusB : GICombineRule<
+   (defs root:$root),
+   (match (G_SUB $sub1, 0, $B),
+          (G_SUB $root, $A, $sub1)),
+   (apply (G_ADD $root, $A, $B))>;
+
+// fold A - (A - B) -> B
+def AMinusBMinusA: GICombineRule<
+   (defs root:$root),
+   (match (G_SUB $add, $A, $B),
+          (G_SUB $root, $A, $add)),
+   (apply (GIReplaceReg $root, $B))>;
 
 // fold (A+C1)-C2 -> A+(C1-C2)
 def APlusC1MinusC2: GICombineRule<
@@ -2008,6 +2022,8 @@ def integer_reassoc_combines: GICombineGroup<[
   AMinusBPlusBMinusC,
   APlusBMinusAplusC,
   APlusBMinusCPlusA,
+  AMinusZeroMinusB,
+  AMinusBMinusA,
   APlusC1MinusC2,
   C2MinusAPlusC1,
   AMinusC1MinusC2,
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/combine-integer.mir b/llvm/test/CodeGen/AArch64/GlobalISel/combine-integer.mir
index c9b24ad75ce27..0f7efc9df34bb 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/combine-integer.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/combine-integer.mir
@@ -413,3 +413,46 @@ body:             |
     $x0 = COPY %add
     RET_ReallyLR implicit $x0
 
+...
+---
+name:   AMinusZeroMinusB
+body:             |
+  bb.0:
+    liveins: $w0, $w1
+
+
+    ; CHECK-LABEL: name: AMinusZeroMinusB
+    ; CHECK: liveins: $w0, $w1
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: %a:_(s64) = COPY $x0
+    ; CHECK-NEXT: %b:_(s64) = COPY $x1
+    ; CHECK-NEXT: %sub2:_(s64) = G_ADD %a, %b
+    ; CHECK-NEXT: $x0 = COPY %sub2(s64)
+    ; CHECK-NEXT: RET_ReallyLR implicit $x0
+    %a:_(s64) = COPY $x0
+    %b:_(s64) = COPY $x1
+    %c1:_(s64) = G_CONSTANT i64 0
+    %sub1:_(s64) = G_SUB %c1, %b
+    %sub2:_(s64) = G_SUB %a, %sub1
+    $x0 = COPY %sub2
+    RET_ReallyLR implicit $x0
+
+...
+---
+name:   AMinusBMinusA
+body:             |
+  bb.0:
+    liveins: $w0, $w1
+
+    ; CHECK-LABEL: name: AMinusBMinusA
+    ; CHECK: liveins: $w0, $w1
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: %b:_(s64) = COPY $x1
+    ; CHECK-NEXT: $x0 = COPY %b(s64)
+    ; CHECK-NEXT: RET_ReallyLR implicit $x0
+    %a:_(s64) = COPY $x0
+    %b:_(s64) = COPY $x1
+    %sub:_(s64) = G_SUB %a, %b
+    %add:_(s64) = G_SUB %a, %sub
+    $x0 = COPY %add
+    RET_ReallyLR implicit $x0

``````````

</details>


https://github.com/llvm/llvm-project/pull/181126