[llvm] [LV] Add initial support for partial alias masking (PR #177599)
Benjamin Maxwell via llvm-commits
llvm-commits at lists.llvm.org
Mon Feb 9 05:25:20 PST 2026
================
@@ -46,11 +46,20 @@ VPValue *vputils::getOrCreateVPValueForSCEVExpr(VPlan &Plan, const SCEV *Expr) {
if (U && !isa<Instruction>(U->getValue()))
return Plan.getOrAddLiveIn(U->getValue());
auto *Expanded = new VPExpandSCEVRecipe(Expr);
- Plan.getEntry()->appendRecipe(Expanded);
+ VPBasicBlock *EntryVPBB = Plan.getEntry();
+ Plan.getEntry()->insert(Expanded, EntryVPBB->getFirstNonPhi());
return Expanded;
}
bool vputils::isHeaderMask(const VPValue *V, const VPlan &Plan) {
+ if (V == &Plan.getAliasMask())
+ return true;
+
+ VPValue *Mask;
+ if (match(V,
+ m_c_BinaryAnd(m_VPValue(Mask), m_Specific(&Plan.getAliasMask()))))
+ V = Mask;
----------------
MacDue wrote:
IIRC, this is needed to allow some plan verification and mask finding to work correctly. This function already heavily assumes what the IR looks like, I don't believe any more `ands` will be needed for this feature.
https://github.com/llvm/llvm-project/pull/177599
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