[llvm] [AArch64][ISel] Add clmul to pmullb/t lowering (PR #180568)

[Paul Walker via llvm-commits]

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@@ -2015,6 +2015,9 @@ AArch64TargetLowering::AArch64TargetLowering(const TargetMachine &TM,
     }
   }
 
+  if (Subtarget->hasSVE2AES())
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paulwalker-arm wrote:

Agreed. In this case it's an artefact of how the architecture has changed over the years because they were SVE2 instructions when first added. This is why I try to keep the isel patterns close to the instruction definitions because then you don't need to worry about the Predicate, although that does not help the ISelLowering side.

https://github.com/llvm/llvm-project/pull/180568