[llvm] [AMDGPU][GISel] Add RegBankLegalize support for G_SI_CALL (PR #165747)
Chinmay Deshpande via llvm-commits
llvm-commits at lists.llvm.org
Wed Feb 11 10:13:56 PST 2026
================
@@ -1146,6 +1148,12 @@ RegBankLegalizeRules::RegBankLegalizeRules(const GCNSubtarget &_ST,
addRulesForGOpcs({G_AMDGPU_WAVE_ADDRESS}).Any({{UniP5}, {{SgprP5}, {}}});
+ addRulesForGOpcs({G_SI_CALL})
+ .Any({{_, UniP0}, {{None}, {SgprP0}}})
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chinmaydd wrote:
I did have to modify the definition of `G_SI_CALL` to take a virtual scalar register as an out value. But apart from that, I think I got the gist of what you were suggesting.
https://github.com/llvm/llvm-project/pull/165747
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