[llvm] [BOLT][AArch64] Add a unittest for compare-and-branch inversion. (PR #181177)
Alexandros Lamprineas via llvm-commits
llvm-commits at lists.llvm.org
Thu Feb 12 08:37:11 PST 2026
https://github.com/labrinea created https://github.com/llvm/llvm-project/pull/181177
Checks that isReversibleBranch() returns false
- when the immediate value is 63 and needs +1 adjustment
- when the immediate value is 0 and needs -1 adjustment
Checks that reverseBranchCondition() adjusts
- the opcode
- the immediate operand if necessary (+/-1)
- the register operands if necessary (swap)
>From 0f38c43b51074b9a8ed7783853dc2d7fc58ea2d0 Mon Sep 17 00:00:00 2001
From: Alexandros Lamprineas <alexandros.lamprineas at arm.com>
Date: Thu, 12 Feb 2026 16:19:49 +0000
Subject: [PATCH] [BOLT][AArch64] Add a unittest for compare-and-branch
inversion.
Checks that isReversibleBranch() returns false
- when the immediate value is 63 and needs +1 adjustment
- when the immediate value is 0 and needs -1 adjustment
Checks that reverseBranchCondition() adjusts
- the opcode
- the immediate operand if necessary (+/-1)
- the register operands if necessary (swap)
---
bolt/unittests/Core/MCPlusBuilder.cpp | 57 +++++++++++++++++++++++++++
1 file changed, 57 insertions(+)
diff --git a/bolt/unittests/Core/MCPlusBuilder.cpp b/bolt/unittests/Core/MCPlusBuilder.cpp
index a8d25f3323b38..e11347a8c4c94 100644
--- a/bolt/unittests/Core/MCPlusBuilder.cpp
+++ b/bolt/unittests/Core/MCPlusBuilder.cpp
@@ -119,6 +119,63 @@ TEST_P(MCPlusBuilderTester, AliasSmallerX0) {
/*OnlySmaller=*/true);
}
+TEST_P(MCPlusBuilderTester, AArch64_ReverseCompAndBranch) {
+ if (GetParam() != Triple::aarch64)
+ GTEST_SKIP();
+
+ BinaryFunction *BF = BC->createInjectedBinaryFunction("BF", true);
+ std::unique_ptr<BinaryBasicBlock> BB = BF->createBasicBlock();
+ std::unique_ptr<BinaryBasicBlock> TargetBB = BF->createBasicBlock();
+ BB->addSuccessor(TargetBB.get());
+
+ // cbgt x0, #0, target
+ MCInst NeedsImmInc = MCInstBuilder(AArch64::CBGTXri)
+ .addReg(AArch64::X0)
+ .addImm(0)
+ .addExpr(MCSymbolRefExpr::create(TargetBB->getLabel(), *BC->Ctx.get()));
+ BB->addInstruction(NeedsImmInc);
+ // cblo x0, #1, target
+ MCInst NeedsImmDec = MCInstBuilder(AArch64::CBLOXri)
+ .addReg(AArch64::X0)
+ .addImm(1)
+ .addExpr(MCSymbolRefExpr::create(TargetBB->getLabel(), *BC->Ctx.get()));
+ BB->addInstruction(NeedsImmDec);
+ // cbge x0, x1, target
+ MCInst NeedsRegSwap = MCInstBuilder(AArch64::CBGEXrr)
+ .addReg(AArch64::X0)
+ .addReg(AArch64::X1)
+ .addExpr(MCSymbolRefExpr::create(TargetBB->getLabel(), *BC->Ctx.get()));
+ BB->addInstruction(NeedsRegSwap);
+ // cbgt x0, #63, target
+ MCInst Irreversible = MCInstBuilder(AArch64::CBGTXri)
+ .addReg(AArch64::X0)
+ .addImm(63)
+ .addExpr(MCSymbolRefExpr::create(TargetBB->getLabel(), *BC->Ctx.get()));
+ BB->addInstruction(Irreversible);
+
+ auto II = BB->begin();
+ ASSERT_TRUE(BC->MIB->isReversibleBranch(*II));
+ BC->MIB->reverseBranchCondition(*II, TargetBB->getLabel(), BC->Ctx.get());
+ // cblt x0, #1, target
+ ASSERT_EQ(II->getOpcode(), AArch64::CBLTXri);
+ ASSERT_EQ(II->getOperand(1).getImm(), 1);
+ II++;
+ ASSERT_TRUE(BC->MIB->isReversibleBranch(*II));
+ BC->MIB->reverseBranchCondition(*II, TargetBB->getLabel(), BC->Ctx.get());
+ // cbhi x0, #0, target
+ ASSERT_EQ(II->getOpcode(), AArch64::CBHIXri);
+ ASSERT_EQ(II->getOperand(1).getImm(), 0);
+ II++;
+ ASSERT_TRUE(BC->MIB->isReversibleBranch(*II));
+ BC->MIB->reverseBranchCondition(*II, TargetBB->getLabel(), BC->Ctx.get());
+ // cbgt x1, x0, target
+ ASSERT_EQ(II->getOpcode(), AArch64::CBGTXrr);
+ ASSERT_EQ(II->getOperand(0).getReg(), AArch64::X1);
+ ASSERT_EQ(II->getOperand(1).getReg(), AArch64::X0);
+ II++;
+ ASSERT_FALSE(BC->MIB->isReversibleBranch(*II));
+}
+
TEST_P(MCPlusBuilderTester, AArch64_CmpJE) {
if (GetParam() != Triple::aarch64)
GTEST_SKIP();
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