[lld] [ELF] Add target-specific relocation scanning for AArch64 (PR #181099)

[Fangrui Song via llvm-commits]

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@@ -539,20 +539,22 @@ static void implementPatch(Ctx &ctx, uint64_t adrpAddr, uint64_t patcheeOffset,
   // Case 1: R_AARCH64_JUMP26 branch relocation. We have already patched this
   // instance of the erratum on a previous patch and altered the relocation. We
   // have nothing more to do.
-  // Case 2: A TLS Relaxation R_RELAX_TLS_IE_TO_LE. In this case the ADRP that
-  // we read will be transformed into a MOVZ later so we actually don't match
-  // the sequence and have nothing more to do.
-  // Case 3: A load/store register (unsigned immediate) class relocation. There
-  // are two of these R_AARCH_LD64_ABS_LO12_NC and R_AARCH_LD64_GOT_LO12_NC and
-  // they are both absolute. We need to add the same relocation to the patch,
-  // and replace the relocation with a R_AARCH_JUMP26 branch relocation.
-  // Case 4: No relocation. We must create a new R_AARCH64_JUMP26 branch
-  // relocation at the offset.
+  // Case 2: A TLS IE to LE optimization. In this case the ADRP that we read
+  // will be transformed into a MOVZ later so we actually don't match the
+  // sequence and have nothing more to do. Case 3: A load/store register
+  // (unsigned immediate) class relocation. There are two of these
+  // R_AARCH_LD64_ABS_LO12_NC and R_AARCH_LD64_GOT_LO12_NC and they are both
+  // absolute. We need to add the same relocation to the patch, and replace the
+  // relocation with a R_AARCH_JUMP26 branch relocation. Case 4: No relocation.
+  // We must create a new R_AARCH64_JUMP26 branch relocation at the offset.
   auto relIt = llvm::find_if(isec->relocs(), [=](const Relocation &r) {
     return r.offset == patcheeOffset;
   });
   if (relIt != isec->relocs().end() &&
-      (relIt->type == R_AARCH64_JUMP26 || relIt->expr == R_RELAX_TLS_IE_TO_LE))
+      (relIt->type == R_AARCH64_JUMP26 ||
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MaskRay wrote:

done

https://github.com/llvm/llvm-project/pull/181099