[llvm] [SDAG] SetCC: remove spurious extensions (PR #173110)

[via llvm-commits]

================
@@ -14148,6 +14148,34 @@ SDValue DAGCombiner::visitSETCC(SDNode *N) {
       }
     }
   }
+
+  // (setcc (zext a), (zext b), setu??) -> (setcc a, b, setu??)
+  // (setcc (sext a), (sext b), sets??) -> (setcc a, b, sets??)
+  if ((ISD::isUnsignedIntSetCC(Cond) && N0.getOpcode() == ISD::ZERO_EXTEND &&
+       N1.getOpcode() == ISD::ZERO_EXTEND) ||
+      (ISD::isSignedIntSetCC(Cond) && N0.getOpcode() == ISD::SIGN_EXTEND &&
+       N1.getOpcode() == ISD::SIGN_EXTEND)) {
+    SDValue LHS = N0.getOperand(0), RHS = N1.getOperand(0);
+    EVT SmallVT =
+        LHS.getScalarValueSizeInBits() > RHS.getScalarValueSizeInBits()
+            ? LHS.getValueType()
+            : RHS.getValueType();
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DaKnig wrote:

They do not need to be the same type. Consider if you have 
`(setcc (i32 (zext i8: a)), (i32 (zext i16: b)))` 
which can become 
`(setcc (i16 (zext i8: a)), b)` thus potentially reducing the number of extends required and the type to which we promote, in the case when z/sext is not free.

https://github.com/llvm/llvm-project/pull/173110