[llvm] feat: add GlobalISel combine (PR #181486)

Luisa Cicolini via llvm-commits llvm-commits at lists.llvm.org
Sat Feb 14 08:17:11 PST 2026


https://github.com/luisacicolini created https://github.com/llvm/llvm-project/pull/181486

None

>From f0ba0f871ca98fe80eecf950ca2bc9231ed2b86b Mon Sep 17 00:00:00 2001
From: luisacicolini <luisacicolini at gmail.com>
Date: Sat, 14 Feb 2026 16:16:05 +0000
Subject: [PATCH] chore: test

---
 .../GlobalISel/GIMatchTableExecutorImpl.h     | 22 ++++++-
 .../include/llvm/Target/GlobalISel/Combine.td | 45 +++++++++----
 .../AArch64/GlobalISel/combine-integer.mir    | 66 ++++++++++++++++---
 3 files changed, 108 insertions(+), 25 deletions(-)

diff --git a/llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutorImpl.h b/llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutorImpl.h
index 8f6586e79d78a..05a312a0c0812 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutorImpl.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutorImpl.h
@@ -35,6 +35,7 @@
 #include <cassert>
 #include <cstddef>
 #include <cstdint>
+#include <cstdio>
 
 namespace llvm {
 
@@ -49,6 +50,8 @@ bool GIMatchTableExecutor::executeMatchTable(
     const TargetRegisterInfo &TRI, const RegisterBankInfo &RBI,
     const PredicateBitset &AvailableFeatures,
     CodeGenCoverage *CoverageInfo) const {
+  
+  printf("\nHALO\n");
 
   uint64_t CurrentIdx = 0;
   SmallVector<uint64_t, 4> OnFailResumeAt;
@@ -215,7 +218,7 @@ bool GIMatchTableExecutor::executeMatchTable(
 
       assert(State.MIs[InsnID] != nullptr && "Used insn before defined");
       unsigned Opcode = State.MIs[InsnID]->getOpcode();
-
+      
       DEBUG_WITH_TYPE(TgtExecutor::getName(), {
         dbgs() << CurrentIdx << ": GIM_CheckOpcode(MIs[" << InsnID
                << "], ExpectedOpcode=" << Expected0;
@@ -230,6 +233,7 @@ bool GIMatchTableExecutor::executeMatchTable(
       }
       break;
     }
+    
     case GIM_SwitchOpcode: {
       uint64_t InsnID = readULEB();
       uint16_t LowerBound = readU16();
@@ -460,6 +464,7 @@ bool GIMatchTableExecutor::executeMatchTable(
       // Note: we don't check for invalid here because this is purely a hook to
       // allow some executors (such as the combiner) to check arbitrary,
       // contextless predicates, such as whether a rule is enabled or not.
+      
       uint16_t Predicate = readU16();
       DEBUG_WITH_TYPE(TgtExecutor::getName(),
                       dbgs() << CurrentIdx
@@ -1151,6 +1156,9 @@ bool GIMatchTableExecutor::executeMatchTable(
     }
 
     case GIR_CopySubReg: {
+      
+      printf("\nGIR_CopySubReg\n");
+      
       uint64_t NewInsnID = readULEB();
       uint64_t OldInsnID = readULEB();
       uint64_t OpIdx = readULEB();
@@ -1259,6 +1267,9 @@ bool GIMatchTableExecutor::executeMatchTable(
     case GIR_AddSimpleTempRegister:
     case GIR_AddTempRegister:
     case GIR_AddTempSubRegister: {
+      
+      printf("\nGIR_AddTempSubRegister\n");
+      
       uint64_t InsnID = readULEB();
       uint64_t TempRegID = readULEB();
       RegState TempRegFlags = {};
@@ -1323,6 +1334,9 @@ bool GIMatchTableExecutor::executeMatchTable(
       break;
     }
     case GIR_ComplexSubOperandRenderer: {
+      
+      printf("\nGIR_ComplexSubOperandRenderer\n");
+      
       uint64_t InsnID = readULEB();
       uint16_t RendererID = readU16();
       uint64_t RenderOpID = readULEB();
@@ -1336,6 +1350,9 @@ bool GIMatchTableExecutor::executeMatchTable(
       break;
     }
     case GIR_ComplexSubOperandSubRegRenderer: {
+      
+      printf("\nGIR_ComplexSubOperandSubRegRenderer\n");
+      
       uint64_t InsnID = readULEB();
       uint16_t RendererID = readU16();
       uint64_t RenderOpID = readULEB();
@@ -1455,6 +1472,9 @@ bool GIMatchTableExecutor::executeMatchTable(
 
     case GIR_RootConstrainSelectedInstOperands:
     case GIR_ConstrainSelectedInstOperands: {
+      
+      printf("GIR_ConstrainSelectedInstOperands at index %lu\n", CurrentIdx);
+      
       uint64_t InsnID = (MatcherOpcode == GIR_RootConstrainSelectedInstOperands)
                             ? 0
                             : readULEB();
diff --git a/llvm/include/llvm/Target/GlobalISel/Combine.td b/llvm/include/llvm/Target/GlobalISel/Combine.td
index f5c940bffc8fb..697d70cfda7d1 100644
--- a/llvm/include/llvm/Target/GlobalISel/Combine.td
+++ b/llvm/include/llvm/Target/GlobalISel/Combine.td
@@ -1879,6 +1879,22 @@ def APlusBMinusCMinusB : GICombineRule<
           (G_SUB $root, $add1, $B)),
    (apply (G_SUB $root, $A, $C))>;
 
+// fold ((A+(B+C))-B) -> A+C
+def APlusBPlusCMinusB_frags : GICombinePatFrag<
+  (outs root:$root), (ins $x, $y, $n),
+  [
+    (pattern (G_ADD $add1, $y, $n),
+              (G_ADD $add2, $x, $add1),
+              (G_SUB $root, $add2, $y),
+             [{ return MRI.hasOneNonDBGUse(${add2}.getReg()) &&
+                       MRI.hasOneNonDBGUse(${add1}.getReg()); }]),
+  ]>;
+
+def APlusBPlusCMinusB : GICombineRule<
+  (defs root:$root),
+  (match (APlusBPlusCMinusB_frags $root, $x, $y, $n)),
+  (apply (G_ADD $root, $x, $n))>;
+
 // fold ((A-(B-C))-C) -> A-B
 def AMinusBMinusCMinusC : GICombineRule<
     (defs root:$root),
@@ -1999,20 +2015,21 @@ def AMinusC1PlusC2: GICombineRule<
 
 def integer_reassoc_combines: GICombineGroup<[
   APlusBMinusCMinusB,
-  AMinusBMinusCMinusC,
-  ZeroMinusAPlusB,
-  APlusZeroMinusB,
-  APlusBMinusB,
-  BMinusAPlusA,
-  AMinusBPlusCMinusA,
-  AMinusBPlusBMinusC,
-  APlusBMinusAplusC,
-  APlusBMinusCPlusA,
-  APlusC1MinusC2,
-  C2MinusAPlusC1,
-  AMinusC1MinusC2,
-  C1Minus2MinusC2,
-  AMinusC1PlusC2
+  APlusBPlusCMinusB,
+  // AMinusBMinusCMinusC,
+  // ZeroMinusAPlusB,
+  // APlusZeroMinusB,
+  // APlusBMinusB,
+  // BMinusAPlusA,
+  // AMinusBPlusCMinusA,
+  // AMinusBPlusBMinusC,
+  // APlusBMinusAplusC,
+  // APlusBMinusCPlusA,
+  // APlusC1MinusC2,
+  // C2MinusAPlusC1,
+  // AMinusC1MinusC2,
+  // C1Minus2MinusC2,
+  // AMinusC1PlusC2
 ]>;
 
 // fold (A+(shl (0-B), C)) -> (A-(shl B, C))
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/combine-integer.mir b/llvm/test/CodeGen/AArch64/GlobalISel/combine-integer.mir
index c9b24ad75ce27..2693caad43d21 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/combine-integer.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/combine-integer.mir
@@ -35,7 +35,10 @@ body:             |
     ; CHECK-NEXT: {{  $}}
     ; CHECK-NEXT: %a:_(s64) = COPY $x0
     ; CHECK-NEXT: %b:_(s64) = COPY $x1
-    ; CHECK-NEXT: %sub:_(s64) = G_SUB %a, %b
+    ; CHECK-NEXT: %c:_(s64) = COPY $x2
+    ; CHECK-NEXT: %sub1:_(s64) = G_SUB %b, %c
+    ; CHECK-NEXT: %sub2:_(s64) = G_SUB %a, %sub1
+    ; CHECK-NEXT: %sub:_(s64) = G_SUB %sub2, %c
     ; CHECK-NEXT: $x0 = COPY %sub(s64)
     ; CHECK-NEXT: RET_ReallyLR implicit $x0
     %a:_(s64) = COPY $x0
@@ -175,9 +178,12 @@ body:             |
     ; CHECK-LABEL: name: AMinusBPlusCMinusA
     ; CHECK: liveins: $w0, $w1
     ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: %a:_(s64) = COPY $x0
     ; CHECK-NEXT: %b:_(s64) = COPY $x1
     ; CHECK-NEXT: %c:_(s64) = COPY $x2
-    ; CHECK-NEXT: %add:_(s64) = G_SUB %c, %b
+    ; CHECK-NEXT: %sub2:_(s64) = G_SUB %c, %a
+    ; CHECK-NEXT: %sub1:_(s64) = G_SUB %a, %b
+    ; CHECK-NEXT: %add:_(s64) = G_ADD %sub1, %sub2
     ; CHECK-NEXT: $x0 = COPY %add(s64)
     ; CHECK-NEXT: RET_ReallyLR implicit $x0
     %a:_(s64) = COPY $x0
@@ -201,8 +207,11 @@ body:             |
     ; CHECK: liveins: $w0, $w1
     ; CHECK-NEXT: {{  $}}
     ; CHECK-NEXT: %a:_(s64) = COPY $x0
+    ; CHECK-NEXT: %b:_(s64) = COPY $x1
     ; CHECK-NEXT: %c:_(s64) = COPY $x2
-    ; CHECK-NEXT: %add:_(s64) = G_SUB %a, %c
+    ; CHECK-NEXT: %sub2:_(s64) = G_SUB %b, %c
+    ; CHECK-NEXT: %sub1:_(s64) = G_SUB %a, %b
+    ; CHECK-NEXT: %add:_(s64) = G_ADD %sub1, %sub2
     ; CHECK-NEXT: $x0 = COPY %add(s64)
     ; CHECK-NEXT: RET_ReallyLR implicit $x0
     %a:_(s64) = COPY $x0
@@ -226,9 +235,12 @@ body:             |
     ; CHECK-LABEL: name: APlusBMinusAplusC
     ; CHECK: liveins: $w0, $w1
     ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: %a:_(s64) = COPY $x0
     ; CHECK-NEXT: %b:_(s64) = COPY $x1
     ; CHECK-NEXT: %c:_(s64) = COPY $x2
-    ; CHECK-NEXT: %add:_(s64) = G_SUB %b, %c
+    ; CHECK-NEXT: %add1:_(s64) = G_ADD %a, %c
+    ; CHECK-NEXT: %sub1:_(s64) = G_SUB %b, %add1
+    ; CHECK-NEXT: %add:_(s64) = G_ADD %a, %sub1
     ; CHECK-NEXT: $x0 = COPY %add(s64)
     ; CHECK-NEXT: RET_ReallyLR implicit $x0
     %a:_(s64) = COPY $x0
@@ -251,9 +263,12 @@ body:             |
     ; CHECK-LABEL: name: APlusBMinusCPlusA
     ; CHECK: liveins: $w0, $w1
     ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: %a:_(s64) = COPY $x0
     ; CHECK-NEXT: %b:_(s64) = COPY $x1
     ; CHECK-NEXT: %c:_(s64) = COPY $x2
-    ; CHECK-NEXT: %add:_(s64) = G_SUB %b, %c
+    ; CHECK-NEXT: %add1:_(s64) = G_ADD %c, %a
+    ; CHECK-NEXT: %sub1:_(s64) = G_SUB %b, %add1
+    ; CHECK-NEXT: %add:_(s64) = G_ADD %a, %sub1
     ; CHECK-NEXT: $x0 = COPY %add(s64)
     ; CHECK-NEXT: RET_ReallyLR implicit $x0
     %a:_(s64) = COPY $x0
@@ -279,9 +294,12 @@ body:             |
     ; CHECK-NEXT: %a1:_(s64) = COPY $x0
     ; CHECK-NEXT: %b1:_(s64) = COPY $x1
     ; CHECK-NEXT: %c1:_(s64) = COPY $x2
+    ; CHECK-NEXT: %a:_(<2 x s64>) = G_BUILD_VECTOR %a1(s64), %b1(s64)
     ; CHECK-NEXT: %b:_(<2 x s64>) = G_BUILD_VECTOR %b1(s64), %ba:_(s64)
     ; CHECK-NEXT: %c:_(<2 x s64>) = G_BUILD_VECTOR %a1(s64), %c1(s64)
-    ; CHECK-NEXT: %add:_(<2 x s64>) = G_SUB %b, %c
+    ; CHECK-NEXT: %add1:_(<2 x s64>) = G_ADD %c, %a
+    ; CHECK-NEXT: %sub1:_(<2 x s64>) = G_SUB %b, %add1
+    ; CHECK-NEXT: %add:_(<2 x s64>) = G_ADD %a, %sub1
     ; CHECK-NEXT: $q0 = COPY %add(<2 x s64>)
     ; CHECK-NEXT: RET_ReallyLR implicit $x0
     %a1:_(s64) = COPY $x0
@@ -331,8 +349,10 @@ body:             |
     ; CHECK: liveins: $w0, $w1
     ; CHECK-NEXT: {{  $}}
     ; CHECK-NEXT: %a:_(s64) = COPY $x0
-    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 5
-    ; CHECK-NEXT: %sub:_(s64) = G_SUB [[C]], %a
+    ; CHECK-NEXT: %c1:_(s64) = G_CONSTANT i64 4
+    ; CHECK-NEXT: %c2:_(s64) = G_CONSTANT i64 9
+    ; CHECK-NEXT: %add:_(s64) = G_ADD %a, %c1
+    ; CHECK-NEXT: %sub:_(s64) = G_SUB %c2, %add
     ; CHECK-NEXT: $x0 = COPY %sub(s64)
     ; CHECK-NEXT: RET_ReallyLR implicit $x0
     %a:_(s64) = COPY $x0
@@ -377,8 +397,10 @@ body:             |
     ; CHECK: liveins: $w0, $w1
     ; CHECK-NEXT: {{  $}}
     ; CHECK-NEXT: %a:_(s64) = COPY $x0
-    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -49
-    ; CHECK-NEXT: %sub:_(s64) = G_SUB [[C]], %a
+    ; CHECK-NEXT: %c1:_(s64) = G_CONSTANT i64 11
+    ; CHECK-NEXT: %sub1:_(s64) = G_SUB %c1, %a
+    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -60
+    ; CHECK-NEXT: %sub:_(s64) = G_ADD %sub1, [[C]]
     ; CHECK-NEXT: $x0 = COPY %sub(s64)
     ; CHECK-NEXT: RET_ReallyLR implicit $x0
     %a:_(s64) = COPY $x0
@@ -413,3 +435,27 @@ body:             |
     $x0 = COPY %add
     RET_ReallyLR implicit $x0
 
+...
+---
+name:   APlusBPlusCMinusB
+body:             |
+  bb.0:
+    liveins: $w0, $w1
+
+    ; CHECK-LABEL: name: APlusBPlusCMinusB
+    ; CHECK: liveins: $w0, $w1
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: %a:_(s64) = COPY $x0
+    ; CHECK-NEXT: %c:_(s64) = COPY $x2
+    ; CHECK-NEXT: %sub1:_(s64) = G_ADD %a, %c
+    ; CHECK-NEXT: $x0 = COPY %sub1(s64)
+    ; CHECK-NEXT: RET_ReallyLR implicit $x0
+    %a:_(s64) = COPY $x0
+    %b:_(s64) = COPY $x1
+    %c:_(s64) = COPY $x2
+    %add1:_(s64) = G_ADD %b, %c
+    %add2:_(s64) = G_ADD %a, %add1
+    %sub1:_(s64) = G_SUB %add2, %b
+    $x0 = COPY %sub1
+    RET_ReallyLR implicit $x0
+



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