[llvm] [CostModel][X86] getShuffleCost - SK_Transpose v4f64/v4i64 matches UNPCK - don't generalise to SK_PermuteTwoSrc (PR #180514)
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Mon Feb 9 05:37:13 PST 2026
https://github.com/RKSimon updated https://github.com/llvm/llvm-project/pull/180514
>From cf0a10b6c3acac918af2095d0ab13d7cb9917e5c Mon Sep 17 00:00:00 2001
From: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: Mon, 9 Feb 2026 12:47:45 +0000
Subject: [PATCH] [CostModel][X86] getShuffleCost - SK_Transpose v4f64/v4i64
matches UNPCK - don't generalise to SK_PermuteTwoSrc
Other SK_Transpose shuffles can be cheaper than SK_PermuteTwoSrc but this is the easy one to handle
Fixes #161980
---
.../lib/Target/X86/X86TargetTransformInfo.cpp | 9 +++-
.../CostModel/X86/shuffle-transpose.ll | 12 ++---
.../VectorCombine/X86/shuffle-of-shuffles.ll | 46 ++++++++-----------
3 files changed, 32 insertions(+), 35 deletions(-)
diff --git a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
index e4ef221e53b12..96541daaeef8e 100644
--- a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
+++ b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
@@ -1566,7 +1566,8 @@ InstructionCost X86TTIImpl::getShuffleCost(TTI::ShuffleKind Kind,
// Treat Transpose as 2-op shuffles - there's no difference in lowering.
if (Kind == TTI::SK_Transpose)
- Kind = TTI::SK_PermuteTwoSrc;
+ if (LT.second != MVT::v4f64 && LT.second != MVT::v4i64)
+ Kind = TTI::SK_PermuteTwoSrc;
if (Kind == TTI::SK_Broadcast) {
// For Broadcasts we are splatting the first element from the first input
@@ -1974,6 +1975,9 @@ InstructionCost X86TTIImpl::getShuffleCost(TTI::ShuffleKind Kind,
{ TTI::SK_PermuteSingleSrc, MVT::v16f16, { 1, 1, 1, 1 } }, // vpshufb
{ TTI::SK_PermuteSingleSrc, MVT::v32i8, { 1, 1, 1, 1 } }, // vpshufb
+ { TTI::SK_Transpose, MVT::v4f64, { 1, 1, 1, 1 } }, // vshufpd/vunpck
+ { TTI::SK_Transpose, MVT::v4i64, { 1, 1, 1, 1 } }, // vshufpd/vunpck
+
{ TTI::SK_PermuteTwoSrc, MVT::v4f64, { 2, 2, 2, 2 } }, // 2*vshufpd + vblendpd
{ TTI::SK_PermuteTwoSrc, MVT::v8f32, { 2, 2, 2, 2 } }, // 2*vshufps + vblendps
{ TTI::SK_PermuteTwoSrc, MVT::v4i64, { 2, 2, 2, 2 } }, // 2*vpshufd + vpblendd
@@ -2078,6 +2082,9 @@ InstructionCost X86TTIImpl::getShuffleCost(TTI::ShuffleKind Kind,
{ TTI::SK_PermuteSingleSrc, MVT::v32i8, { 4, 4, 4, 4 } }, // vextractf128 + 2*pshufb
// + vpor + vinsertf128
+ { TTI::SK_Transpose, MVT::v4f64, { 1, 1, 1, 1 } }, // vshufpd/vunpck
+ { TTI::SK_Transpose, MVT::v4i64, { 1, 1, 1, 1 } }, // vshufpd/vunpck
+
{ TTI::SK_PermuteTwoSrc, MVT::v4f64, { 2, 2, 2, 2 } }, // 2*vshufpd + vblendpd
{ TTI::SK_PermuteTwoSrc, MVT::v8f32, { 2, 2, 2, 2 } }, // 2*vshufps + vblendps
{ TTI::SK_PermuteTwoSrc, MVT::v4i64, { 2, 2, 2, 2 } }, // 2*vpermilpd + vblendpd
diff --git a/llvm/test/Analysis/CostModel/X86/shuffle-transpose.ll b/llvm/test/Analysis/CostModel/X86/shuffle-transpose.ll
index c2e1e9213fcc3..44d3a7c1e81dd 100644
--- a/llvm/test/Analysis/CostModel/X86/shuffle-transpose.ll
+++ b/llvm/test/Analysis/CostModel/X86/shuffle-transpose.ll
@@ -25,13 +25,13 @@ define void @test_vXf64(<2 x double> %a128, <2 x double> %b128, <4 x double> %a2
;
; AVX-LABEL: 'test_vXf64'
; AVX-NEXT: Cost Model: Found costs of 1 for: %V128 = shufflevector <2 x double> %a128, <2 x double> %b128, <2 x i32> <i32 0, i32 2>
-; AVX-NEXT: Cost Model: Found costs of 2 for: %V256 = shufflevector <4 x double> %a256, <4 x double> %b256, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
-; AVX-NEXT: Cost Model: Found costs of 4 for: %V512 = shufflevector <8 x double> %a512, <8 x double> %b512, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
+; AVX-NEXT: Cost Model: Found costs of 1 for: %V256 = shufflevector <4 x double> %a256, <4 x double> %b256, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
+; AVX-NEXT: Cost Model: Found costs of 2 for: %V512 = shufflevector <8 x double> %a512, <8 x double> %b512, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
; AVX-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void
;
; AVX512-LABEL: 'test_vXf64'
; AVX512-NEXT: Cost Model: Found costs of RThru:1 CodeSize:1 Lat:3 SizeLat:1 for: %V128 = shufflevector <2 x double> %a128, <2 x double> %b128, <2 x i32> <i32 0, i32 2>
-; AVX512-NEXT: Cost Model: Found costs of RThru:1 CodeSize:1 Lat:3 SizeLat:1 for: %V256 = shufflevector <4 x double> %a256, <4 x double> %b256, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
+; AVX512-NEXT: Cost Model: Found costs of 1 for: %V256 = shufflevector <4 x double> %a256, <4 x double> %b256, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
; AVX512-NEXT: Cost Model: Found costs of RThru:1 CodeSize:1 Lat:3 SizeLat:1 for: %V512 = shufflevector <8 x double> %a512, <8 x double> %b512, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
; AVX512-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void
;
@@ -50,13 +50,13 @@ define void @test_vXi64(<2 x i64> %a128, <2 x i64> %b128, <4 x i64> %a256, <4 x
;
; AVX-LABEL: 'test_vXi64'
; AVX-NEXT: Cost Model: Found costs of 1 for: %V128 = shufflevector <2 x i64> %a128, <2 x i64> %b128, <2 x i32> <i32 0, i32 2>
-; AVX-NEXT: Cost Model: Found costs of 2 for: %V256 = shufflevector <4 x i64> %a256, <4 x i64> %b256, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
-; AVX-NEXT: Cost Model: Found costs of 4 for: %V512 = shufflevector <8 x i64> %a512, <8 x i64> %b512, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
+; AVX-NEXT: Cost Model: Found costs of 1 for: %V256 = shufflevector <4 x i64> %a256, <4 x i64> %b256, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
+; AVX-NEXT: Cost Model: Found costs of 2 for: %V512 = shufflevector <8 x i64> %a512, <8 x i64> %b512, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
; AVX-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void
;
; AVX512-LABEL: 'test_vXi64'
; AVX512-NEXT: Cost Model: Found costs of RThru:1 CodeSize:1 Lat:3 SizeLat:1 for: %V128 = shufflevector <2 x i64> %a128, <2 x i64> %b128, <2 x i32> <i32 0, i32 2>
-; AVX512-NEXT: Cost Model: Found costs of RThru:1 CodeSize:1 Lat:3 SizeLat:1 for: %V256 = shufflevector <4 x i64> %a256, <4 x i64> %b256, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
+; AVX512-NEXT: Cost Model: Found costs of 1 for: %V256 = shufflevector <4 x i64> %a256, <4 x i64> %b256, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
; AVX512-NEXT: Cost Model: Found costs of RThru:1 CodeSize:1 Lat:3 SizeLat:1 for: %V512 = shufflevector <8 x i64> %a512, <8 x i64> %b512, <8 x i32> <i32 0, i32 8, i32 2, i32 10, i32 4, i32 12, i32 6, i32 14>
; AVX512-NEXT: Cost Model: Found costs of RThru:0 CodeSize:1 Lat:1 SizeLat:1 for: ret void
;
diff --git a/llvm/test/Transforms/VectorCombine/X86/shuffle-of-shuffles.ll b/llvm/test/Transforms/VectorCombine/X86/shuffle-of-shuffles.ll
index 9267016feaa81..627b1e341f86c 100644
--- a/llvm/test/Transforms/VectorCombine/X86/shuffle-of-shuffles.ll
+++ b/llvm/test/Transforms/VectorCombine/X86/shuffle-of-shuffles.ll
@@ -73,36 +73,23 @@ define <2 x float> @PR86068(<2 x float> %a0, <2 x float> %a1) {
ret <2 x float> %s2
}
-; FIXME - ensure we don't combine cheap PSHUFB+UNPCK sequence to a costly v32i8 SK_PermuteTwoSrc shuffle.
+; ensure we don't combine cheap PSHUFB+UNPCK sequence to a costly v32i8 SK_PermuteTwoSrc shuffle.
define void @PR161980(<4 x i64> %a, <4 x i64> %b, ptr %dst) {
-; SSE-LABEL: define void @PR161980(
-; SSE-SAME: <4 x i64> [[A:%.*]], <4 x i64> [[B:%.*]], ptr [[DST:%.*]]) #[[ATTR0]] {
-; SSE-NEXT: [[I:%.*]] = bitcast <4 x i64> [[A]] to <32 x i8>
-; SSE-NEXT: [[I1:%.*]] = shufflevector <32 x i8> [[I]], <32 x i8> poison, <32 x i32> <i32 0, i32 1, i32 4, i32 5, i32 8, i32 9, i32 12, i32 13, i32 2, i32 3, i32 6, i32 7, i32 10, i32 11, i32 14, i32 15, i32 16, i32 17, i32 20, i32 21, i32 24, i32 25, i32 28, i32 29, i32 18, i32 19, i32 22, i32 23, i32 26, i32 27, i32 30, i32 31>
-; SSE-NEXT: [[I2:%.*]] = bitcast <32 x i8> [[I1]] to <4 x i64>
-; SSE-NEXT: [[I3:%.*]] = bitcast <4 x i64> [[B]] to <32 x i8>
-; SSE-NEXT: [[I4:%.*]] = shufflevector <32 x i8> [[I3]], <32 x i8> poison, <32 x i32> <i32 0, i32 1, i32 4, i32 5, i32 8, i32 9, i32 12, i32 13, i32 2, i32 3, i32 6, i32 7, i32 10, i32 11, i32 14, i32 15, i32 16, i32 17, i32 20, i32 21, i32 24, i32 25, i32 28, i32 29, i32 18, i32 19, i32 22, i32 23, i32 26, i32 27, i32 30, i32 31>
-; SSE-NEXT: [[I5:%.*]] = bitcast <32 x i8> [[I4]] to <4 x i64>
-; SSE-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <4 x i64> [[I2]], <4 x i64> [[I5]], <4 x i32> <i32 0, i32 4, i32 2, i32 6>
-; SSE-NEXT: [[SHUFFLE_I9:%.*]] = shufflevector <4 x i64> [[I2]], <4 x i64> [[I5]], <4 x i32> <i32 1, i32 5, i32 3, i32 7>
-; SSE-NEXT: store <4 x i64> [[SHUFFLE_I]], ptr [[DST]], align 1
-; SSE-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds nuw i8, ptr [[DST]], i64 32
-; SSE-NEXT: store <4 x i64> [[SHUFFLE_I9]], ptr [[ADD_PTR]], align 1
-; SSE-NEXT: ret void
-;
-; AVX-LABEL: define void @PR161980(
-; AVX-SAME: <4 x i64> [[A:%.*]], <4 x i64> [[B:%.*]], ptr [[DST:%.*]]) #[[ATTR0]] {
-; AVX-NEXT: [[I:%.*]] = bitcast <4 x i64> [[A]] to <32 x i8>
-; AVX-NEXT: [[I3:%.*]] = bitcast <4 x i64> [[B]] to <32 x i8>
-; AVX-NEXT: [[TMP1:%.*]] = shufflevector <32 x i8> [[I]], <32 x i8> [[I3]], <32 x i32> <i32 0, i32 1, i32 4, i32 5, i32 8, i32 9, i32 12, i32 13, i32 32, i32 33, i32 36, i32 37, i32 40, i32 41, i32 44, i32 45, i32 16, i32 17, i32 20, i32 21, i32 24, i32 25, i32 28, i32 29, i32 48, i32 49, i32 52, i32 53, i32 56, i32 57, i32 60, i32 61>
-; AVX-NEXT: [[SHUFFLE_I:%.*]] = bitcast <32 x i8> [[TMP1]] to <4 x i64>
-; AVX-NEXT: [[TMP2:%.*]] = shufflevector <32 x i8> [[I]], <32 x i8> [[I3]], <32 x i32> <i32 2, i32 3, i32 6, i32 7, i32 10, i32 11, i32 14, i32 15, i32 34, i32 35, i32 38, i32 39, i32 42, i32 43, i32 46, i32 47, i32 18, i32 19, i32 22, i32 23, i32 26, i32 27, i32 30, i32 31, i32 50, i32 51, i32 54, i32 55, i32 58, i32 59, i32 62, i32 63>
-; AVX-NEXT: [[SHUFFLE_I9:%.*]] = bitcast <32 x i8> [[TMP2]] to <4 x i64>
-; AVX-NEXT: store <4 x i64> [[SHUFFLE_I]], ptr [[DST]], align 1
-; AVX-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds nuw i8, ptr [[DST]], i64 32
-; AVX-NEXT: store <4 x i64> [[SHUFFLE_I9]], ptr [[ADD_PTR]], align 1
-; AVX-NEXT: ret void
+; CHECK-LABEL: define void @PR161980(
+; CHECK-SAME: <4 x i64> [[A:%.*]], <4 x i64> [[B:%.*]], ptr [[DST:%.*]]) #[[ATTR0]] {
+; CHECK-NEXT: [[I:%.*]] = bitcast <4 x i64> [[A]] to <32 x i8>
+; CHECK-NEXT: [[I1:%.*]] = shufflevector <32 x i8> [[I]], <32 x i8> poison, <32 x i32> <i32 0, i32 1, i32 4, i32 5, i32 8, i32 9, i32 12, i32 13, i32 2, i32 3, i32 6, i32 7, i32 10, i32 11, i32 14, i32 15, i32 16, i32 17, i32 20, i32 21, i32 24, i32 25, i32 28, i32 29, i32 18, i32 19, i32 22, i32 23, i32 26, i32 27, i32 30, i32 31>
+; CHECK-NEXT: [[I2:%.*]] = bitcast <32 x i8> [[I1]] to <4 x i64>
+; CHECK-NEXT: [[I3:%.*]] = bitcast <4 x i64> [[B]] to <32 x i8>
+; CHECK-NEXT: [[I4:%.*]] = shufflevector <32 x i8> [[I3]], <32 x i8> poison, <32 x i32> <i32 0, i32 1, i32 4, i32 5, i32 8, i32 9, i32 12, i32 13, i32 2, i32 3, i32 6, i32 7, i32 10, i32 11, i32 14, i32 15, i32 16, i32 17, i32 20, i32 21, i32 24, i32 25, i32 28, i32 29, i32 18, i32 19, i32 22, i32 23, i32 26, i32 27, i32 30, i32 31>
+; CHECK-NEXT: [[I5:%.*]] = bitcast <32 x i8> [[I4]] to <4 x i64>
+; CHECK-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <4 x i64> [[I2]], <4 x i64> [[I5]], <4 x i32> <i32 0, i32 4, i32 2, i32 6>
+; CHECK-NEXT: [[SHUFFLE_I9:%.*]] = shufflevector <4 x i64> [[I2]], <4 x i64> [[I5]], <4 x i32> <i32 1, i32 5, i32 3, i32 7>
+; CHECK-NEXT: store <4 x i64> [[SHUFFLE_I]], ptr [[DST]], align 1
+; CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds nuw i8, ptr [[DST]], i64 32
+; CHECK-NEXT: store <4 x i64> [[SHUFFLE_I9]], ptr [[ADD_PTR]], align 1
+; CHECK-NEXT: ret void
;
%i = bitcast <4 x i64> %a to <32 x i8>
%i1 = shufflevector <32 x i8> %i, <32 x i8> poison, <32 x i32> <i32 0, i32 1, i32 4, i32 5, i32 8, i32 9, i32 12, i32 13, i32 2, i32 3, i32 6, i32 7, i32 10, i32 11, i32 14, i32 15, i32 16, i32 17, i32 20, i32 21, i32 24, i32 25, i32 28, i32 29, i32 18, i32 19, i32 22, i32 23, i32 26, i32 27, i32 30, i32 31>
@@ -118,3 +105,6 @@ define void @PR161980(<4 x i64> %a, <4 x i64> %b, ptr %dst) {
ret void
}
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; AVX: {{.*}}
+; SSE: {{.*}}
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