[llvm] [NFC] [HWAsan] Run UTC on hwasan tests (PR #181437)
Florian Mayer via llvm-commits
llvm-commits at lists.llvm.org
Fri Feb 13 15:54:28 PST 2026
https://github.com/fmayer created https://github.com/llvm/llvm-project/pull/181437
```
for x in $(grep -l 'UTC' llvm/test/Instrumentation/HWAddressSanitizer/**/*.ll); do
llvm/utils/update_test_checks.py --opt-binary build/bin/opt $x; done
```
>From 6d255d0dc46d42e96c1f8cb81d97259d908e81dc Mon Sep 17 00:00:00 2001
From: Florian Mayer <fmayer at google.com>
Date: Fri, 13 Feb 2026 15:54:13 -0800
Subject: [PATCH] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20initia?=
=?UTF-8?q?l=20version?=
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Created using spr 1.3.7
---
.../HWAddressSanitizer/RISCV/alloca.ll | 4 +-
.../RISCV/use-after-scope-setjmp.ll | 4 +-
.../HWAddressSanitizer/X86/alloca.ll | 8 +-
.../HWAddressSanitizer/X86/basic.ll | 32 ++--
.../HWAddressSanitizer/alloca-array.ll | 2 +-
.../HWAddressSanitizer/alloca-compat.ll | 2 +-
.../HWAddressSanitizer/alloca-with-calls.ll | 2 +-
.../HWAddressSanitizer/alloca.ll | 4 +-
.../HWAddressSanitizer/globals-access.ll | 2 +-
.../HWAddressSanitizer/prologue.ll | 150 +++++++++---------
.../use-after-scope-setjmp.ll | 2 +-
11 files changed, 106 insertions(+), 106 deletions(-)
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/alloca.ll b/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/alloca.ll
index edbcdbeb8516c..b739b2488db09 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/alloca.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/alloca.ll
@@ -143,7 +143,7 @@ declare void @llvm.dbg.value(metadata, metadata, metadata)
;.
; DYNAMIC-SHADOW: [[META0]] = !{ptr @hwasan.note}
; DYNAMIC-SHADOW: [[META1:![0-9]+]] = distinct !DICompileUnit(language: DW_LANG_C_plus_plus_14, file: [[META2:![0-9]+]], producer: "{{.*}}clang version {{.*}}", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: [[META3:![0-9]+]], splitDebugInlining: false, nameTableKind: None)
-; DYNAMIC-SHADOW: [[META2]] = !DIFile(filename: "alloca.cpp", directory: {{.*}})
+; DYNAMIC-SHADOW: [[META2]] = !DIFile(filename: "{{.*}}alloca.cpp", directory: {{.*}})
; DYNAMIC-SHADOW: [[META3]] = !{}
; DYNAMIC-SHADOW: [[META4:![0-9]+]] = !{i32 7, !"Dwarf Version", i32 4}
; DYNAMIC-SHADOW: [[META5:![0-9]+]] = !{i32 2, !"Debug Info Version", i32 3}
@@ -160,7 +160,7 @@ declare void @llvm.dbg.value(metadata, metadata, metadata)
;.
; ZERO-BASED-SHADOW: [[META0]] = !{ptr @hwasan.note}
; ZERO-BASED-SHADOW: [[META1:![0-9]+]] = distinct !DICompileUnit(language: DW_LANG_C_plus_plus_14, file: [[META2:![0-9]+]], producer: "{{.*}}clang version {{.*}}", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: [[META3:![0-9]+]], splitDebugInlining: false, nameTableKind: None)
-; ZERO-BASED-SHADOW: [[META2]] = !DIFile(filename: "alloca.cpp", directory: {{.*}})
+; ZERO-BASED-SHADOW: [[META2]] = !DIFile(filename: "{{.*}}alloca.cpp", directory: {{.*}})
; ZERO-BASED-SHADOW: [[META3]] = !{}
; ZERO-BASED-SHADOW: [[META4:![0-9]+]] = !{i32 7, !"Dwarf Version", i32 4}
; ZERO-BASED-SHADOW: [[META5:![0-9]+]] = !{i32 2, !"Debug Info Version", i32 3}
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/use-after-scope-setjmp.ll b/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/use-after-scope-setjmp.ll
index d2949bfb9c1b2..acea906d26b1c 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/use-after-scope-setjmp.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/RISCV/use-after-scope-setjmp.ll
@@ -46,8 +46,8 @@ define dso_local noundef i1 @_Z6targetv() sanitize_hwaddress {
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP24]], i8 [[TMP20]], i64 256, i1 false)
; CHECK-NEXT: [[CALL:%.*]] = call i32 @setjmp(ptr noundef @jbuf)
; CHECK-NEXT: switch i32 [[CALL]], label [[WHILE_BODY:%.*]] [
-; CHECK-NEXT: i32 1, label [[RETURN:%.*]]
-; CHECK-NEXT: i32 2, label [[SW_BB1:%.*]]
+; CHECK-NEXT: i32 1, label [[RETURN:%.*]]
+; CHECK-NEXT: i32 2, label [[SW_BB1:%.*]]
; CHECK-NEXT: ]
; CHECK: sw.bb1:
; CHECK-NEXT: br label [[RETURN]]
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca.ll b/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca.ll
index ef86e63aca0d6..795eea34bf98f 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/X86/alloca.ll
@@ -168,10 +168,10 @@ define i32 @test_simple(ptr %a) sanitize_hwaddress {
; INLINE-NEXT: [[TMP33:%.*]] = getelementptr i8, ptr [[TMP14]], i64 [[TMP32]]
; INLINE-NEXT: [[TMP34:%.*]] = load i8, ptr [[TMP33]], align 1
; INLINE-NEXT: [[TMP35:%.*]] = icmp ne i8 [[TMP30]], [[TMP34]]
-; INLINE-NEXT: br i1 [[TMP35]], label [[TMP36:%.*]], label [[TMP50:%.*]], !prof [[PROF1:![0-9]+]]
+; INLINE-NEXT: br i1 [[TMP35]], label [[TMP36:%.*]], label [[TMP50:%.*]], !prof [[PROF2:![0-9]+]]
; INLINE: 36:
; INLINE-NEXT: [[TMP37:%.*]] = icmp ugt i8 [[TMP34]], 15
-; INLINE-NEXT: br i1 [[TMP37]], label [[TMP38:%.*]], label [[TMP39:%.*]], !prof [[PROF1]]
+; INLINE-NEXT: br i1 [[TMP37]], label [[TMP38:%.*]], label [[TMP39:%.*]], !prof [[PROF2]]
; INLINE: 38:
; INLINE-NEXT: call void asm sideeffect "int3\0Anopl 80([[RAX:%.*]])", "{rdi}"(i64 [[TMP28]])
; INLINE-NEXT: unreachable
@@ -180,13 +180,13 @@ define i32 @test_simple(ptr %a) sanitize_hwaddress {
; INLINE-NEXT: [[TMP41:%.*]] = trunc i64 [[TMP40]] to i8
; INLINE-NEXT: [[TMP42:%.*]] = add i8 [[TMP41]], 0
; INLINE-NEXT: [[TMP43:%.*]] = icmp uge i8 [[TMP42]], [[TMP34]]
-; INLINE-NEXT: br i1 [[TMP43]], label [[TMP38]], label [[TMP44:%.*]], !prof [[PROF1]]
+; INLINE-NEXT: br i1 [[TMP43]], label [[TMP38]], label [[TMP44:%.*]], !prof [[PROF2]]
; INLINE: 44:
; INLINE-NEXT: [[TMP45:%.*]] = or i64 [[TMP31]], 15
; INLINE-NEXT: [[TMP46:%.*]] = inttoptr i64 [[TMP45]] to ptr
; INLINE-NEXT: [[TMP47:%.*]] = load i8, ptr [[TMP46]], align 1
; INLINE-NEXT: [[TMP48:%.*]] = icmp ne i8 [[TMP30]], [[TMP47]]
-; INLINE-NEXT: br i1 [[TMP48]], label [[TMP38]], label [[TMP49:%.*]], !prof [[PROF1]]
+; INLINE-NEXT: br i1 [[TMP48]], label [[TMP38]], label [[TMP49:%.*]], !prof [[PROF2]]
; INLINE: 49:
; INLINE-NEXT: br label [[TMP50]]
; INLINE: 50:
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/X86/basic.ll b/llvm/test/Instrumentation/HWAddressSanitizer/X86/basic.ll
index ebe66e0d51baa..8829bc85cd52c 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/X86/basic.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/X86/basic.ll
@@ -76,10 +76,10 @@ define i8 @test_load8(ptr %a) sanitize_hwaddress {
; ABORT-INLINE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP3]], i64 [[TMP8]]
; ABORT-INLINE-NEXT: [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 1
; ABORT-INLINE-NEXT: [[TMP11:%.*]] = icmp ne i8 [[TMP6]], [[TMP10]]
-; ABORT-INLINE-NEXT: br i1 [[TMP11]], label [[TMP12:%.*]], label [[TMP26:%.*]], !prof [[PROF1:![0-9]+]]
+; ABORT-INLINE-NEXT: br i1 [[TMP11]], label [[TMP12:%.*]], label [[TMP26:%.*]], !prof [[PROF2:![0-9]+]]
; ABORT-INLINE: 12:
; ABORT-INLINE-NEXT: [[TMP13:%.*]] = icmp ugt i8 [[TMP10]], 15
-; ABORT-INLINE-NEXT: br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP15:%.*]], !prof [[PROF1]]
+; ABORT-INLINE-NEXT: br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP15:%.*]], !prof [[PROF2]]
; ABORT-INLINE: 14:
; ABORT-INLINE-NEXT: call void asm sideeffect "int3\0Anopl 64([[RAX:%.*]])", "{rdi}"(i64 [[TMP4]])
; ABORT-INLINE-NEXT: unreachable
@@ -88,13 +88,13 @@ define i8 @test_load8(ptr %a) sanitize_hwaddress {
; ABORT-INLINE-NEXT: [[TMP17:%.*]] = trunc i64 [[TMP16]] to i8
; ABORT-INLINE-NEXT: [[TMP18:%.*]] = add i8 [[TMP17]], 0
; ABORT-INLINE-NEXT: [[TMP19:%.*]] = icmp uge i8 [[TMP18]], [[TMP10]]
-; ABORT-INLINE-NEXT: br i1 [[TMP19]], label [[TMP14]], label [[TMP20:%.*]], !prof [[PROF1]]
+; ABORT-INLINE-NEXT: br i1 [[TMP19]], label [[TMP14]], label [[TMP20:%.*]], !prof [[PROF2]]
; ABORT-INLINE: 20:
; ABORT-INLINE-NEXT: [[TMP21:%.*]] = or i64 [[TMP7]], 15
; ABORT-INLINE-NEXT: [[TMP22:%.*]] = inttoptr i64 [[TMP21]] to ptr
; ABORT-INLINE-NEXT: [[TMP23:%.*]] = load i8, ptr [[TMP22]], align 1
; ABORT-INLINE-NEXT: [[TMP24:%.*]] = icmp ne i8 [[TMP6]], [[TMP23]]
-; ABORT-INLINE-NEXT: br i1 [[TMP24]], label [[TMP14]], label [[TMP25:%.*]], !prof [[PROF1]]
+; ABORT-INLINE-NEXT: br i1 [[TMP24]], label [[TMP14]], label [[TMP25:%.*]], !prof [[PROF2]]
; ABORT-INLINE: 25:
; ABORT-INLINE-NEXT: br label [[TMP26]]
; ABORT-INLINE: 26:
@@ -117,10 +117,10 @@ define i8 @test_load8(ptr %a) sanitize_hwaddress {
; RECOVER-INLINE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP3]], i64 [[TMP8]]
; RECOVER-INLINE-NEXT: [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 1
; RECOVER-INLINE-NEXT: [[TMP11:%.*]] = icmp ne i8 [[TMP6]], [[TMP10]]
-; RECOVER-INLINE-NEXT: br i1 [[TMP11]], label [[TMP12:%.*]], label [[TMP26:%.*]], !prof [[PROF1:![0-9]+]]
+; RECOVER-INLINE-NEXT: br i1 [[TMP11]], label [[TMP12:%.*]], label [[TMP26:%.*]], !prof [[PROF2:![0-9]+]]
; RECOVER-INLINE: 12:
; RECOVER-INLINE-NEXT: [[TMP13:%.*]] = icmp ugt i8 [[TMP10]], 15
-; RECOVER-INLINE-NEXT: br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP15:%.*]], !prof [[PROF1]]
+; RECOVER-INLINE-NEXT: br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP15:%.*]], !prof [[PROF2]]
; RECOVER-INLINE: 14:
; RECOVER-INLINE-NEXT: call void asm sideeffect "int3\0Anopl 96([[RAX:%.*]])", "{rdi}"(i64 [[TMP4]])
; RECOVER-INLINE-NEXT: br label [[TMP25:%.*]]
@@ -129,13 +129,13 @@ define i8 @test_load8(ptr %a) sanitize_hwaddress {
; RECOVER-INLINE-NEXT: [[TMP17:%.*]] = trunc i64 [[TMP16]] to i8
; RECOVER-INLINE-NEXT: [[TMP18:%.*]] = add i8 [[TMP17]], 0
; RECOVER-INLINE-NEXT: [[TMP19:%.*]] = icmp uge i8 [[TMP18]], [[TMP10]]
-; RECOVER-INLINE-NEXT: br i1 [[TMP19]], label [[TMP14]], label [[TMP20:%.*]], !prof [[PROF1]]
+; RECOVER-INLINE-NEXT: br i1 [[TMP19]], label [[TMP14]], label [[TMP20:%.*]], !prof [[PROF2]]
; RECOVER-INLINE: 20:
; RECOVER-INLINE-NEXT: [[TMP21:%.*]] = or i64 [[TMP7]], 15
; RECOVER-INLINE-NEXT: [[TMP22:%.*]] = inttoptr i64 [[TMP21]] to ptr
; RECOVER-INLINE-NEXT: [[TMP23:%.*]] = load i8, ptr [[TMP22]], align 1
; RECOVER-INLINE-NEXT: [[TMP24:%.*]] = icmp ne i8 [[TMP6]], [[TMP23]]
-; RECOVER-INLINE-NEXT: br i1 [[TMP24]], label [[TMP14]], label [[TMP25]], !prof [[PROF1]]
+; RECOVER-INLINE-NEXT: br i1 [[TMP24]], label [[TMP14]], label [[TMP25]], !prof [[PROF2]]
; RECOVER-INLINE: 25:
; RECOVER-INLINE-NEXT: br label [[TMP26]]
; RECOVER-INLINE: 26:
@@ -286,10 +286,10 @@ define void @test_store8(ptr %a, i8 %b) sanitize_hwaddress {
; ABORT-INLINE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP3]], i64 [[TMP8]]
; ABORT-INLINE-NEXT: [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 1
; ABORT-INLINE-NEXT: [[TMP11:%.*]] = icmp ne i8 [[TMP6]], [[TMP10]]
-; ABORT-INLINE-NEXT: br i1 [[TMP11]], label [[TMP12:%.*]], label [[TMP26:%.*]], !prof [[PROF1]]
+; ABORT-INLINE-NEXT: br i1 [[TMP11]], label [[TMP12:%.*]], label [[TMP26:%.*]], !prof [[PROF2]]
; ABORT-INLINE: 12:
; ABORT-INLINE-NEXT: [[TMP13:%.*]] = icmp ugt i8 [[TMP10]], 15
-; ABORT-INLINE-NEXT: br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP15:%.*]], !prof [[PROF1]]
+; ABORT-INLINE-NEXT: br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP15:%.*]], !prof [[PROF2]]
; ABORT-INLINE: 14:
; ABORT-INLINE-NEXT: call void asm sideeffect "int3\0Anopl 80([[RAX:%.*]])", "{rdi}"(i64 [[TMP4]])
; ABORT-INLINE-NEXT: unreachable
@@ -298,13 +298,13 @@ define void @test_store8(ptr %a, i8 %b) sanitize_hwaddress {
; ABORT-INLINE-NEXT: [[TMP17:%.*]] = trunc i64 [[TMP16]] to i8
; ABORT-INLINE-NEXT: [[TMP18:%.*]] = add i8 [[TMP17]], 0
; ABORT-INLINE-NEXT: [[TMP19:%.*]] = icmp uge i8 [[TMP18]], [[TMP10]]
-; ABORT-INLINE-NEXT: br i1 [[TMP19]], label [[TMP14]], label [[TMP20:%.*]], !prof [[PROF1]]
+; ABORT-INLINE-NEXT: br i1 [[TMP19]], label [[TMP14]], label [[TMP20:%.*]], !prof [[PROF2]]
; ABORT-INLINE: 20:
; ABORT-INLINE-NEXT: [[TMP21:%.*]] = or i64 [[TMP7]], 15
; ABORT-INLINE-NEXT: [[TMP22:%.*]] = inttoptr i64 [[TMP21]] to ptr
; ABORT-INLINE-NEXT: [[TMP23:%.*]] = load i8, ptr [[TMP22]], align 1
; ABORT-INLINE-NEXT: [[TMP24:%.*]] = icmp ne i8 [[TMP6]], [[TMP23]]
-; ABORT-INLINE-NEXT: br i1 [[TMP24]], label [[TMP14]], label [[TMP25:%.*]], !prof [[PROF1]]
+; ABORT-INLINE-NEXT: br i1 [[TMP24]], label [[TMP14]], label [[TMP25:%.*]], !prof [[PROF2]]
; ABORT-INLINE: 25:
; ABORT-INLINE-NEXT: br label [[TMP26]]
; ABORT-INLINE: 26:
@@ -327,10 +327,10 @@ define void @test_store8(ptr %a, i8 %b) sanitize_hwaddress {
; RECOVER-INLINE-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP3]], i64 [[TMP8]]
; RECOVER-INLINE-NEXT: [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 1
; RECOVER-INLINE-NEXT: [[TMP11:%.*]] = icmp ne i8 [[TMP6]], [[TMP10]]
-; RECOVER-INLINE-NEXT: br i1 [[TMP11]], label [[TMP12:%.*]], label [[TMP26:%.*]], !prof [[PROF1]]
+; RECOVER-INLINE-NEXT: br i1 [[TMP11]], label [[TMP12:%.*]], label [[TMP26:%.*]], !prof [[PROF2]]
; RECOVER-INLINE: 12:
; RECOVER-INLINE-NEXT: [[TMP13:%.*]] = icmp ugt i8 [[TMP10]], 15
-; RECOVER-INLINE-NEXT: br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP15:%.*]], !prof [[PROF1]]
+; RECOVER-INLINE-NEXT: br i1 [[TMP13]], label [[TMP14:%.*]], label [[TMP15:%.*]], !prof [[PROF2]]
; RECOVER-INLINE: 14:
; RECOVER-INLINE-NEXT: call void asm sideeffect "int3\0Anopl 112([[RAX:%.*]])", "{rdi}"(i64 [[TMP4]])
; RECOVER-INLINE-NEXT: br label [[TMP25:%.*]]
@@ -339,13 +339,13 @@ define void @test_store8(ptr %a, i8 %b) sanitize_hwaddress {
; RECOVER-INLINE-NEXT: [[TMP17:%.*]] = trunc i64 [[TMP16]] to i8
; RECOVER-INLINE-NEXT: [[TMP18:%.*]] = add i8 [[TMP17]], 0
; RECOVER-INLINE-NEXT: [[TMP19:%.*]] = icmp uge i8 [[TMP18]], [[TMP10]]
-; RECOVER-INLINE-NEXT: br i1 [[TMP19]], label [[TMP14]], label [[TMP20:%.*]], !prof [[PROF1]]
+; RECOVER-INLINE-NEXT: br i1 [[TMP19]], label [[TMP14]], label [[TMP20:%.*]], !prof [[PROF2]]
; RECOVER-INLINE: 20:
; RECOVER-INLINE-NEXT: [[TMP21:%.*]] = or i64 [[TMP7]], 15
; RECOVER-INLINE-NEXT: [[TMP22:%.*]] = inttoptr i64 [[TMP21]] to ptr
; RECOVER-INLINE-NEXT: [[TMP23:%.*]] = load i8, ptr [[TMP22]], align 1
; RECOVER-INLINE-NEXT: [[TMP24:%.*]] = icmp ne i8 [[TMP6]], [[TMP23]]
-; RECOVER-INLINE-NEXT: br i1 [[TMP24]], label [[TMP14]], label [[TMP25]], !prof [[PROF1]]
+; RECOVER-INLINE-NEXT: br i1 [[TMP24]], label [[TMP14]], label [[TMP25]], !prof [[PROF2]]
; RECOVER-INLINE: 25:
; RECOVER-INLINE-NEXT: br label [[TMP26]]
; RECOVER-INLINE: 26:
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/alloca-array.ll b/llvm/test/Instrumentation/HWAddressSanitizer/alloca-array.ll
index 9064d5ca8df4e..c4d571c443ba7 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/alloca-array.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/alloca-array.ll
@@ -13,7 +13,7 @@ define void @test_alloca() sanitize_hwaddress {
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8
; CHECK-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
-; CHECK-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]])
+; CHECK-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META2:![0-9]+]])
; CHECK-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
; CHECK-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/alloca-compat.ll b/llvm/test/Instrumentation/HWAddressSanitizer/alloca-compat.ll
index aae2946cbb190..74177019d73e8 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/alloca-compat.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/alloca-compat.ll
@@ -15,7 +15,7 @@ define void @test_alloca() sanitize_hwaddress {
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[TMP1]], i32 48
; CHECK-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP2]], align 8
; CHECK-NEXT: [[TMP4:%.*]] = ashr i64 [[TMP3]], 3
-; CHECK-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]])
+; CHECK-NEXT: [[TMP5:%.*]] = call i64 @llvm.read_register.i64(metadata [[META2:![0-9]+]])
; CHECK-NEXT: [[TMP6:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
; CHECK-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[TMP6]] to i64
; CHECK-NEXT: [[TMP8:%.*]] = shl i64 [[TMP7]], 44
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/alloca-with-calls.ll b/llvm/test/Instrumentation/HWAddressSanitizer/alloca-with-calls.ll
index 9ef624c0b7f75..94b40d5bdcf1e 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/alloca-with-calls.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/alloca-with-calls.ll
@@ -16,7 +16,7 @@ define void @test_alloca() sanitize_hwaddress {
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 48
; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[TMP1]], align 8
; CHECK-NEXT: [[TMP3:%.*]] = ashr i64 [[TMP2]], 3
-; CHECK-NEXT: [[TMP4:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]])
+; CHECK-NEXT: [[TMP4:%.*]] = call i64 @llvm.read_register.i64(metadata [[META2:![0-9]+]])
; CHECK-NEXT: [[TMP5:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[TMP5]] to i64
; CHECK-NEXT: [[TMP7:%.*]] = shl i64 [[TMP6]], 44
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/alloca.ll b/llvm/test/Instrumentation/HWAddressSanitizer/alloca.ll
index f4f5e66549fe1..4ed068222cc24 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/alloca.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/alloca.ll
@@ -160,7 +160,7 @@ declare void @llvm.dbg.value(metadata, metadata, metadata)
;.
; DYNAMIC-SHADOW: [[META0]] = !{ptr @hwasan.note}
; DYNAMIC-SHADOW: [[META1:![0-9]+]] = distinct !DICompileUnit(language: DW_LANG_C_plus_plus_14, file: [[META2:![0-9]+]], producer: "{{.*}}clang version {{.*}}", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: [[META3:![0-9]+]], splitDebugInlining: false, nameTableKind: None)
-; DYNAMIC-SHADOW: [[META2]] = !DIFile(filename: "alloca.cpp", directory: {{.*}})
+; DYNAMIC-SHADOW: [[META2]] = !DIFile(filename: "{{.*}}alloca.cpp", directory: {{.*}})
; DYNAMIC-SHADOW: [[META3]] = !{}
; DYNAMIC-SHADOW: [[META4:![0-9]+]] = !{i32 7, !"Dwarf Version", i32 4}
; DYNAMIC-SHADOW: [[META5:![0-9]+]] = !{i32 2, !"Debug Info Version", i32 3}
@@ -177,7 +177,7 @@ declare void @llvm.dbg.value(metadata, metadata, metadata)
;.
; ZERO-BASED-SHADOW: [[META0]] = !{ptr @hwasan.note}
; ZERO-BASED-SHADOW: [[META1:![0-9]+]] = distinct !DICompileUnit(language: DW_LANG_C_plus_plus_14, file: [[META2:![0-9]+]], producer: "{{.*}}clang version {{.*}}", isOptimized: false, runtimeVersion: 0, emissionKind: FullDebug, enums: [[META3:![0-9]+]], splitDebugInlining: false, nameTableKind: None)
-; ZERO-BASED-SHADOW: [[META2]] = !DIFile(filename: "alloca.cpp", directory: {{.*}})
+; ZERO-BASED-SHADOW: [[META2]] = !DIFile(filename: "{{.*}}alloca.cpp", directory: {{.*}})
; ZERO-BASED-SHADOW: [[META3]] = !{}
; ZERO-BASED-SHADOW: [[META4:![0-9]+]] = !{i32 7, !"Dwarf Version", i32 4}
; ZERO-BASED-SHADOW: [[META5:![0-9]+]] = !{i32 2, !"Debug Info Version", i32 3}
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/globals-access.ll b/llvm/test/Instrumentation/HWAddressSanitizer/globals-access.ll
index f9040afd1c016..1be9279b788da 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/globals-access.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/globals-access.ll
@@ -32,7 +32,7 @@ define dso_local noundef i32 @_Z3tmpv() sanitize_hwaddress {
; CHECK-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[TMP2]], i64 [[TMP6]]
; CHECK-NEXT: [[TMP8:%.*]] = load i8, ptr [[TMP7]], align 1
; CHECK-NEXT: [[TMP9:%.*]] = icmp ne i8 [[TMP4]], [[TMP8]]
-; CHECK-NEXT: br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]], !prof [[PROF2:![0-9]+]]
+; CHECK-NEXT: br i1 [[TMP9]], label [[TMP10:%.*]], label [[TMP11:%.*]], !prof [[PROF3:![0-9]+]]
; CHECK: 10:
; CHECK-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP2]], ptr @x, i32 2)
; CHECK-NEXT: br label [[TMP11]]
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/prologue.ll b/llvm/test/Instrumentation/HWAddressSanitizer/prologue.ll
index 43469699db2cf..297ed3cc89bb7 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/prologue.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/prologue.ll
@@ -61,16 +61,16 @@ define i32 @test_load(ptr %a) sanitize_hwaddress {
; FUCHSIA-LABEL: define i32 @test_load
; FUCHSIA-SAME: (ptr [[A:%.*]]) #[[ATTR0:[0-9]+]] {
; FUCHSIA-NEXT: entry:
-; FUCHSIA-NEXT: [[DOTHWASAN_SHADOW:%.*]] = load ptr, ptr @__hwasan_shadow_memory_dynamic_address, align 8
-; FUCHSIA-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 2)
+; FUCHSIA-NEXT: [[TMP0:%.*]] = load ptr, ptr @__hwasan_shadow_memory_dynamic_address, align 8
+; FUCHSIA-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP0]], ptr [[A]], i32 2)
; FUCHSIA-NEXT: [[X:%.*]] = load i32, ptr [[A]], align 4
; FUCHSIA-NEXT: ret i32 [[X]]
;
; FUCHSIA-LIBCALL-LABEL: define i32 @test_load
; FUCHSIA-LIBCALL-SAME: (ptr [[A:%.*]]) #[[ATTR0:[0-9]+]] {
; FUCHSIA-LIBCALL-NEXT: entry:
-; FUCHSIA-LIBCALL-NEXT: [[DOTHWASAN_SHADOW:%.*]] = load ptr, ptr @__hwasan_shadow_memory_dynamic_address, align 8
-; FUCHSIA-LIBCALL-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[DOTHWASAN_SHADOW]], ptr [[A]], i32 2)
+; FUCHSIA-LIBCALL-NEXT: [[TMP0:%.*]] = load ptr, ptr @__hwasan_shadow_memory_dynamic_address, align 8
+; FUCHSIA-LIBCALL-NEXT: call void @llvm.hwasan.check.memaccess.shortgranules(ptr [[TMP0]], ptr [[A]], i32 2)
; FUCHSIA-LIBCALL-NEXT: [[X:%.*]] = load i32, ptr [[A]], align 4
; FUCHSIA-LIBCALL-NEXT: ret i32 [[X]]
;
@@ -92,7 +92,7 @@ define void @test_alloca() sanitize_hwaddress {
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 48
; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[TMP1]], align 8
; CHECK-NEXT: [[TMP3:%.*]] = ashr i64 [[TMP2]], 3
-; CHECK-NEXT: [[TMP4:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]])
+; CHECK-NEXT: [[TMP4:%.*]] = call i64 @llvm.read_register.i64(metadata [[META2:![0-9]+]])
; CHECK-NEXT: [[TMP5:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[TMP5]] to i64
; CHECK-NEXT: [[TMP7:%.*]] = shl i64 [[TMP6]], 44
@@ -138,7 +138,7 @@ define void @test_alloca() sanitize_hwaddress {
; NOIFUNC-TLS-HISTORY-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 48
; NOIFUNC-TLS-HISTORY-NEXT: [[TMP2:%.*]] = load i64, ptr [[TMP1]], align 8
; NOIFUNC-TLS-HISTORY-NEXT: [[TMP3:%.*]] = ashr i64 [[TMP2]], 3
-; NOIFUNC-TLS-HISTORY-NEXT: [[TMP4:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]])
+; NOIFUNC-TLS-HISTORY-NEXT: [[TMP4:%.*]] = call i64 @llvm.read_register.i64(metadata [[META2:![0-9]+]])
; NOIFUNC-TLS-HISTORY-NEXT: [[TMP5:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
; NOIFUNC-TLS-HISTORY-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[TMP5]] to i64
; NOIFUNC-TLS-HISTORY-NEXT: [[TMP7:%.*]] = shl i64 [[TMP6]], 44
@@ -273,84 +273,84 @@ define void @test_alloca() sanitize_hwaddress {
; FUCHSIA-LABEL: define void @test_alloca
; FUCHSIA-SAME: () #[[ATTR0]] personality ptr @__hwasan_personality_thunk {
; FUCHSIA-NEXT: entry:
-; FUCHSIA-NEXT: [[DOTHWASAN_SHADOW:%.*]] = load ptr, ptr @__hwasan_shadow_memory_dynamic_address, align 8
-; FUCHSIA-NEXT: [[TMP0:%.*]] = load i64, ptr @__hwasan_tls, align 8
-; FUCHSIA-NEXT: [[TMP1:%.*]] = ashr i64 [[TMP0]], 3
-; FUCHSIA-NEXT: [[TMP2:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]])
-; FUCHSIA-NEXT: [[TMP3:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
-; FUCHSIA-NEXT: [[TMP4:%.*]] = ptrtoint ptr [[TMP3]] to i64
-; FUCHSIA-NEXT: [[TMP5:%.*]] = shl i64 [[TMP4]], 44
-; FUCHSIA-NEXT: [[TMP6:%.*]] = or i64 [[TMP2]], [[TMP5]]
-; FUCHSIA-NEXT: [[TMP7:%.*]] = inttoptr i64 [[TMP0]] to ptr
-; FUCHSIA-NEXT: store i64 [[TMP6]], ptr [[TMP7]], align 8
-; FUCHSIA-NEXT: [[TMP8:%.*]] = ashr i64 [[TMP0]], 56
-; FUCHSIA-NEXT: [[TMP9:%.*]] = shl nuw nsw i64 [[TMP8]], 12
-; FUCHSIA-NEXT: [[TMP10:%.*]] = xor i64 [[TMP9]], -1
-; FUCHSIA-NEXT: [[TMP11:%.*]] = add i64 [[TMP0]], 8
-; FUCHSIA-NEXT: [[TMP12:%.*]] = and i64 [[TMP11]], [[TMP10]]
-; FUCHSIA-NEXT: store i64 [[TMP12]], ptr @__hwasan_tls, align 8
-; FUCHSIA-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP4]], 56
+; FUCHSIA-NEXT: [[TMP0:%.*]] = load ptr, ptr @__hwasan_shadow_memory_dynamic_address, align 8
+; FUCHSIA-NEXT: [[TMP1:%.*]] = load i64, ptr @__hwasan_tls, align 8
+; FUCHSIA-NEXT: [[TMP2:%.*]] = ashr i64 [[TMP1]], 3
+; FUCHSIA-NEXT: [[TMP3:%.*]] = call i64 @llvm.read_register.i64(metadata [[META2:![0-9]+]])
+; FUCHSIA-NEXT: [[TMP4:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; FUCHSIA-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[TMP4]] to i64
+; FUCHSIA-NEXT: [[TMP6:%.*]] = shl i64 [[TMP5]], 44
+; FUCHSIA-NEXT: [[TMP7:%.*]] = or i64 [[TMP3]], [[TMP6]]
+; FUCHSIA-NEXT: [[TMP8:%.*]] = inttoptr i64 [[TMP1]] to ptr
+; FUCHSIA-NEXT: store i64 [[TMP7]], ptr [[TMP8]], align 8
+; FUCHSIA-NEXT: [[TMP9:%.*]] = ashr i64 [[TMP1]], 56
+; FUCHSIA-NEXT: [[TMP10:%.*]] = shl nuw nsw i64 [[TMP9]], 12
+; FUCHSIA-NEXT: [[TMP11:%.*]] = xor i64 [[TMP10]], -1
+; FUCHSIA-NEXT: [[TMP12:%.*]] = add i64 [[TMP1]], 8
+; FUCHSIA-NEXT: [[TMP13:%.*]] = and i64 [[TMP12]], [[TMP11]]
+; FUCHSIA-NEXT: store i64 [[TMP13]], ptr @__hwasan_tls, align 8
+; FUCHSIA-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP5]], 56
; FUCHSIA-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
-; FUCHSIA-NEXT: [[TMP13:%.*]] = xor i64 [[TMP1]], 0
-; FUCHSIA-NEXT: [[TMP14:%.*]] = ptrtoint ptr [[X]] to i64
-; FUCHSIA-NEXT: [[TMP15:%.*]] = and i64 [[TMP14]], 72057594037927935
-; FUCHSIA-NEXT: [[TMP16:%.*]] = shl i64 [[TMP13]], 56
-; FUCHSIA-NEXT: [[TMP17:%.*]] = or i64 [[TMP15]], [[TMP16]]
-; FUCHSIA-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP17]] to ptr
-; FUCHSIA-NEXT: [[TMP18:%.*]] = trunc i64 [[TMP13]] to i8
-; FUCHSIA-NEXT: [[TMP19:%.*]] = ptrtoint ptr [[X]] to i64
-; FUCHSIA-NEXT: [[TMP20:%.*]] = and i64 [[TMP19]], 72057594037927935
-; FUCHSIA-NEXT: [[TMP21:%.*]] = lshr i64 [[TMP20]], 4
-; FUCHSIA-NEXT: [[TMP22:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP21]]
-; FUCHSIA-NEXT: [[TMP23:%.*]] = getelementptr i8, ptr [[TMP22]], i32 0
-; FUCHSIA-NEXT: store i8 4, ptr [[TMP23]], align 1
-; FUCHSIA-NEXT: [[TMP24:%.*]] = getelementptr i8, ptr [[X]], i32 15
-; FUCHSIA-NEXT: store i8 [[TMP18]], ptr [[TMP24]], align 1
+; FUCHSIA-NEXT: [[TMP14:%.*]] = xor i64 [[TMP2]], 0
+; FUCHSIA-NEXT: [[TMP15:%.*]] = ptrtoint ptr [[X]] to i64
+; FUCHSIA-NEXT: [[TMP16:%.*]] = and i64 [[TMP15]], 72057594037927935
+; FUCHSIA-NEXT: [[TMP17:%.*]] = shl i64 [[TMP14]], 56
+; FUCHSIA-NEXT: [[TMP18:%.*]] = or i64 [[TMP16]], [[TMP17]]
+; FUCHSIA-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP18]] to ptr
+; FUCHSIA-NEXT: [[TMP19:%.*]] = trunc i64 [[TMP14]] to i8
+; FUCHSIA-NEXT: [[TMP20:%.*]] = ptrtoint ptr [[X]] to i64
+; FUCHSIA-NEXT: [[TMP21:%.*]] = and i64 [[TMP20]], 72057594037927935
+; FUCHSIA-NEXT: [[TMP22:%.*]] = lshr i64 [[TMP21]], 4
+; FUCHSIA-NEXT: [[TMP23:%.*]] = getelementptr i8, ptr [[TMP0]], i64 [[TMP22]]
+; FUCHSIA-NEXT: [[TMP24:%.*]] = getelementptr i8, ptr [[TMP23]], i32 0
+; FUCHSIA-NEXT: store i8 4, ptr [[TMP24]], align 1
+; FUCHSIA-NEXT: [[TMP25:%.*]] = getelementptr i8, ptr [[X]], i32 15
+; FUCHSIA-NEXT: store i8 [[TMP19]], ptr [[TMP25]], align 1
; FUCHSIA-NEXT: call void @use(ptr [[X_HWASAN]])
-; FUCHSIA-NEXT: [[TMP25:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; FUCHSIA-NEXT: [[TMP26:%.*]] = ptrtoint ptr [[X]] to i64
-; FUCHSIA-NEXT: [[TMP27:%.*]] = and i64 [[TMP26]], 72057594037927935
-; FUCHSIA-NEXT: [[TMP28:%.*]] = lshr i64 [[TMP27]], 4
-; FUCHSIA-NEXT: [[TMP29:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP28]]
-; FUCHSIA-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP29]], i8 [[TMP25]], i64 1, i1 false)
+; FUCHSIA-NEXT: [[TMP26:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; FUCHSIA-NEXT: [[TMP27:%.*]] = ptrtoint ptr [[X]] to i64
+; FUCHSIA-NEXT: [[TMP28:%.*]] = and i64 [[TMP27]], 72057594037927935
+; FUCHSIA-NEXT: [[TMP29:%.*]] = lshr i64 [[TMP28]], 4
+; FUCHSIA-NEXT: [[TMP30:%.*]] = getelementptr i8, ptr [[TMP0]], i64 [[TMP29]]
+; FUCHSIA-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP30]], i8 [[TMP26]], i64 1, i1 false)
; FUCHSIA-NEXT: ret void
;
; FUCHSIA-LIBCALL-LABEL: define void @test_alloca
; FUCHSIA-LIBCALL-SAME: () #[[ATTR0]] personality ptr @__hwasan_personality_thunk {
; FUCHSIA-LIBCALL-NEXT: entry:
-; FUCHSIA-LIBCALL-NEXT: [[DOTHWASAN_SHADOW:%.*]] = load ptr, ptr @__hwasan_shadow_memory_dynamic_address, align 8
-; FUCHSIA-LIBCALL-NEXT: [[TMP0:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]])
-; FUCHSIA-LIBCALL-NEXT: [[TMP1:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
-; FUCHSIA-LIBCALL-NEXT: [[TMP2:%.*]] = ptrtoint ptr [[TMP1]] to i64
-; FUCHSIA-LIBCALL-NEXT: [[TMP3:%.*]] = shl i64 [[TMP2]], 44
-; FUCHSIA-LIBCALL-NEXT: [[TMP4:%.*]] = or i64 [[TMP0]], [[TMP3]]
-; FUCHSIA-LIBCALL-NEXT: call void @__hwasan_add_frame_record(i64 [[TMP4]])
-; FUCHSIA-LIBCALL-NEXT: [[TMP5:%.*]] = lshr i64 [[TMP2]], 20
-; FUCHSIA-LIBCALL-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = xor i64 [[TMP2]], [[TMP5]]
-; FUCHSIA-LIBCALL-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP2]], 56
+; FUCHSIA-LIBCALL-NEXT: [[TMP0:%.*]] = load ptr, ptr @__hwasan_shadow_memory_dynamic_address, align 8
+; FUCHSIA-LIBCALL-NEXT: [[TMP1:%.*]] = call i64 @llvm.read_register.i64(metadata [[META2:![0-9]+]])
+; FUCHSIA-LIBCALL-NEXT: [[TMP2:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
+; FUCHSIA-LIBCALL-NEXT: [[TMP3:%.*]] = ptrtoint ptr [[TMP2]] to i64
+; FUCHSIA-LIBCALL-NEXT: [[TMP4:%.*]] = shl i64 [[TMP3]], 44
+; FUCHSIA-LIBCALL-NEXT: [[TMP5:%.*]] = or i64 [[TMP1]], [[TMP4]]
+; FUCHSIA-LIBCALL-NEXT: call void @__hwasan_add_frame_record(i64 [[TMP5]])
+; FUCHSIA-LIBCALL-NEXT: [[TMP6:%.*]] = lshr i64 [[TMP3]], 20
+; FUCHSIA-LIBCALL-NEXT: [[HWASAN_STACK_BASE_TAG:%.*]] = xor i64 [[TMP3]], [[TMP6]]
+; FUCHSIA-LIBCALL-NEXT: [[HWASAN_UAR_TAG:%.*]] = lshr i64 [[TMP3]], 56
; FUCHSIA-LIBCALL-NEXT: [[X:%.*]] = alloca { i32, [12 x i8] }, align 16
-; FUCHSIA-LIBCALL-NEXT: [[TMP6:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0
-; FUCHSIA-LIBCALL-NEXT: [[TMP7:%.*]] = ptrtoint ptr [[X]] to i64
-; FUCHSIA-LIBCALL-NEXT: [[TMP8:%.*]] = and i64 [[TMP7]], 72057594037927935
-; FUCHSIA-LIBCALL-NEXT: [[TMP9:%.*]] = shl i64 [[TMP6]], 56
-; FUCHSIA-LIBCALL-NEXT: [[TMP10:%.*]] = or i64 [[TMP8]], [[TMP9]]
-; FUCHSIA-LIBCALL-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP10]] to ptr
-; FUCHSIA-LIBCALL-NEXT: [[TMP11:%.*]] = trunc i64 [[TMP6]] to i8
-; FUCHSIA-LIBCALL-NEXT: [[TMP12:%.*]] = ptrtoint ptr [[X]] to i64
-; FUCHSIA-LIBCALL-NEXT: [[TMP13:%.*]] = and i64 [[TMP12]], 72057594037927935
-; FUCHSIA-LIBCALL-NEXT: [[TMP14:%.*]] = lshr i64 [[TMP13]], 4
-; FUCHSIA-LIBCALL-NEXT: [[TMP15:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP14]]
-; FUCHSIA-LIBCALL-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP15]], i32 0
-; FUCHSIA-LIBCALL-NEXT: store i8 4, ptr [[TMP16]], align 1
-; FUCHSIA-LIBCALL-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[X]], i32 15
-; FUCHSIA-LIBCALL-NEXT: store i8 [[TMP11]], ptr [[TMP17]], align 1
+; FUCHSIA-LIBCALL-NEXT: [[TMP7:%.*]] = xor i64 [[HWASAN_STACK_BASE_TAG]], 0
+; FUCHSIA-LIBCALL-NEXT: [[TMP8:%.*]] = ptrtoint ptr [[X]] to i64
+; FUCHSIA-LIBCALL-NEXT: [[TMP9:%.*]] = and i64 [[TMP8]], 72057594037927935
+; FUCHSIA-LIBCALL-NEXT: [[TMP10:%.*]] = shl i64 [[TMP7]], 56
+; FUCHSIA-LIBCALL-NEXT: [[TMP11:%.*]] = or i64 [[TMP9]], [[TMP10]]
+; FUCHSIA-LIBCALL-NEXT: [[X_HWASAN:%.*]] = inttoptr i64 [[TMP11]] to ptr
+; FUCHSIA-LIBCALL-NEXT: [[TMP12:%.*]] = trunc i64 [[TMP7]] to i8
+; FUCHSIA-LIBCALL-NEXT: [[TMP13:%.*]] = ptrtoint ptr [[X]] to i64
+; FUCHSIA-LIBCALL-NEXT: [[TMP14:%.*]] = and i64 [[TMP13]], 72057594037927935
+; FUCHSIA-LIBCALL-NEXT: [[TMP15:%.*]] = lshr i64 [[TMP14]], 4
+; FUCHSIA-LIBCALL-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[TMP0]], i64 [[TMP15]]
+; FUCHSIA-LIBCALL-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP16]], i32 0
+; FUCHSIA-LIBCALL-NEXT: store i8 4, ptr [[TMP17]], align 1
+; FUCHSIA-LIBCALL-NEXT: [[TMP18:%.*]] = getelementptr i8, ptr [[X]], i32 15
+; FUCHSIA-LIBCALL-NEXT: store i8 [[TMP12]], ptr [[TMP18]], align 1
; FUCHSIA-LIBCALL-NEXT: call void @use(ptr [[X_HWASAN]])
-; FUCHSIA-LIBCALL-NEXT: [[TMP18:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
-; FUCHSIA-LIBCALL-NEXT: [[TMP19:%.*]] = ptrtoint ptr [[X]] to i64
-; FUCHSIA-LIBCALL-NEXT: [[TMP20:%.*]] = and i64 [[TMP19]], 72057594037927935
-; FUCHSIA-LIBCALL-NEXT: [[TMP21:%.*]] = lshr i64 [[TMP20]], 4
-; FUCHSIA-LIBCALL-NEXT: [[TMP22:%.*]] = getelementptr i8, ptr [[DOTHWASAN_SHADOW]], i64 [[TMP21]]
-; FUCHSIA-LIBCALL-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP22]], i8 [[TMP18]], i64 1, i1 false)
+; FUCHSIA-LIBCALL-NEXT: [[TMP19:%.*]] = trunc i64 [[HWASAN_UAR_TAG]] to i8
+; FUCHSIA-LIBCALL-NEXT: [[TMP20:%.*]] = ptrtoint ptr [[X]] to i64
+; FUCHSIA-LIBCALL-NEXT: [[TMP21:%.*]] = and i64 [[TMP20]], 72057594037927935
+; FUCHSIA-LIBCALL-NEXT: [[TMP22:%.*]] = lshr i64 [[TMP21]], 4
+; FUCHSIA-LIBCALL-NEXT: [[TMP23:%.*]] = getelementptr i8, ptr [[TMP0]], i64 [[TMP22]]
+; FUCHSIA-LIBCALL-NEXT: call void @llvm.memset.p0.i64(ptr align 1 [[TMP23]], i8 [[TMP19]], i64 1, i1 false)
; FUCHSIA-LIBCALL-NEXT: ret void
;
entry:
diff --git a/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope-setjmp.ll b/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope-setjmp.ll
index af6411a541e9a..9336a17fadb8d 100644
--- a/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope-setjmp.ll
+++ b/llvm/test/Instrumentation/HWAddressSanitizer/use-after-scope-setjmp.ll
@@ -16,7 +16,7 @@ define dso_local noundef i1 @_Z6targetv() sanitize_hwaddress {
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[TMP0]], i32 48
; CHECK-NEXT: [[TMP2:%.*]] = load i64, ptr [[TMP1]], align 8
; CHECK-NEXT: [[TMP3:%.*]] = ashr i64 [[TMP2]], 3
-; CHECK-NEXT: [[TMP4:%.*]] = call i64 @llvm.read_register.i64(metadata [[META1:![0-9]+]])
+; CHECK-NEXT: [[TMP4:%.*]] = call i64 @llvm.read_register.i64(metadata [[META2:![0-9]+]])
; CHECK-NEXT: [[TMP5:%.*]] = call ptr @llvm.frameaddress.p0(i32 0)
; CHECK-NEXT: [[TMP6:%.*]] = ptrtoint ptr [[TMP5]] to i64
; CHECK-NEXT: [[TMP7:%.*]] = shl i64 [[TMP6]], 44
More information about the llvm-commits
mailing list