[llvm] [x86] Enable indirect tail calls with more arguments (PR #137643)

[Eli Friedman via llvm-commits]

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@@ -3475,6 +3503,63 @@ static bool mayUseCarryFlag(X86::CondCode CC) {
   return true;
 }
 
+bool X86DAGToDAGISel::checkTCRetEnoughRegs(SDNode *N) const {
+  // Check that there is enough volatile registers to load the callee address.
+
+  const X86RegisterInfo *RI = Subtarget->getRegisterInfo();
+  unsigned AvailGPRs;
+  if (Subtarget->is64Bit()) {
+    const TargetRegisterClass *TCGPRs =
+        Subtarget->isCallingConvWin64(MF->getFunction().getCallingConv())
+            ? &X86::GR64_TCW64RegClass
+            : &X86::GR64_TCRegClass;
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efriedma-quic wrote:

This computation looks a little suspicious.  This should be the set of caller-save registers, and there's significantly more variation in the calling convention list.  But it looks like it matches the actual tailcalls themselves, so I guess it's fine?  Maybe put comments here and in X86InstrCompiler.td saying they need to match.

https://github.com/llvm/llvm-project/pull/137643