[lld] [ELF] Add target-specific relocation scanning for AArch64 (PR #181099)

[Fangrui Song via llvm-commits]

================
@@ -273,6 +180,201 @@ bool AArch64::usesOnlyLowPageBits(RelType type) const {
   }
 }
 
+template <class ELFT, class RelTy>
+void AArch64::scanSectionImpl(InputSectionBase &sec, Relocs<RelTy> rels) {
+  RelocScan rs(ctx, &sec);
+  sec.relocations.reserve(rels.size());
+
+  for (auto it = rels.begin(); it != rels.end(); ++it) {
+    const RelTy &rel = *it;
+    uint32_t symIdx = rel.getSymbol(false);
+    Symbol &sym = sec.getFile<ELFT>()->getSymbol(symIdx);
+    uint64_t offset = rel.r_offset;
+    RelType type = rel.getType(false);
+    if (sym.isUndefined() && symIdx != 0 &&
+        rs.maybeReportUndefined(cast<Undefined>(sym), offset))
+      continue;
+    int64_t addend = rs.getAddend<ELFT>(rel, type);
+    RelExpr expr;
+    switch (type) {
+    case R_AARCH64_NONE:
+      continue;
+
+      // Absolute relocations:
+    case R_AARCH64_ABS16:
+    case R_AARCH64_ABS32:
+    case R_AARCH64_ABS64:
+    case R_AARCH64_FUNCINIT64:
+    case R_AARCH64_ADD_ABS_LO12_NC:
+    case R_AARCH64_LDST128_ABS_LO12_NC:
+    case R_AARCH64_LDST16_ABS_LO12_NC:
+    case R_AARCH64_LDST32_ABS_LO12_NC:
+    case R_AARCH64_LDST64_ABS_LO12_NC:
+    case R_AARCH64_LDST8_ABS_LO12_NC:
+    case R_AARCH64_MOVW_SABS_G0:
+    case R_AARCH64_MOVW_SABS_G1:
+    case R_AARCH64_MOVW_SABS_G2:
+    case R_AARCH64_MOVW_UABS_G0:
+    case R_AARCH64_MOVW_UABS_G0_NC:
+    case R_AARCH64_MOVW_UABS_G1:
+    case R_AARCH64_MOVW_UABS_G1_NC:
+    case R_AARCH64_MOVW_UABS_G2:
+    case R_AARCH64_MOVW_UABS_G2_NC:
+    case R_AARCH64_MOVW_UABS_G3:
+      expr = R_ABS;
+      break;
+
+    case R_AARCH64_AUTH_ABS64:
+      expr = RE_AARCH64_AUTH;
+      break;
+
+    case R_AARCH64_PATCHINST:
+      if (!isAbsolute(sym))
+        Err(ctx) << getErrorLoc(ctx, sec.content().data() + offset)
+                 << "R_AARCH64_PATCHINST relocation against non-absolute "
+                    "symbol "
+                 << &sym;
+      expr = R_ABS;
+      break;
+
+      // PC-relative relocations:
+    case R_AARCH64_PREL16:
+    case R_AARCH64_PREL32:
+    case R_AARCH64_PREL64:
+    case R_AARCH64_ADR_PREL_LO21:
+    case R_AARCH64_LD_PREL_LO19:
+    case R_AARCH64_MOVW_PREL_G0:
+    case R_AARCH64_MOVW_PREL_G0_NC:
+    case R_AARCH64_MOVW_PREL_G1:
+    case R_AARCH64_MOVW_PREL_G1_NC:
+    case R_AARCH64_MOVW_PREL_G2:
+    case R_AARCH64_MOVW_PREL_G2_NC:
+    case R_AARCH64_MOVW_PREL_G3:
+      rs.processR_PC(type, offset, addend, sym);
+      continue;
+
+      // Page-PC relocations:
+    case R_AARCH64_ADR_PREL_PG_HI21:
+    case R_AARCH64_ADR_PREL_PG_HI21_NC:
+      expr = RE_AARCH64_PAGE_PC;
+      break;
+
+      // PLT-generating relocations:
+    case R_AARCH64_CALL26:
+    case R_AARCH64_CONDBR19:
+    case R_AARCH64_JUMP26:
+    case R_AARCH64_TSTBR14:
+      rs.processR_PLT_PC(type, offset, addend, sym);
+      continue;
+    case R_AARCH64_PLT32:
+      sym.thunkAccessed = true;
+      rs.processR_PLT_PC(type, offset, addend, sym);
+      continue;
+
+      // GOT relocations:
+    case R_AARCH64_LD64_GOT_LO12_NC:
+      expr = R_GOT;
+      break;
+    case R_AARCH64_AUTH_LD64_GOT_LO12_NC:
+    case R_AARCH64_AUTH_GOT_ADD_LO12_NC:
+      sym.setFlags(NEEDS_GOT | NEEDS_GOT_AUTH);
+      rs.processAux(R_GOT, type, offset, sym, addend);
+      continue;
+    case R_AARCH64_AUTH_GOT_LD_PREL19:
+    case R_AARCH64_AUTH_GOT_ADR_PREL_LO21:
+      sym.setFlags(NEEDS_GOT | NEEDS_GOT_AUTH);
----------------
MaskRay wrote:

Thanks for the suggestion! The intention is to remove unneeded code for the fast path, so I'll not add this `if ... sym.setFlags(...)`

https://github.com/llvm/llvm-project/pull/181099