[llvm] [SelectionDAG][x86] Ensure vector reduction optimization (PR #144231)

[Simon Pilgrim via llvm-commits]

Suhajda =?utf-8?q?Tamás?= <sutajo at gmail.com>
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In-Reply-To: <llvm.org/llvm/llvm-project/pull/144231 at github.com>


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@@ -48066,6 +48077,36 @@ static SDValue combineExtractVectorElt(SDNode *N, SelectionDAG &DAG,
   return SDValue();
 }
 
+static SDValue combineExtractVectorEltAndOperand(SDNode* N, SelectionDAG& DAG,
+    TargetLowering::DAGCombinerInfo& DCI,
+    const X86Subtarget& Subtarget)
+{
+  bool TransformedBinOpReduction = false;
+  auto Op = combineExtractVectorElt(N, DAG, DCI, Subtarget, TransformedBinOpReduction);
+
+  if (TransformedBinOpReduction)
+  {
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RKSimon wrote:

clang format this section

https://github.com/llvm/llvm-project/pull/144231