[llvm] [MIRParser] Accept sub-register for implicit operand verification (PR #180707)

[Matt Arsenault via llvm-commits]

https://github.com/arsenm requested changes to this pull request.

This is a narrow hack and not the way to solve this. We should do something like RegisterByHwMode to know which register to accept here 

https://github.com/llvm/llvm-project/pull/180707