[llvm] [X86] SimplifyDemandedVectorEltsForTargetNode - add handling for vpmaddwd/vpmaddubsw/vpmulhrsw vector width reduction (PR #180738)

[Simon Pilgrim via llvm-commits]

https://github.com/RKSimon created https://github.com/llvm/llvm-project/pull/180738

None

>From 37d94e70d620377991def05e6a5887096a90e2cd Mon Sep 17 00:00:00 2001
From: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: Tue, 10 Feb 2026 13:52:00 +0000
Subject: [PATCH] [X86] SimplifyDemandedVectorEltsForTargetNode - add handling
 for vpmaddwd/vpmaddubsw/vpmulhrsw vector width reduction

---
 llvm/lib/Target/X86/X86ISelLowering.cpp        |  3 +++
 .../CodeGen/X86/vector-target-demanded-elts.ll | 18 ++++++------------
 2 files changed, 9 insertions(+), 12 deletions(-)

diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 594cfdc26312a..b8357087d30b1 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -44980,6 +44980,9 @@ bool X86TargetLowering::SimplifyDemandedVectorEltsForTargetNode(
     case X86ISD::PCMPGT:
     case X86ISD::PMULUDQ:
     case X86ISD::PMULDQ:
+    case X86ISD::MULHRS:
+    case X86ISD::VPMADDUBSW:
+    case X86ISD::VPMADDWD:
     case X86ISD::VSHLV:
     case X86ISD::VSRLV:
     case X86ISD::VSRAV:
diff --git a/llvm/test/CodeGen/X86/vector-target-demanded-elts.ll b/llvm/test/CodeGen/X86/vector-target-demanded-elts.ll
index 84dbb03f5e292..dcfc941d9cb55 100644
--- a/llvm/test/CodeGen/X86/vector-target-demanded-elts.ll
+++ b/llvm/test/CodeGen/X86/vector-target-demanded-elts.ll
@@ -4,8 +4,7 @@
 define <4 x i32> @demanded_low_pmaddwd256_128(<16 x i16> %a0, <16 x i16> %a1) {
 ; CHECK-LABEL: demanded_low_pmaddwd256_128:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    vpmaddwd %ymm1, %ymm0, %ymm0
-; CHECK-NEXT:    # kill: def $xmm0 killed $xmm0 killed $ymm0
+; CHECK-NEXT:    vpmaddwd %xmm1, %xmm0, %xmm0
 ; CHECK-NEXT:    vzeroupper
 ; CHECK-NEXT:    retq
   %res = call <8 x i32> @llvm.x86.avx2.pmadd.wd(<16 x i16> %a0, <16 x i16> %a1)
@@ -16,8 +15,7 @@ define <4 x i32> @demanded_low_pmaddwd256_128(<16 x i16> %a0, <16 x i16> %a1) {
 define <8 x i32> @demanded_low_pmaddwd512_256(<32 x i16> %x0, <32 x i16> %x1) {
 ; CHECK-LABEL: demanded_low_pmaddwd512_256:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    vpmaddwd %zmm1, %zmm0, %zmm0
-; CHECK-NEXT:    # kill: def $ymm0 killed $ymm0 killed $zmm0
+; CHECK-NEXT:    vpmaddwd %ymm1, %ymm0, %ymm0
 ; CHECK-NEXT:    retq
   %res = call <16 x i32> @llvm.x86.avx512.pmaddw.d.512(<32 x i16> %x0, <32 x i16> %x1)
   %ext = shufflevector <16 x i32> %res, <16 x i32> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
@@ -27,8 +25,7 @@ define <8 x i32> @demanded_low_pmaddwd512_256(<32 x i16> %x0, <32 x i16> %x1) {
 define <8 x i16> @demanded_low_pmaddubs256_128(<32 x i8> %a0, <32 x i8> %a1) {
 ; CHECK-LABEL: demanded_low_pmaddubs256_128:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    vpmaddubsw %ymm1, %ymm0, %ymm0
-; CHECK-NEXT:    # kill: def $xmm0 killed $xmm0 killed $ymm0
+; CHECK-NEXT:    vpmaddubsw %xmm1, %xmm0, %xmm0
 ; CHECK-NEXT:    vzeroupper
 ; CHECK-NEXT:    retq
   %res = call <16 x i16> @llvm.x86.avx2.pmadd.ub.sw(<32 x i8> %a0, <32 x i8> %a1)
@@ -39,8 +36,7 @@ define <8 x i16> @demanded_low_pmaddubs256_128(<32 x i8> %a0, <32 x i8> %a1) {
 define <16 x i16> @demanded_low_pmaddubs512_256(<64 x i8> %x0, <64 x i8> %x1) {
 ; CHECK-LABEL: demanded_low_pmaddubs512_256:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    vpmaddubsw %zmm1, %zmm0, %zmm0
-; CHECK-NEXT:    # kill: def $ymm0 killed $ymm0 killed $zmm0
+; CHECK-NEXT:    vpmaddubsw %ymm1, %ymm0, %ymm0
 ; CHECK-NEXT:    retq
   %res = call <32 x i16> @llvm.x86.avx512.pmaddubs.w.512(<64 x i8> %x0, <64 x i8> %x1)
   %ext = shufflevector <32 x i16> %res, <32 x i16> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
@@ -50,8 +46,7 @@ define <16 x i16> @demanded_low_pmaddubs512_256(<64 x i8> %x0, <64 x i8> %x1) {
 define <8 x i16> @demanded_low_pmulhrsw256_128(<16 x i16> %a0, <16 x i16> %a1) {
 ; CHECK-LABEL: demanded_low_pmulhrsw256_128:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    vpmulhrsw %ymm1, %ymm0, %ymm0
-; CHECK-NEXT:    # kill: def $xmm0 killed $xmm0 killed $ymm0
+; CHECK-NEXT:    vpmulhrsw %xmm1, %xmm0, %xmm0
 ; CHECK-NEXT:    vzeroupper
 ; CHECK-NEXT:    retq
   %res = call <16 x i16> @llvm.x86.avx2.pmul.hr.sw(<16 x i16> %a0, <16 x i16> %a1)
@@ -62,8 +57,7 @@ define <8 x i16> @demanded_low_pmulhrsw256_128(<16 x i16> %a0, <16 x i16> %a1) {
 define <16 x i16> @demanded_low_pmulhrsw512_256(<32 x i16> %x0, <32 x i16> %x1, <32 x i16> %x2) {
 ; CHECK-LABEL: demanded_low_pmulhrsw512_256:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    vpmulhrsw %zmm1, %zmm0, %zmm0
-; CHECK-NEXT:    # kill: def $ymm0 killed $ymm0 killed $zmm0
+; CHECK-NEXT:    vpmulhrsw %ymm1, %ymm0, %ymm0
 ; CHECK-NEXT:    retq
   %res = call <32 x i16> @llvm.x86.avx512.pmul.hr.sw.512(<32 x i16> %x0, <32 x i16> %x1)
   %ext = shufflevector <32 x i16> %res, <32 x i16> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>