[clang] [llvm] [OpenASIP] Update the TCE target defs for OpenASIP 2.2 (PR #176698)
Pekka Jääskeläinen via llvm-commits
llvm-commits at lists.llvm.org
Tue Feb 10 02:39:06 PST 2026
https://github.com/pjaaskel updated https://github.com/llvm/llvm-project/pull/176698
>From 736da6618803d48a076dd902d87e513a33691984 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Pekka=20J=C3=A4=C3=A4skel=C3=A4inen?=
<pekka.jaaskelainen at tuni.fi>
Date: Tue, 3 Nov 2020 12:40:12 +0200
Subject: [PATCH] [OpenASIP] Update the TCE target defs for OpenASIP 2.2
OpenASIP (ex. TCE*) is a special target which has only a stub
target definition in the LLVM side that has resided in LLVM
for over 15 years. I'm the original committer of this stub.
Due to needing various other patches to LLVM that were not nicely
upstreamable, the upstream TCE target defs have long been unupdated.
However, with the recent changes to the vectorization types etc.
I managed to minimize the required LLVM TCE patch to this one and
with this patch OpenASIP can be (finally!) used without a patched LLVM
for non-RISC-V processor customization. RISC-V ISA customization still
requires a patch to polish and upstream (TBD).
This patch:
* Introduces a 64b variant of an OpenASIP target.
* Unifies the datalayouts of the different target variants.
to make it compatible with OpenASIP v2.2 and above.
* Updates the OpenCL address space IDs to be compatible with
the latest PoCL backends.
* Implements Triple::computeDataLayout() for completeness.
[*] More info:
https://blog.llvm.org/2010/06/tce-project-co-design-of-application.html
https://openasip.org
The actual backends for the customized processors are generated on
the fly with a backend generator of the OpenASIP project based on a
target definition file and loaded as plugins to the LLVM framework.
This mechanism enables fast "design space exploration" of
application-specific processors designed with the toolset as only a
small part of the compiler has to be regenerated for new design
candidates.
---
clang/lib/Basic/Targets.cpp | 3 ++
clang/lib/Basic/Targets/TCE.cpp | 12 +++++
clang/lib/Basic/Targets/TCE.h | 59 ++++++++++++++++++----
clang/lib/CodeGen/CodeGenModule.cpp | 1 +
clang/lib/Driver/Driver.cpp | 4 ++
clang/lib/Driver/ToolChains/TCE.cpp | 6 +++
clang/lib/Driver/ToolChains/TCE.h | 7 +++
clang/test/CodeGen/target-data.c | 8 ++-
llvm/include/llvm/TargetParser/Triple.h | 5 +-
llvm/lib/TargetParser/TargetDataLayout.cpp | 13 +++++
llvm/lib/TargetParser/Triple.cpp | 11 +++-
11 files changed, 115 insertions(+), 14 deletions(-)
diff --git a/clang/lib/Basic/Targets.cpp b/clang/lib/Basic/Targets.cpp
index cd5b29db07a9f..cf923a75d1cab 100644
--- a/clang/lib/Basic/Targets.cpp
+++ b/clang/lib/Basic/Targets.cpp
@@ -543,6 +543,9 @@ std::unique_ptr<TargetInfo> AllocateTarget(const llvm::Triple &Triple,
case llvm::Triple::tcele:
return std::make_unique<TCELETargetInfo>(Triple, Opts);
+ case llvm::Triple::tcele64:
+ return std::make_unique<TCELE64TargetInfo>(Triple, Opts);
+
case llvm::Triple::x86:
if (Triple.isOSDarwin())
return std::make_unique<DarwinI386TargetInfo>(Triple, Opts);
diff --git a/clang/lib/Basic/Targets/TCE.cpp b/clang/lib/Basic/Targets/TCE.cpp
index 91194b568a09f..3a0bdffe2d166 100644
--- a/clang/lib/Basic/Targets/TCE.cpp
+++ b/clang/lib/Basic/Targets/TCE.cpp
@@ -24,6 +24,18 @@ void TCETargetInfo::getTargetDefines(const LangOptions &Opts,
Builder.defineMacro("__TCE_V1__");
}
+void TCELE64TargetInfo::getTargetDefines(const LangOptions &Opts,
+ MacroBuilder &Builder) const {
+ DefineStd(Builder, "tcele64", Opts);
+ Builder.defineMacro("__TCE__");
+ Builder.defineMacro("__TCE_V1__");
+ Builder.defineMacro("__TCELE__");
+ Builder.defineMacro("__TCELE_V1__");
+ Builder.defineMacro("__TCELE64__");
+ Builder.defineMacro("__TCELE64_V1__");
+ Builder.defineMacro("__TCE64__");
+}
+
void TCELETargetInfo::getTargetDefines(const LangOptions &Opts,
MacroBuilder &Builder) const {
DefineStd(Builder, "tcele", Opts);
diff --git a/clang/lib/Basic/Targets/TCE.h b/clang/lib/Basic/Targets/TCE.h
index 161025378c471..8132aac67755c 100644
--- a/clang/lib/Basic/Targets/TCE.h
+++ b/clang/lib/Basic/Targets/TCE.h
@@ -31,9 +31,9 @@ namespace targets {
static const unsigned TCEOpenCLAddrSpaceMap[] = {
0, // Default
- 3, // opencl_global
- 4, // opencl_local
- 5, // opencl_constant
+ 1, // opencl_global
+ 3, // opencl_local
+ 2, // opencl_constant
0, // opencl_private
1, // opencl_global_device
1, // opencl_global_host
@@ -88,9 +88,11 @@ class LLVM_LIBRARY_VISIBILITY TCETargetInfo : public TargetInfo {
LongDoubleFormat = &llvm::APFloat::IEEEsingle();
resetDataLayout("E-p:32:32:32-i1:8:8-i8:8:32-"
"i16:16:32-i32:32:32-i64:32:32-"
- "f32:32:32-f64:32:32-v64:32:32-"
- "v128:32:32-v256:32:32-v512:32:32-"
- "v1024:32:32-a0:0:32-n32");
+ "f16:16:16-f32:32:32-f64:32:32-v64:64:64-"
+ "i128:128-"
+ "v128:128:128-v256:256:256-v512:512:512-"
+ "v1024:1024:1024-v2048:2048:2048-"
+ "v4096:4096:4096-a0:0:32-n32");
AddrSpaceMap = &TCEOpenCLAddrSpaceMap;
UseAddrSpaceMapMangling = true;
}
@@ -120,6 +122,9 @@ class LLVM_LIBRARY_VISIBILITY TCETargetInfo : public TargetInfo {
ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
return {};
}
+
+ // TCE does not have fixed, but user specified register names.
+ bool isValidGCCRegisterName(StringRef Name) const override { return true; }
};
class LLVM_LIBRARY_VISIBILITY TCELETargetInfo : public TCETargetInfo {
@@ -130,14 +135,50 @@ class LLVM_LIBRARY_VISIBILITY TCELETargetInfo : public TCETargetInfo {
resetDataLayout("e-p:32:32:32-i1:8:8-i8:8:32-"
"i16:16:32-i32:32:32-i64:32:32-"
- "f32:32:32-f64:32:32-v64:32:32-"
- "v128:32:32-v256:32:32-v512:32:32-"
- "v1024:32:32-a0:0:32-n32");
+ "f16:16:16-f32:32:32-f64:32:32-v64:64:64-"
+ "i128:128-"
+ "v128:128:128-v256:256:256-v512:512:512-"
+ "v1024:1024:1024-v2048:2048:2048-"
+ "v4096:4096:4096-a0:0:32-n32");
+ }
+
+ void getTargetDefines(const LangOptions &Opts,
+ MacroBuilder &Builder) const override;
+};
+
+class LLVM_LIBRARY_VISIBILITY TCELE64TargetInfo : public TCETargetInfo {
+public:
+ TCELE64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
+ : TCETargetInfo(Triple, Opts) {
+ BigEndian = false;
+
+ resetDataLayout("e-p:64:64:64-i1:8:64-i8:8:64-"
+ "i16:16:64-i32:32:64-i64:64:64-"
+ "f16:16:64-f32:32:64-f64:64:64-v64:64:64-"
+ "i128:128-"
+ "v128:128:128-v256:256:256-v512:512:512-"
+ "v1024:1024:1024-v2048:2048:2048-"
+ "v4096:4096:4096-a0:0:64-n64");
+
+ LongWidth = LongLongWidth = 64;
+ PointerWidth = 64;
+ PointerAlign = 64;
+ LongAlign = LongLongAlign = 64;
+ IntPtrType = SignedLong;
+ SizeType = UnsignedLong;
+ PtrDiffType = SignedLong;
+ DoubleWidth = 64;
+ DoubleAlign = 64;
+ LongDoubleWidth = 64;
+ LongDoubleAlign = 64;
+ DoubleFormat = &llvm::APFloat::IEEEdouble();
+ LongDoubleFormat = &llvm::APFloat::IEEEdouble();
}
void getTargetDefines(const LangOptions &Opts,
MacroBuilder &Builder) const override;
};
+
} // namespace targets
} // namespace clang
#endif // LLVM_CLANG_LIB_BASIC_TARGETS_TCE_H
diff --git a/clang/lib/CodeGen/CodeGenModule.cpp b/clang/lib/CodeGen/CodeGenModule.cpp
index 65f5468c4b998..c15e9202953f2 100644
--- a/clang/lib/CodeGen/CodeGenModule.cpp
+++ b/clang/lib/CodeGen/CodeGenModule.cpp
@@ -247,6 +247,7 @@ createTargetCodeGenInfo(CodeGenModule &CGM) {
case llvm::Triple::tce:
case llvm::Triple::tcele:
+ case llvm::Triple::tcele64:
return createTCETargetCodeGenInfo(CGM);
case llvm::Triple::x86: {
diff --git a/clang/lib/Driver/Driver.cpp b/clang/lib/Driver/Driver.cpp
index a55c5033b57cf..9fc47c714e027 100644
--- a/clang/lib/Driver/Driver.cpp
+++ b/clang/lib/Driver/Driver.cpp
@@ -6995,6 +6995,10 @@ const ToolChain &Driver::getToolChain(const ArgList &Args,
case llvm::Triple::tcele:
TC = std::make_unique<toolchains::TCELEToolChain>(*this, Target, Args);
break;
+ case llvm::Triple::tcele64:
+ TC =
+ std::make_unique<toolchains::TCELE64ToolChain>(*this, Target, Args);
+ break;
case llvm::Triple::hexagon:
TC = std::make_unique<toolchains::HexagonToolChain>(*this, Target,
Args);
diff --git a/clang/lib/Driver/ToolChains/TCE.cpp b/clang/lib/Driver/ToolChains/TCE.cpp
index 14db69a8ff2c0..ea619f63eb870 100644
--- a/clang/lib/Driver/ToolChains/TCE.cpp
+++ b/clang/lib/Driver/ToolChains/TCE.cpp
@@ -44,4 +44,10 @@ TCELEToolChain::TCELEToolChain(const Driver &D, const llvm::Triple& Triple,
: TCEToolChain(D, Triple, Args) {
}
+TCELE64ToolChain::TCELE64ToolChain(const Driver &D, const llvm::Triple &Triple,
+ const ArgList &Args)
+ : TCEToolChain(D, Triple, Args) {}
+
+TCELE64ToolChain::~TCELE64ToolChain() {}
+
TCELEToolChain::~TCELEToolChain() {}
diff --git a/clang/lib/Driver/ToolChains/TCE.h b/clang/lib/Driver/ToolChains/TCE.h
index 31a64cfe878a7..5a255ec68cba6 100644
--- a/clang/lib/Driver/ToolChains/TCE.h
+++ b/clang/lib/Driver/ToolChains/TCE.h
@@ -39,6 +39,13 @@ class LLVM_LIBRARY_VISIBILITY TCELEToolChain : public TCEToolChain {
~TCELEToolChain() override;
};
+class LLVM_LIBRARY_VISIBILITY TCELE64ToolChain : public TCEToolChain {
+public:
+ TCELE64ToolChain(const Driver &D, const llvm::Triple &Triple,
+ const llvm::opt::ArgList &Args);
+ ~TCELE64ToolChain() override;
+};
+
} // end namespace toolchains
} // end namespace driver
} // end namespace clang
diff --git a/clang/test/CodeGen/target-data.c b/clang/test/CodeGen/target-data.c
index ee8e45511720c..6df20c728f71b 100644
--- a/clang/test/CodeGen/target-data.c
+++ b/clang/test/CodeGen/target-data.c
@@ -227,11 +227,15 @@
// RUN: %clang_cc1 -triple tce-unknown -o - -emit-llvm %s | \
// RUN: FileCheck %s -check-prefix=TCE
-// TCE: target datalayout = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:32:32-v128:32:32-v256:32:32-v512:32:32-v1024:32:32-a0:0:32-n32"
+// TCE: target datalayout = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f16:16:16-f32:32:32-f64:32:32-v64:64:64-i128:128-v128:128:128-v256:256:256-v512:512:512-v1024:1024:1024-v2048:2048:2048-v4096:4096:4096-a0:0:32-n32"
// RUN: %clang_cc1 -triple tcele-unknown -o - -emit-llvm %s | \
// RUN: FileCheck %s -check-prefix=TCELE
-// TCELE: target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:32:32-v128:32:32-v256:32:32-v512:32:32-v1024:32:32-a0:0:32-n32"
+// TCELE: target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f16:16:16-f32:32:32-f64:32:32-v64:64:64-i128:128-v128:128:128-v256:256:256-v512:512:512-v1024:1024:1024-v2048:2048:2048-v4096:4096:4096-a0:0:32-n32"
+
+// RUN: %clang_cc1 -triple tcele64-unknown -o - -emit-llvm %s | \
+// RUN: FileCheck %s -check-prefix=TCELE64
+// TCELE64: target datalayout = "e-p:64:64:64-i1:8:64-i8:8:64-i16:16:64-i32:32:64-i64:64:64-f16:16:64-f32:32:64-f64:64:64-v64:64:64-i128:128-v128:128:128-v256:256:256-v512:512:512-v1024:1024:1024-v2048:2048:2048-v4096:4096:4096-a0:0:64-n64"
// RUN: %clang_cc1 -triple spir-unknown -o - -emit-llvm %s | \
// RUN: FileCheck %s -check-prefix=SPIR
diff --git a/llvm/include/llvm/TargetParser/Triple.h b/llvm/include/llvm/TargetParser/Triple.h
index b082ed05d8358..db02dd1b462aa 100644
--- a/llvm/include/llvm/TargetParser/Triple.h
+++ b/llvm/include/llvm/TargetParser/Triple.h
@@ -83,8 +83,9 @@ class Triple {
sparcv9, // Sparcv9: Sparcv9
sparcel, // Sparc: (endianness = little). NB: 'Sparcle' is a CPU variant
systemz, // SystemZ: s390x
- tce, // TCE (http://tce.cs.tut.fi/): tce
- tcele, // TCE little endian (http://tce.cs.tut.fi/): tcele
+ tce, // OpenASIP (http://openasip.org) / big endian 32b targets: tce
+ tcele, // OpenASIP (http://openasip.org) / little endian 32b targets: tcele
+ tcele64, // OpenASIP (http://openasip.org) / little endian 64b targets: tcele
thumb, // Thumb (little endian): thumb, thumbv.*
thumbeb, // Thumb (big endian): thumbeb
x86, // X86: i[3-9]86
diff --git a/llvm/lib/TargetParser/TargetDataLayout.cpp b/llvm/lib/TargetParser/TargetDataLayout.cpp
index b985c1eec4244..3b5dad878c47b 100644
--- a/llvm/lib/TargetParser/TargetDataLayout.cpp
+++ b/llvm/lib/TargetParser/TargetDataLayout.cpp
@@ -604,7 +604,20 @@ std::string Triple::computeDataLayout(StringRef ABIName) const {
case Triple::systemz:
return computeSystemZDataLayout(*this);
case Triple::tce:
+ return "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:32-"
+ "f16:16:16-f32:32:32-f64:32:32-v64:64:64-i128:128-v128:128:128-"
+ "v256:256:256-v512:512:512-v1024:1024:1024-v2048:2048:2048-"
+ "v4096:4096:4096-a0:0:32-n32";
case Triple::tcele:
+ return "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:32-"
+ "f16:16:16-f32:32:32-f64:32:32-v64:64:64-i128:128-v128:128:128-"
+ "v256:256:256-v512:512:512-v1024:1024:1024-v2048:2048:2048-"
+ "v4096:4096:4096-a0:0:32-n32";
+ case Triple::tcele64:
+ return "e-p:64:64:64-i1:8:64-i8:8:64-i16:16:64-i32:32:64-i64:64:64-"
+ "f16:16:64-f32:32:64-f64:64:64-v64:64:64-i128:128-v128:128:128-"
+ "v256:256:256-v512:512:512-v1024:1024:1024-v2048:2048:2048-"
+ "v4096:4096:4096-a0:0:64-n64";
case Triple::x86:
case Triple::x86_64:
return computeX86DataLayout(*this);
diff --git a/llvm/lib/TargetParser/Triple.cpp b/llvm/lib/TargetParser/Triple.cpp
index a3ea5d823033d..4c7583b39768b 100644
--- a/llvm/lib/TargetParser/Triple.cpp
+++ b/llvm/lib/TargetParser/Triple.cpp
@@ -79,6 +79,7 @@ StringRef Triple::getArchTypeName(ArchType Kind) {
case systemz: return "s390x";
case tce: return "tce";
case tcele: return "tcele";
+ case tcele64: return "tcele64";
case thumb: return "thumb";
case thumbeb: return "thumbeb";
case ve: return "ve";
@@ -492,6 +493,7 @@ Triple::ArchType Triple::getArchTypeForLLVMName(StringRef Name) {
.Case("systemz", systemz)
.Case("tce", tce)
.Case("tcele", tcele)
+ .Case("tcele64", tcele64)
.Case("thumb", thumb)
.Case("thumbeb", thumbeb)
.Case("x86", x86)
@@ -642,6 +644,7 @@ static Triple::ArchType parseArch(StringRef ArchName) {
.Cases({"sparcv9", "sparc64"}, Triple::sparcv9)
.Case("tce", Triple::tce)
.Case("tcele", Triple::tcele)
+ .Case("tcele64", Triple::tcele64)
.Case("xcore", Triple::xcore)
.Case("nvptx", Triple::nvptx)
.Case("nvptx64", Triple::nvptx64)
@@ -1030,6 +1033,7 @@ static Triple::ObjectFormatType getDefaultFormat(const Triple &T) {
case Triple::spir:
case Triple::tce:
case Triple::tcele:
+ case Triple::tcele64:
case Triple::thumbeb:
case Triple::ve:
case Triple::xcore:
@@ -1794,6 +1798,7 @@ unsigned Triple::getArchPointerBitWidth(llvm::Triple::ArchType Arch) {
case llvm::Triple::spirv:
case llvm::Triple::spir64:
case llvm::Triple::spirv64:
+ case llvm::Triple::tcele64:
case llvm::Triple::systemz:
case llvm::Triple::ve:
case llvm::Triple::wasm64:
@@ -1910,6 +1915,7 @@ Triple Triple::get32BitArchVariant() const {
case Triple::spirv64:
T.setArch(Triple::spirv32, getSubArch());
break;
+ case Triple::tcele64: T.setArch(Triple::tcele); break;
case Triple::wasm64: T.setArch(Triple::wasm32); break;
case Triple::x86_64: T.setArch(Triple::x86); break;
}
@@ -1933,7 +1939,6 @@ Triple Triple::get64BitArchVariant() const {
case Triple::shave:
case Triple::sparcel:
case Triple::tce:
- case Triple::tcele:
case Triple::xcore:
case Triple::xtensa:
T.setArch(UnknownArch);
@@ -1959,6 +1964,7 @@ Triple Triple::get64BitArchVariant() const {
case Triple::spir64:
case Triple::spirv64:
case Triple::systemz:
+ case Triple::tcele64:
case Triple::ve:
case Triple::wasm64:
case Triple::x86_64:
@@ -1991,6 +1997,7 @@ Triple Triple::get64BitArchVariant() const {
case Triple::spirv32:
T.setArch(Triple::spirv64, getSubArch());
break;
+ case Triple::tcele: T.setArch(Triple::tcele64); break;
case Triple::thumb: T.setArch(Triple::aarch64); break;
case Triple::thumbeb: T.setArch(Triple::aarch64_be); break;
case Triple::wasm32: T.setArch(Triple::wasm64); break;
@@ -2029,6 +2036,7 @@ Triple Triple::getBigEndianArchVariant() const {
case Triple::spirv:
case Triple::spirv32:
case Triple::spirv64:
+ case Triple::tcele64:
case Triple::wasm32:
case Triple::wasm64:
case Triple::x86:
@@ -2150,6 +2158,7 @@ bool Triple::isLittleEndian() const {
case Triple::spirv32:
case Triple::spirv64:
case Triple::tcele:
+ case Triple::tcele64:
case Triple::thumb:
case Triple::ve:
case Triple::wasm32:
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