[llvm] [AMDGPU][GISel] Add RegBankLegalize support for G_SI_CALL (PR #165747)

[Petar Avramovic via llvm-commits]

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@@ -1146,6 +1148,12 @@ RegBankLegalizeRules::RegBankLegalizeRules(const GCNSubtarget &_ST,
 
   addRulesForGOpcs({G_AMDGPU_WAVE_ADDRESS}).Any({{UniP5}, {{SgprP5}, {}}});
 
+  addRulesForGOpcs({G_SI_CALL})
+      .Any({{_, UniP0}, {{None}, {SgprP0}}})
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petar-avramovic wrote:

Definitely should not change td files, just 
$sgpr30_sgpr31 = G_SI_CALL
->
%123_(s64)= G_SI_CALL
$sgpr30_sgpr31 = COPY %123

when call lowering creates the instruction,
might have to ensure copy is removed when you change opcode to SI_CALL in InstructionSelect


https://github.com/llvm/llvm-project/pull/165747