[llvm] Connex second patch (PR #180768)
via llvm-commits
llvm-commits at lists.llvm.org
Tue Feb 10 08:16:50 PST 2026
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-llvm-ir
Author: None (alexsusu)
<details>
<summary>Changes</summary>
Comitting now separately the patch with llvm/Maintainers.md, llvm/lib/TargetParser/Triple.cpp (both these previous files should have been added to the first patch), llvm/include/llvm/IR/CMakeLists.txt, llvm/include/llvm/IR/Intrinsics.td, llvm/include/llvm/IR/IntrinsicsConnex.td, llvm/lib/IR/Intrinsics.cpp, and llvm/lib/TargetParser/TargetDataLayout.cpp.
---
Full diff: https://github.com/llvm/llvm-project/pull/180768.diff
10 Files Affected:
- (modified) llvm/CMakeLists.txt (+1)
- (modified) llvm/Maintainers.md (+5)
- (modified) llvm/include/llvm/IR/CMakeLists.txt (+1)
- (modified) llvm/include/llvm/IR/Intrinsics.td (+1)
- (added) llvm/include/llvm/IR/IntrinsicsConnex.td (+106)
- (modified) llvm/include/llvm/TargetParser/Triple.h (+1)
- (modified) llvm/lib/IR/Intrinsics.cpp (+1)
- (modified) llvm/lib/TargetParser/TargetDataLayout.cpp (+11)
- (modified) llvm/lib/TargetParser/Triple.cpp (+11)
- (modified) llvm/unittests/TargetParser/TripleTest.cpp (+3)
``````````diff
diff --git a/llvm/CMakeLists.txt b/llvm/CMakeLists.txt
index c450ee5a3d72e..0ea66c5f1df47 100644
--- a/llvm/CMakeLists.txt
+++ b/llvm/CMakeLists.txt
@@ -553,6 +553,7 @@ set(LLVM_ALL_TARGETS
set(LLVM_ALL_EXPERIMENTAL_TARGETS
ARC
CSKY
+ Connex
DirectX
M68k
Xtensa
diff --git a/llvm/Maintainers.md b/llvm/Maintainers.md
index e52259236fc19..47ea371b79977 100644
--- a/llvm/Maintainers.md
+++ b/llvm/Maintainers.md
@@ -238,6 +238,11 @@ eddyz87 at gmail.com (email), [eddyz87](https://github.com/eddyz87) (GitHub)
Zi Xuan Wu (Zeson) \
zixuan.wu at linux.alibaba.com (email), [zixuan-wu](https://github.com/zixuan-wu) (GitHub)
+#### Connex backend
+
+Alex Susu \
+alex.susu at gmail.com (email), [alexsusu](https://github.com/alexsusu) (GitHub)
+
#### DirectX backend
Justin Bogner \
diff --git a/llvm/include/llvm/IR/CMakeLists.txt b/llvm/include/llvm/IR/CMakeLists.txt
index c5c4cc4d21b84..1fe0b93d5f32c 100644
--- a/llvm/include/llvm/IR/CMakeLists.txt
+++ b/llvm/include/llvm/IR/CMakeLists.txt
@@ -11,6 +11,7 @@ tablegen(LLVM IntrinsicsAArch64.h -gen-intrinsic-enums -intrinsic-prefix=aarch64
tablegen(LLVM IntrinsicsAMDGPU.h -gen-intrinsic-enums -intrinsic-prefix=amdgcn)
tablegen(LLVM IntrinsicsARM.h -gen-intrinsic-enums -intrinsic-prefix=arm)
tablegen(LLVM IntrinsicsBPF.h -gen-intrinsic-enums -intrinsic-prefix=bpf)
+tablegen(LLVM IntrinsicsConnex.h -gen-intrinsic-enums -intrinsic-prefix=connex)
tablegen(LLVM IntrinsicsDirectX.h -gen-intrinsic-enums -intrinsic-prefix=dx)
tablegen(LLVM IntrinsicsHexagon.h -gen-intrinsic-enums -intrinsic-prefix=hexagon)
tablegen(LLVM IntrinsicsLoongArch.h -gen-intrinsic-enums -intrinsic-prefix=loongarch)
diff --git a/llvm/include/llvm/IR/Intrinsics.td b/llvm/include/llvm/IR/Intrinsics.td
index 4d59ee8676b9e..c60a1ba676b90 100644
--- a/llvm/include/llvm/IR/Intrinsics.td
+++ b/llvm/include/llvm/IR/Intrinsics.td
@@ -2881,6 +2881,7 @@ include "llvm/IR/IntrinsicsNVVM.td"
include "llvm/IR/IntrinsicsMips.td"
include "llvm/IR/IntrinsicsAMDGPU.td"
include "llvm/IR/IntrinsicsBPF.td"
+include "llvm/IR/IntrinsicsConnex.td"
include "llvm/IR/IntrinsicsSystemZ.td"
include "llvm/IR/IntrinsicsWebAssembly.td"
include "llvm/IR/IntrinsicsRISCV.td"
diff --git a/llvm/include/llvm/IR/IntrinsicsConnex.td b/llvm/include/llvm/IR/IntrinsicsConnex.td
new file mode 100644
index 0000000000000..b6a2f3b6adada
--- /dev/null
+++ b/llvm/include/llvm/IR/IntrinsicsConnex.td
@@ -0,0 +1,106 @@
+//===- IntrinsicsConnex.td - Defines Connex-S intrinsics ---*- tablegen -*-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file defines all of the Connex-specific intrinsics.
+//
+//===----------------------------------------------------------------------===//
+
+// All Connex-S vector processor intrinsics start with "llvm.connex."
+//
+let TargetPrefix = "connex" in {
+
+ /*
+ * Note: all intrinsics defined in these .td files start with
+ * the int_ prefix (from intrinsic). For this file they start with
+ * int_connex prefix - otherwise we get the following TableGen error
+ * <<error:Intrinsic 'int_end_repeat' does not start with 'llvm.connex.'!>>
+ *
+ * The LLVM IR intrinsics extend the LLVM language s.t. we can use
+ * these instructions in an LLVM IR program. We also need to define the
+ * corresponding assembly instructions in the back end TableGen files.
+ */
+
+ /* Note: Following Intrinsics.td:
+ class Intrinsic<list<LLVMType> ret_types,
+ list<LLVMType> param_types = [],
+ list<IntrinsicProperty> properties = [],
+ string name = "">
+ */
+
+
+ /* Small-note:
+ llvm_i64_ty makes simpler my LLVM IR generation in the LoopVectorize.cpp
+ module:
+ def int_connex_repeat_x_times : Intrinsic<[], [llvm_i64_ty], []>;
+ But llvm_i32_ty is in accordance to the original i32 type of n.vec in the
+ LoopVectorize.cpp module:
+ def int_connex_repeat_x_times : Intrinsic<[], [llvm_i32_ty], []>;
+
+ Small-note: We get inspired from include/llvm/IR/IntrinsicsPowerPC.td:
+ // Intrinsics used to generate ctrl-based loops.
+ def int_ppc_mtctr : Intrinsic<[], [llvm_anyint_ty], []>;
+
+ Small-note: Trying to use a polymorphic definition, which requires
+ specifying the actual type in Function::Create(FunctionType::get(), ...)
+ is:
+ def int_connex_repeat_x_times : Intrinsic<[], [llvm_anyint_ty], []>;
+ When instantiating it in LoopVectorize.cpp like this:
+ Value *instrinsicFunc = Intrinsic::getDeclaration(M,
+ Intrinsic::connex_repeat_x_times);
+ it gives error at runtime:
+ llvm::ArrayRef<T>::operator[](size_t) const [with T = llvm::Type*;
+ size_t = long unsigned int]: Assertion `Index < Length &&
+ "Invalid index!"' failed.
+ */
+ def int_connex_repeat_x_times : Intrinsic<[], [llvm_i64_ty], []>;
+ def int_connex_end_repeat : Intrinsic<[], [], []>;
+
+ /* Note: Possibly useful in the future.
+ Connex OPINCAA's END_REPEAT does not have a relative offset,
+ as the standard Connex assembly ijmpnzdec instruction,
+ since it falls on Opincaa to compute the jump back relative offset.
+ We can also use a setlc to position it outside the loop created by the
+ ijmpnzdec instruction by using it inside a delay-slot instruction.
+
+ def int_connex_setlc : Intrinsic<[], [llvm_i16_ty], []>;
+ def int_connex_ijmpnzdec : Intrinsic<[], [], []>;
+ */
+
+
+
+ /* IMPORTANT: REDUCE cannot return a value. It is the duty of the host (CPU)
+ to read the result itself from the REDUCE issued by Connex-S.
+ Therefore this definition is incorrect:
+ def int_connex_reduce : Intrinsic<[llvm_i32_ty], [llvm_v128i16_ty], []>;
+ */
+ /* Also good:
+ def int_connex_reduce : Intrinsic<[], [llvm_v128i16_ty], []>;
+ def int_connex_reduce_i32 : Intrinsic<[], [llvm_v64i32_ty], []>;
+ def int_connex_reduce_f16 : Intrinsic<[], [llvm_v128f16_ty], []>;
+ */
+ def int_connex_reduce : Intrinsic<[], [llvm_anyvector_ty], []>;
+
+ /* Note: ctpop is already defined in Intrinsics.td.
+ So the below definition is not required:
+ def int_connex_ctpop : Intrinsic<[llvm_v8i16_ty],
+ [llvm_v8i16_ty], []>;
+ */
+
+
+ // Inherited BPF scalar intrinsics: Specialized loads from packet
+ def int_connex_load_byte : ClangBuiltin<"__builtin_connex_load_byte">,
+ Intrinsic<[llvm_i64_ty], [llvm_ptr_ty, llvm_i64_ty], [IntrReadMem]>;
+ def int_connex_load_half : ClangBuiltin<"__builtin_connex_load_half">,
+ Intrinsic<[llvm_i64_ty], [llvm_ptr_ty, llvm_i64_ty], [IntrReadMem]>;
+ def int_connex_load_word : ClangBuiltin<"__builtin_connex_load_word">,
+ Intrinsic<[llvm_i64_ty], [llvm_ptr_ty, llvm_i64_ty], [IntrReadMem]>;
+ def int_connex_pseudo : ClangBuiltin<"__builtin_connex_pseudo">,
+ Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty]>;
+}
+
diff --git a/llvm/include/llvm/TargetParser/Triple.h b/llvm/include/llvm/TargetParser/Triple.h
index 0e82dd212f34d..83293df2eb11c 100644
--- a/llvm/include/llvm/TargetParser/Triple.h
+++ b/llvm/include/llvm/TargetParser/Triple.h
@@ -58,6 +58,7 @@ class Triple {
avr, // AVR: Atmel AVR microcontroller
bpfel, // eBPF or extended BPF or 64-bit BPF (little endian)
bpfeb, // eBPF or extended BPF or 64-bit BPF (big endian)
+ connex, // Connex vector processor (SIMD array)
csky, // CSKY: csky
dxil, // DXIL 32-bit DirectX bytecode
hexagon, // Hexagon: hexagon
diff --git a/llvm/lib/IR/Intrinsics.cpp b/llvm/lib/IR/Intrinsics.cpp
index 526800e217399..98fef823845b2 100644
--- a/llvm/lib/IR/Intrinsics.cpp
+++ b/llvm/lib/IR/Intrinsics.cpp
@@ -19,6 +19,7 @@
#include "llvm/IR/IntrinsicsAMDGPU.h"
#include "llvm/IR/IntrinsicsARM.h"
#include "llvm/IR/IntrinsicsBPF.h"
+#include "llvm/IR/IntrinsicsConnex.h"
#include "llvm/IR/IntrinsicsHexagon.h"
#include "llvm/IR/IntrinsicsLoongArch.h"
#include "llvm/IR/IntrinsicsMips.h"
diff --git a/llvm/lib/TargetParser/TargetDataLayout.cpp b/llvm/lib/TargetParser/TargetDataLayout.cpp
index d765d9ccb284d..c295308a438d1 100644
--- a/llvm/lib/TargetParser/TargetDataLayout.cpp
+++ b/llvm/lib/TargetParser/TargetDataLayout.cpp
@@ -545,6 +545,17 @@ std::string Triple::computeDataLayout(StringRef ABIName) const {
case Triple::bpfel:
case Triple::bpfeb:
return computeBPFDataLayout(*this);
+ case Triple::connex:
+ // From https://llvm.org/docs/LangRef.html#langref-datalayout
+ return "e" // little endian
+ "-m:e" // ELF LLVM name mangling
+ "-p:64:64:64:64" // 64-bit pointers, 64 bit aligned
+ "-p1:64:64:64:64" // addr space 1: 64-bit pointers, 64 bit aligned
+ "-i64:64" // 64 bit integers, 64 bit aligned
+ "-n32:64" // 32-bit and 64-bit native integer widths
+ "-S128" // 128-bit natural stack alignment
+ "-v128:128:128" // 128-bit (v8i16) vector is 128-bit aligned
+ "-v2048:2048:2048"; // 2048-bit (v128i16) vector is 2048-bit aligned
case Triple::csky:
return computeCSKYDataLayout(*this);
case Triple::dxil:
diff --git a/llvm/lib/TargetParser/Triple.cpp b/llvm/lib/TargetParser/Triple.cpp
index 11ba9ee32f66a..669ec06bc8110 100644
--- a/llvm/lib/TargetParser/Triple.cpp
+++ b/llvm/lib/TargetParser/Triple.cpp
@@ -37,6 +37,7 @@ StringRef Triple::getArchTypeName(ArchType Kind) {
case avr: return "avr";
case bpfeb: return "bpfeb";
case bpfel: return "bpfel";
+ case connex: return "connex";
case csky: return "csky";
case dxil: return "dxil";
case hexagon: return "hexagon";
@@ -208,6 +209,8 @@ StringRef Triple::getArchTypePrefix(ArchType Kind) {
case bpfel:
case bpfeb: return "bpf";
+ case connex: return "connex";
+
case sparcv9:
case sparcel:
case sparc: return "sparc";
@@ -454,6 +457,7 @@ Triple::ArchType Triple::getArchTypeForLLVMName(StringRef Name) {
.Case("armeb", armeb)
.Case("avr", avr)
.StartsWith("bpf", BPFArch)
+ .Case("connex", connex)
.Case("m68k", m68k)
.Case("mips", mips)
.Case("mipsel", mipsel)
@@ -601,6 +605,7 @@ static Triple::ArchType parseArch(StringRef ArchName) {
.Case("arm64ec", Triple::aarch64)
.Case("arm", Triple::arm)
.Case("armeb", Triple::armeb)
+ .Case("connex", Triple::connex)
.Case("thumb", Triple::thumb)
.Case("thumbeb", Triple::thumbeb)
.Case("avr", Triple::avr)
@@ -977,6 +982,7 @@ static Triple::ObjectFormatType getDefaultFormat(const Triple &T) {
case Triple::avr:
case Triple::bpfeb:
case Triple::bpfel:
+ case Triple::connex:
case Triple::csky:
case Triple::hexagon:
case Triple::hsail64:
@@ -1747,6 +1753,7 @@ unsigned Triple::getArchPointerBitWidth(llvm::Triple::ArchType Arch) {
case llvm::Triple::amdil64:
case llvm::Triple::bpfeb:
case llvm::Triple::bpfel:
+ case llvm::Triple::connex:
case llvm::Triple::hsail64:
case llvm::Triple::loongarch64:
case llvm::Triple::mips64:
@@ -1808,6 +1815,7 @@ Triple Triple::get32BitArchVariant() const {
case Triple::avr:
case Triple::bpfeb:
case Triple::bpfel:
+ case Triple::connex:
case Triple::msp430:
case Triple::systemz:
case Triple::ve:
@@ -1912,6 +1920,7 @@ Triple Triple::get64BitArchVariant() const {
case Triple::amdil64:
case Triple::bpfeb:
case Triple::bpfel:
+ case Triple::connex:
case Triple::hsail64:
case Triple::loongarch64:
case Triple::mips64:
@@ -2014,6 +2023,7 @@ Triple Triple::getBigEndianArchVariant() const {
case Triple::aarch64: T.setArch(Triple::aarch64_be); break;
case Triple::bpfel: T.setArch(Triple::bpfeb); break;
+ case Triple::connex: T.setArch(Triple::connex); break;
case Triple::mips64el:
T.setArch(Triple::mips64, getSubArch());
break;
@@ -2089,6 +2099,7 @@ bool Triple::isLittleEndian() const {
case Triple::arm:
case Triple::avr:
case Triple::bpfel:
+ case Triple::connex:
case Triple::csky:
case Triple::dxil:
case Triple::hexagon:
diff --git a/llvm/unittests/TargetParser/TripleTest.cpp b/llvm/unittests/TargetParser/TripleTest.cpp
index 3e803691cfd1f..24ab14b77fc0e 100644
--- a/llvm/unittests/TargetParser/TripleTest.cpp
+++ b/llvm/unittests/TargetParser/TripleTest.cpp
@@ -2187,6 +2187,9 @@ TEST(TripleTest, EndianArchVariants) {
EXPECT_EQ(Triple::bpfeb, T.getBigEndianArchVariant().getArch());
EXPECT_EQ(Triple::bpfel, T.getLittleEndianArchVariant().getArch());
+ T.setArch(Triple::connex);
+ EXPECT_EQ(Triple::connex, T.getArch());
+
T.setArch(Triple::mips64);
EXPECT_EQ(Triple::mips64, T.getBigEndianArchVariant().getArch());
EXPECT_EQ(Triple::NoSubArch, T.getBigEndianArchVariant().getSubArch());
``````````
</details>
https://github.com/llvm/llvm-project/pull/180768
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