The Week Of Monday 9 February 2026 Archives by author

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Starting: Mon Feb 9 00:03:17 PST 2026
Ending: Fri Feb 13 13:06:51 PST 2026
Messages: 4732

• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Aaron Ballman via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Aaron Ballman via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Aaron Ballman via llvm-commits
• [clang] [llvm] Enable fexec-charset option (PR #138895)   Abhina Sree via llvm-commits
• [llvm] [OpenMP][Offload] Handle `present/to/from` when a different entry did `alloc/delete`. (PR #165494)   Abhinav Gaba via llvm-commits
• [llvm] [OpenMP][Offload] Handle `present/to/from` when a different entry did `alloc/delete`. (PR #165494)   Abhinav Gaba via llvm-commits
• [llvm] [AMDGPU] [GlobalIsel] Enabling lit tests for new regbank select (PR #180680)   Abhinav Garg via llvm-commits
• [llvm] [AMDGPU] [GlobalIsel] Enabling lit tests for new regbank select (PR #180680)   Abhinav Garg via llvm-commits
• [llvm] [AMDGPU] [GlobalIsel] Enabling lit tests for new regbank select (PR #180680)   Abhinav Garg via llvm-commits
• [llvm] [AMDGPU] [GlobalIsel] Enabling lit tests for new regbank select (PR #180680)   Abhinav Garg via llvm-commits
• [llvm] [X86] Fold shift into GF2P8AFFINEQB instruction (PR #180019)   Abhiram Jampani via llvm-commits
• [llvm] [X86] Avoid lowering `llrint` via x87 on non-x87 targets (PR #181339)   Abhishek Kaushik via llvm-commits
• [llvm] [X86] Avoid lowering `llrint` via x87 on non-x87 targets (PR #181339)   Abhishek Kaushik via llvm-commits
• [llvm] [X86] Avoid custom lowering `llrint` on non-x87 targets (PR #181339)   Abhishek Kaushik via llvm-commits
• [llvm] [X86] Avoid custom lowering `llrint` on non-x87 targets (PR #181339)   Abhishek Kaushik via llvm-commits
• [llvm] [X86] Avoid custom lowering `llrint` on non-x87 targets (PR #181339)   Abhishek Kaushik via llvm-commits
• [llvm] [X86] Avoid custom lowering `llrint` on non-x87 targets (PR #181339)   Abhishek Kaushik via llvm-commits
• [llvm] [X86] Avoid custom lowering `llrint` on non-x87 targets (PR #181339)   Abhishek Kaushik via llvm-commits
• [llvm] [X86] Avoid custom lowering `llrint` on non-x87 targets (PR #181339)   Abhishek Kaushik via llvm-commits
• [llvm] [ConstantRange] Expand makeAllowedICmpRegion to use samesign to give tighter range (PR #174355)   Adar Dagan via llvm-commits
• [llvm] [ConstantRange] Expand makeAllowedICmpRegion to use samesign to give tighter range (PR #174355)   Adar Dagan via llvm-commits
• [llvm] [ConstantRange] Expand makeAllowedICmpRegion to use samesign to give tighter range (PR #174355)   Adar Dagan via llvm-commits
• [llvm] [ConstantRange] Expand makeAllowedICmpRegion to use samesign to give tighter range (PR #174355)   Adar Dagan via llvm-commits
• [clang] [llvm] [LoopUnroll] Add flag to enforce loop unroll pragma regardless of expensive trip count (PR #180961)   Adel Ejjeh via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Update splitGEP to handle case where including base offset results in an offset that's too large (PR #177653)   Adel Ejjeh via llvm-commits
• [clang] [llvm] [LoopUnroll] Add flag to enforce loop unroll pragma regardless of expensive trip count (PR #180961)   Adel Ejjeh via llvm-commits
• [clang] [llvm] [LoopUnroll] Add flag to enforce loop unroll pragma regardless of expensive trip count (PR #180961)   Adel Ejjeh via llvm-commits
• [clang] [llvm] [LoopUnroll] Add flag to enforce loop unroll pragma regardless of expensive trip count (PR #180961)   Adel Ejjeh via llvm-commits
• [clang] [llvm] [LoopUnroll] Add flag to enforce loop unroll pragma regardless of expensive trip count (PR #180961)   Adel Ejjeh via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Update splitGEP to handle case where including base offset results in an offset that's too large (PR #177653)   Adel Ejjeh via llvm-commits
• [clang] [llvm] [LoopUnroll] Add flag to enforce loop unroll pragma regardless of expensive trip count (PR #180961)   Adel Ejjeh via llvm-commits
• [clang] [llvm] [LoopUnroll] Add flag to enforce loop unroll pragma regardless of expensive trip count (PR #180961)   Adel Ejjeh via llvm-commits
• [llvm] [CoroSplit][DebugInfo] Fix scope of continuation funclets (PR #180523)   Adrian Prantl via llvm-commits
• [llvm] [Support] Support 5-component VersionTuples (PR #181275)   Adrian Prantl via llvm-commits
• [llvm] [Support] Support 5-component VersionTuples (PR #181275)   Adrian Prantl via llvm-commits
• [clang] [lld] [llvm] [Support] Support 5-component VersionTuples (PR #181275)   Adrian Prantl via llvm-commits
• [clang] [lld] [llvm] [Support] Support 5-component VersionTuples (PR #181275)   Adrian Prantl via llvm-commits
• [llvm] [IR] Update docstring for stripAndAccumulateConstantOffset (PR #180365)   Aiden Grossman via llvm-commits
• [llvm] [IR] Update docstring for stripAndAccumulateConstantOffset (PR #180365)   Aiden Grossman via llvm-commits
• [llvm] [IR] Update docstring for stripAndAccumulateConstantOffset (PR #180365)   Aiden Grossman via llvm-commits
• [llvm] [llubi] Add UTC helper (PR #180603)   Aiden Grossman via llvm-commits
• [llvm] [NewPM] Port x86-winehstate (PR #180687)   Aiden Grossman via llvm-commits
• [llvm] [NewPM] Port x86-winehstate (PR #180687)   Aiden Grossman via llvm-commits
• [llvm] [NewPM] Port x86-winehstate (PR #180687)   Aiden Grossman via llvm-commits
• [llvm] [NewPM] Port x86-winehstate (PR #180687)   Aiden Grossman via llvm-commits
• [llvm] [LangRef] Specify semantics for non-byte-sized loads and stores (PR #180739)   Aiden Grossman via llvm-commits
• [llvm] [SLP] Use static_assert() rather than assert() where possible (PR #180867)   Aiden Grossman via llvm-commits
• [llvm] [SelectionDAG] Make sure demanded lanes for AND/MUL-by-zero are frozen (PR #180727)   Aiden Grossman via llvm-commits
• [llvm] [Green Dragon] add green dragon jenkinsfile definitions for multibranch pipelines (PR #180793)   Aiden Grossman via llvm-commits
• [llvm] workflows: Use main-branch-only environment when using ISSUE_SUBSCRIBER_TOKEN (PR #179990)   Aiden Grossman via llvm-commits
• [llvm] [NFC] Fix typos 'bicast' -> 'bitcast' (PR #180890)   Aiden Grossman via llvm-commits
• [llvm] [ADT] Use static_assert() rather than assert() where possible (PR #180867)   Aiden Grossman via llvm-commits
• [llvm] [NewPM] Port x86-issue-vzero-upper (PR #180886)   Aiden Grossman via llvm-commits
• [llvm] [llvm-mc-assemble-fuzzer] Fix Triple passing (PR #181135)   Aiden Grossman via llvm-commits
• [lld] [llvm] [LIT][LLD] Fix Windows test failures due to path separator mismatches (PR #179865)   Aiden Grossman via llvm-commits
• [llvm] workflows/release-documentation: Add release environment (PR #181063)   Aiden Grossman via llvm-commits
• [llvm] [Github] Update requirements_formatting.txt (PR #181184)   Aiden Grossman via llvm-commits
• [llvm] Update mailmap entry (PR #181187)   Aiden Grossman via llvm-commits
• [llvm] [Github] Update requirements_formatting.txt (PR #181184)   Aiden Grossman via llvm-commits
• [lldb] [llvm] [NFC] Ensure MCTargetOptions outlives MCAsmInfo at createMCAsmInfo call sites (PR #180465)   Aiden Grossman via llvm-commits
• [llvm] [Github] Make prune-unused-branches workflow save branch list (PR #181194)   Aiden Grossman via llvm-commits
• [llvm] [Github] Make prune-unused-branches workflow save branch list (PR #181194)   Aiden Grossman via llvm-commits
• [llvm] [Github] Make prune-unused-branches workflow save branch list (PR #181194)   Aiden Grossman via llvm-commits
• [llvm] [Github] Use format-patch instead of diff in prune-unused-branches (PR #181200)   Aiden Grossman via llvm-commits
• [llvm] workflows/release-documentation: Add release environment (PR #181063)   Aiden Grossman via llvm-commits
• [llvm] [Github] Use format-patch instead of diff in prune-unused-branches (PR #181200)   Aiden Grossman via llvm-commits
• [llvm] workflows/commit-access-reivew: Use concurrency to speed up script (PR #181204)   Aiden Grossman via llvm-commits
• [llvm] [Github] Use format-patch instead of diff in prune-unused-branches (PR #181200)   Aiden Grossman via llvm-commits
• [llvm] [Github] Do not fail on unknown branches (PR #181227)   Aiden Grossman via llvm-commits
• [llvm] [Github] Account for cross-repo PRs in prune-unused-branches (PR #181232)   Aiden Grossman via llvm-commits
• [llvm] [Github] Update requirements_formatting.txt (PR #181184)   Aiden Grossman via llvm-commits
• [llvm] [Github] Update requirements_formatting.txt (PR #181184)   Aiden Grossman via llvm-commits
• [llvm] Revert "workflows: Use main-branch-only environment when using ISSUE_SUBSCRIBER_TOKEN (#179990)" (PR #181352)   Aiden Grossman via llvm-commits
• [llvm] Revert "workflows: Use main-branch-only environment when using ISSUE_SUBSCRIBER_TOKEN (#179990)" (PR #181352)   Aiden Grossman via llvm-commits
• [llvm] Revert "workflows: Use main-branch-only environment when using ISSUE_SUBSCRIBER_TOKEN (#179990)" (PR #181352)   Aiden Grossman via llvm-commits
• [llvm] Revert "workflows: Use main-branch-only environment when using ISSUE_SUBSCRIBER_TOKEN (#179990)" (PR #181352)   Aiden Grossman via llvm-commits
• [clang] [llvm] [IR] Add ConstantExpr::getPtrAdd() (PR #181365)   Aiden Grossman via llvm-commits
• [llvm] [ProfCheck][Matrix] Propagate profile information for selects (PR #181248)   Aiden Grossman via llvm-commits
• [llvm] [ProfCheck][Matrix] Propagate profile information for selects (PR #181248)   Aiden Grossman via llvm-commits
• [llvm] [ProfCheck][Matrix] Propagate profile information for selects (PR #181248)   Aiden Grossman via llvm-commits
• [llvm] [Github] Account for cross-repo PRs in prune-unused-branches (PR #181232)   Aiden Grossman via llvm-commits
• [llvm] [Github] Account for cross-repo PRs in prune-unused-branches (PR #181232)   Aiden Grossman via llvm-commits
• [llvm] [Github] Account for cross-repo PRs in prune-unused-branches (PR #181232)   Aiden Grossman via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Akshay K via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Akshay K via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Akshay K via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Akshay K via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Akshay K via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Akshay K via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Akshay K via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Akshay K via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Akshay K via llvm-commits
• [llvm] [OCaml] Remove global_context (PR #180533)   Alan Hu via llvm-commits
• [llvm] [OFFLOAD] Support host plugin on Windows (PR #180401)   Alex Duran via llvm-commits
• [llvm] [OFFLOAD] Support host plugin on Windows (PR #180401)   Alex Duran via llvm-commits
• [llvm] [OFFLOAD] Support host plugin on Windows (PR #180401)   Alex Duran via llvm-commits
• [llvm] [OFFLOAD] Fix TARGET_NAME in plugins common code (PR #180151)   Alex Duran via llvm-commits
• [llvm] [OFFLOAD] Implement excluding filters for debugging (PR #180538)   Alex Duran via llvm-commits
• [llvm] [OFFLOAD] Implement excluding filters for debugging (PR #180538)   Alex Duran via llvm-commits
• [llvm] [OFFLOAD] Implement excluding filters for debugging (PR #180538)   Alex Duran via llvm-commits
• [llvm] [OFFLOAD] Implement excluding filters for debugging (PR #180538)   Alex Duran via llvm-commits
• [llvm] [OFFLOAD] Add support to dump device images (PR #180545)   Alex Duran via llvm-commits
• [llvm] [OFFLOAD] Implement excluding filters for debugging (PR #180538)   Alex Duran via llvm-commits
• [llvm] [OFFLOAD] Add support to dump device images (PR #180545)   Alex Duran via llvm-commits
• [llvm] [OFFLOAD] Implement excluding filters for debugging (PR #180538)   Alex Duran via llvm-commits
• [llvm] [OFFLOAD] Add support to dump device images (PR #180545)   Alex Duran via llvm-commits
• [llvm] [OFFLOAD] Implement excluding filters for debugging (PR #180538)   Alex Duran via llvm-commits
• [llvm] [OFFLOAD] Add support to dump device images (PR #180545)   Alex Duran via llvm-commits
• [llvm] [OFFLOAD] Add support to dump device images (PR #180545)   Alex Duran via llvm-commits
• [llvm] [OFFLOAD] Add support to dump device images (PR #180545)   Alex Duran via llvm-commits
• [llvm] [OFFLOAD] Implement excluding filters for debugging (PR #180538)   Alex Duran via llvm-commits
• [llvm] [OFFLOAD] Add support to dump device images (PR #180545)   Alex Duran via llvm-commits
• [llvm] [OFFLOAD] Support host plugin on Windows (PR #180401)   Alex Duran via llvm-commits
• [llvm] [OFFLOAD] Support host plugin on Windows (PR #180401)   Alex Duran via llvm-commits
• [llvm] [OFFOLOAD][L0] Add support to dump embedded spirv files (PR #180715)   Alex Duran via llvm-commits
• [llvm] [OFFOLOAD][L0] Add support to dump embedded spirv files (PR #180715)   Alex Duran via llvm-commits
• [llvm] [OFFLOAD] Add support to dump device images (PR #180545)   Alex Duran via llvm-commits
• [llvm] [OFFLOAD] Add support to dump device images (PR #180545)   Alex Duran via llvm-commits
• [llvm] [OFFLOAD] Add support to dump device images (PR #180545)   Alex Duran via llvm-commits
• [llvm] [OFFOLOAD][L0] Add support to dump embedded spirv files (PR #180715)   Alex Duran via llvm-commits
• [llvm] [OFFOLOAD][L0] Add support to dump embedded spirv files (PR #180715)   Alex Duran via llvm-commits
• [llvm] [OFFLOAD] Support host plugin on Windows (PR #180401)   Alex Duran via llvm-commits
• [llvm] [OFFLOAD] Add support to dump device images (PR #180545)   Alex Duran via llvm-commits
• [llvm] [OFFLOAD] Add support for host offloading device (PR #177307)   Alex Duran via llvm-commits
• [llvm] [OFFLOAD] Add support for host offloading device (PR #177307)   Alex Duran via llvm-commits
• [llvm] [OFFLOAD] Fix issue where host plugin is added twice to the plugin list (PR #181346)   Alex Duran via llvm-commits
• [llvm] [OFFLOAD] Fix issue where host plugin is added twice to the plugin list (PR #181346)   Alex Duran via llvm-commits
• [llvm] [OFFLOAD] Add support for host offloading device (PR #177307)   Alex Duran via llvm-commits
• [llvm] [NVPTX] Cleanup NVPTXLowerArgs, simplifying logic and improving alignment propagation (PR #180286)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Cleanup NVPTXLowerArgs, simplifying logic and improving alignment propagation (PR #180286)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Cleanup NVPTXLowerArgs, simplifying logic and improving alignment propagation (PR #180286)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Cleanup NVPTXLowerArgs, simplifying logic and improving alignment propagation (PR #180286)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Cleanup NVPTXLowerArgs, simplifying logic and improving alignment propagation (PR #180286)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Cleanup NVPTXLowerArgs, simplifying logic and improving alignment propagation (PR #180286)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Cleanup NVPTXLowerArgs, simplifying logic and improving alignment propagation (PR #180286)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Cleanup NVPTXLowerArgs, simplifying logic and improving alignment propagation (PR #180286)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Cleanup NVPTXLowerArgs, simplifying logic and improving alignment propagation (PR #180286)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Cleanup NVPTXLowerArgs, simplifying logic and improving alignment propagation (PR #180286)   Alex MacLean via llvm-commits
• [llvm] [Hexagon] Fix PIC crash when lowering HVX vector constants (PR #175413)   Alex Reinking via llvm-commits
• [clang] [llvm] [SPIRV][AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)   Alex Voicu via llvm-commits
• [clang] [llvm] [SPIRV][AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)   Alex Voicu via llvm-commits
• [llvm] [GlobalISel] Add G_UDIV/G_SDIV computeKnownBits (PR #181307)   Alex Wang via llvm-commits
• [llvm] [GlobalISel] Add G_UDIV/G_SDIV computeKnownBits (PR #181307)   Alex Wang via llvm-commits
• [llvm] [GlobalISel] Add G_UDIV/G_SDIV computeKnownBits (PR #181307)   Alex Wang via llvm-commits
• [clang] [llvm] [HLSL][DXIL] InterlockedOr and InterlockedOr64 builtins (PR #180804)   Alexander Johnston via llvm-commits
• [llvm] [LAA] Use SCEVPtrToAddr in tryToCreateDiffChecks. (PR #178861)   Alexander Richardson via llvm-commits
• [llvm] [SCEV] Don't create SCEVPtrToAddr for unstable pointer representations. (PR #180718)   Alexander Richardson via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Alexander Richardson via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Alexander Richardson via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Alexander Richardson via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Alexander Richardson via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Alexander Richardson via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Alexander Richardson via llvm-commits
• [llvm] [AMDGPU] Fix LDS address correction in promoteConstantOffsetToImm for async stores (PR #180220)   Alexander Weinrauch via llvm-commits
• [llvm] [DAGCombiner] Fix crash in reassociationCanBreakAddressingModePattern for multi-memop nodes (PR #180268)   Alexander Weinrauch via llvm-commits
• [llvm] [DebugInfo/DWARF] Fix data race in DWARFUnit DIE extraction (PR #180470)   Alexander Yermolovich via llvm-commits
• [llvm] [DebugInfo/DWARF] Fix data race in DWARFUnit DIE extraction (PR #180470)   Alexander Yermolovich via llvm-commits
• [lld] [LLD][COFF] Fix out-of-bounds write when filling gaps with INT3 in code sections (PR #180411)   Alexandre Ganea via llvm-commits
• [lld] [LLD][COFF] Fix out-of-bounds write when filling gaps with INT3 in code sections (PR #180411)   Alexandre Ganea via llvm-commits
• [llvm] [llvm-pdbutil] Dump and parse unknown records (PR #180761)   Alexandre Ganea via llvm-commits
• [llvm] [llvm-pdbutil] Dump and parse unknown records (PR #180761)   Alexandre Ganea via llvm-commits
• [llvm] [llvm-pdbutil] Dump and parse unknown records (PR #180761)   Alexandre Ganea via llvm-commits
• [llvm] [llvm-pdbutil] Dump and parse unknown records (PR #180761)   Alexandre Ganea via llvm-commits
• [llvm] [BOLT][AArch64] Support FEAT_CMPBR branch instructions. (PR #174972)   Alexandros Lamprineas via llvm-commits
• [llvm] [BOLT][AArch64] Support FEAT_CMPBR branch instructions. (PR #174972)   Alexandros Lamprineas via llvm-commits
• [llvm] [BOLT][AArch64] Support FEAT_CMPBR branch instructions. (PR #174972)   Alexandros Lamprineas via llvm-commits
• [llvm] [BOLT][AArch64] Add a unittest for compare-and-branch inversion. (PR #181177)   Alexandros Lamprineas via llvm-commits
• [llvm] [BOLT][AArch64] Add a unittest for compare-and-branch inversion. (PR #181177)   Alexandros Lamprineas via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Alexey Bader via llvm-commits
• [clang] [llvm] [clang-sycl-linker][offload] Set TheImageKind based on IsAOTCompileNeeded flag (PR #180269)   Alexey Bader via llvm-commits
• [llvm] [libsycl] Add USM alloc & release funcs (PR #181120)   Alexey Bader via llvm-commits
• [llvm] [libsycl] Add USM alloc & release funcs (PR #181120)   Alexey Bader via llvm-commits
• [llvm] [libsycl] Add USM alloc & release funcs (PR #181120)   Alexey Bader via llvm-commits
• [llvm] [CodeGen][AMDGPU] TwoAddress: Only skip undef COPY at REG_SEQUENCE lowering when there is Live info or no uses for subreg (PR #175598)   Alexey Bader via llvm-commits
• [llvm] [SLP]Support for zext i1 %x modeling as select %x, 1, 0 (PR #180635)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Support for zext i1 %x modeling as select %x, 1, 0 (PR #180635)   Alexey Bataev via llvm-commits
• [llvm] 993e1f6 - Revert "[SLP]Support for zext i1 %x modeling as select %x, 1, 0"   Alexey Bataev via llvm-commits
• [llvm] [SLP] Use the correct calling convention for vector math routines (PR #180759)   Alexey Bataev via llvm-commits
• [llvm] 78490ac - [SLP]Support for zext i1 %x modeling as select %x, 1, 0   Alexey Bataev via llvm-commits
• [llvm] [SLP]Support for zext i1 %x modeling as select %x, 1, 0 (PR #180635)   Alexey Bataev via llvm-commits
• [llvm] 54cdd90 - [SLP]Skip operands comparing on non-matching (but compatible) instructions   Alexey Bataev via llvm-commits
• [llvm] [SLP]Support for zext i1 %x modeling as select %x, 1, 0 (PR #180635)   Alexey Bataev via llvm-commits
• [llvm] 601364f - [SLP]Correctly process deleted gathered loads and short trees   Alexey Bataev via llvm-commits
• [llvm] [ADT] Use static_assert() rather than assert() where possible (PR #180867)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Initial compatibility support for shl v, 1 and add v, v (PR #181168)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Initial compatibility support for shl v, 1 and add v, v (PR #181168)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Initial compatibility support for shl v, 1 and add v, v (PR #181168)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Initial compatibility support for shl v, 1 and add v, v (PR #181168)   Alexey Bataev via llvm-commits
• [llvm] [SLP][NFC] Use static_assert to confirm SupportedOps is sorted (PR #181397)   Alexey Bataev via llvm-commits
• [llvm] [Hexagon] Support partial reduction intrinsics (PR #179797)   Alexey Karyakin via llvm-commits
• [llvm] [Hexagon] Support partial reduction intrinsics (PR #179797)   Alexey Karyakin via llvm-commits
• [llvm] [AArch64] Inline asm v0-v31 are scalar when having less than 64-bit capacity (PR #169930)   Alexey Merzlyakov via llvm-commits
• [llvm] [AArch64] Inline asm v0-v31 are scalar when having less than 64-bit capacity (PR #169930)   Alexey Merzlyakov via llvm-commits
• [llvm] [BOLT] Keep folded functions in BinaryFunctions map. NFC (PR #180392)   Alexey Moksyakov via llvm-commits
• [llvm] [BOLT] Keep folded functions in BinaryFunctions map. NFC (PR #180392)   Alexey Moksyakov via llvm-commits
• [llvm] [BOLT] Keep folded functions in BinaryFunctions map. NFC (PR #180392)   Alexey Moksyakov via llvm-commits
• [llvm] [bolt] Simplify rodata/literal load for X86_64 & AArch64 (PR #179474)   Alexey Moksyakov via llvm-commits
• [llvm] [bolt] Simplify rodata/literal load for X86_64 & AArch64 (PR #179474)   Alexey Moksyakov via llvm-commits
• [llvm] [bolt] Simplify rodata/literal load for X86_64 & AArch64 (PR #179474)   Alexey Moksyakov via llvm-commits
• [llvm] WIP: [bolt][aarch64] Change indirect call instrumentation snippet (PR #180229)   Alexey Moksyakov via llvm-commits
• [llvm] WIP: [bolt][aarch64] Change indirect call instrumentation snippet (PR #180229)   Alexey Moksyakov via llvm-commits
• [llvm] WIP: [bolt][aarch64] Change indirect call instrumentation snippet (PR #180229)   Alexey Moksyakov via llvm-commits
• [llvm] WIP: [bolt][aarch64] Change indirect call instrumentation snippet (PR #180229)   Alexey Moksyakov via llvm-commits
• [llvm] WIP: [bolt][aarch64] Change indirect call instrumentation snippet (PR #180229)   Alexey Moksyakov via llvm-commits
• [llvm] [bolt][aarch64] Change indirect call instrumentation snippet (PR #180229)   Alexey Moksyakov via llvm-commits
• [llvm] [bolt][aarch64] Change indirect call instrumentation snippet (PR #180229)   Alexey Moksyakov via llvm-commits
• [llvm] [bolt][aarch64] Change indirect call instrumentation snippet (PR #180229)   Alexey Moksyakov via llvm-commits
• [llvm] [bolt][aarch64] Change indirect call instrumentation snippet (PR #180229)   Alexey Moksyakov via llvm-commits
• [llvm] [bolt][aarch64] Change indirect call instrumentation snippet (PR #180229)   Alexey Moksyakov via llvm-commits
• [llvm] [bolt][aarch64] Change indirect call instrumentation snippet (PR #180229)   Alexey Moksyakov via llvm-commits
• [llvm] [bolt][aarch64] Change indirect call instrumentation snippet (PR #180229)   Alexey Moksyakov via llvm-commits
• [llvm] [bolt][aarch64] Change indirect call instrumentation snippet (PR #180229)   Alexey Moksyakov via llvm-commits
• [llvm] [bolt][aarch64] Change indirect call instrumentation snippet (PR #180229)   Alexey Moksyakov via llvm-commits
• [llvm] [bolt][aarch64] Change indirect call instrumentation snippet (PR #180229)   Alexey Moksyakov via llvm-commits
• [llvm] [bolt] Simplify rodata/literal load for X86_64 & AArch64 (PR #179474)   Alexey Moksyakov via llvm-commits
• [llvm] [bolt][aarch64] Change indirect call instrumentation snippet (PR #180229)   Alexey Moksyakov via llvm-commits
• [llvm] [bolt][aarch64] Change indirect call instrumentation snippet (PR #180229)   Alexey Moksyakov via llvm-commits
• [llvm] [bolt][aarch64] Change indirect call instrumentation snippet (PR #180229)   Alexey Moksyakov via llvm-commits
• [llvm] [bolt] Use --reorder-functions option directly (PR #179486)   Alexey Moksyakov via llvm-commits
• [llvm] [bolt] Simplify rodata/literal load for X86_64 & AArch64 (PR #179474)   Alexey Moksyakov via llvm-commits
• [llvm] [bolt] Simplify rodata/literal load for X86_64 & AArch64 (PR #179474)   Alexey Moksyakov via llvm-commits
• [llvm] [bolt] Simplify rodata/literal load for X86_64 & AArch64 (PR #179474)   Alexey Moksyakov via llvm-commits
• [clang] [llvm] [AMDGPU] Restrict `@llvm.amdgcn.image.*` intrinsic's dmask argument (PR #179511)   Alexey Sachkov via llvm-commits
• [clang] [llvm] [AMDGPU] Restrict `@llvm.amdgcn.image.*` intrinsic's dmask argument (PR #179511)   Alexey Sachkov via llvm-commits
• [clang] [llvm] [AMDGPU] Restrict `@llvm.amdgcn.image.*` intrinsic's dmask argument (PR #179511)   Alexey Sachkov via llvm-commits
• [llvm] [llubi] Add initial support for llubi (PR #180022)   Alina Sbirlea via llvm-commits
• [llvm] [GlobalISel][LLT] Introduce FPInfo for LLT (Enable bfloat, ppc128float and others in GlobalISel) (PR #155107)   Amara Emerson via llvm-commits
• [llvm] [AArch64] Fix regression from “Fold scalar-to-vector shuffles into DUP/FMOV" (PR #178227)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Model late forwarding in Neoverse N1 (PR #177590)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Model late forwarding in Neoverse N1 (PR #177590)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Model late forwarding in Neoverse N1 (PR #177590)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Allow FPRCVT Instructions to Run in Streaming Mode (PR #165432)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Allow FPRCVT Instructions to Run in Streaming Mode (PR #165432)   Amina Chabane via llvm-commits
• [llvm] [Hexagon] Handle trunc to i1 in matchRightShift (PR #174737)   Andreas Jonson via llvm-commits
• [llvm] [InstCombine] Optimise the expression `(C & A) | (select (C ^ true), B, false)` with `FoldOrOfAndsWithSelectToLogical` (PR #178438)   Andreas Jonson via llvm-commits
• [llvm] [InstCombine] Optimise the expression `(C & A) | (select (C ^ true), B, false)` with `FoldOrOfAndsWithSelectToLogical` (PR #178438)   Andreas Jonson via llvm-commits
• [llvm] [InstCombine] Optimise the expression `(C & A) | (select (C ^ true), B, false)` with `FoldOrOfAndsWithSelectToLogical` (PR #178438)   Andreas Jonson via llvm-commits
• [llvm] [InstCombine] Optimise the expression `(C & A) | (select (C ^ true), B, false)` with `FoldOrOfAndsWithSelectToLogical` (PR #178438)   Andreas Jonson via llvm-commits
• [llvm] [InstCombine] Optimise the expression `(C & A) | (select (C ^ true), B, false)` with `FoldOrOfAndsWithSelectToLogical` (PR #178438)   Andreas Jonson via llvm-commits
• [llvm] [InstCombine] Optimise the expression `(C && A) | (!C && B)` with `FoldOrOfLogicalAnds` (PR #178438)   Andreas Jonson via llvm-commits
• [llvm] [NFC][VPlan] Test showing that unit-stride-mv should be done later in pipeline (PR #180292)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Add `-vplan-print-after=` option (PR #178700)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Add `-vplan-print-after=` option (PR #178700)   Andrei Elovikov via llvm-commits
• [llvm] [DominanceFrontier] Support post-dominators on graphs with single root (PR #179336)   Andrei Elovikov via llvm-commits
• [llvm] [DominanceFrontier] Support post-dominators on graphs with single root (PR #179336)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Andrei Elovikov via llvm-commits
• [llvm] Provide intrinsics for speculative loads (PR #179642)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Add `-vplan-print-after=` option (PR #178700)   Andrei Elovikov via llvm-commits
• [llvm] [UTC][VPlan] Use `-vplan-print-after` for VPlan-dump-based tests (PR #178736)   Andrei Elovikov via llvm-commits
• [llvm] [UTC][VPlan] Use `-vplan-print-after` for VPlan-dump-based tests (PR #178736)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Run more passes through `RUN_VPLAN_PASS[_NO_VERIFY]` (PR #180580)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Add VPlan-dump-based test for predication (PR #180794)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Add VPlan-dump-based test for predication (PR #180794)   Andrei Elovikov via llvm-commits
• [llvm] [UTC][VPlan] Use `-vplan-print-after` for VPlan-dump-based tests (PR #178736)   Andrei Elovikov via llvm-commits
• [llvm] [UTC][VPlan] Use `-vplan-print-after` for VPlan-dump-based tests (PR #178736)   Andrei Elovikov via llvm-commits
• [llvm] [UTC][VPlan] Use `-vplan-print-after` for VPlan-dump-based tests (PR #178736)   Andrei Elovikov via llvm-commits
• [llvm] [UTC][VPlan] Use `-vplan-print-after` for VPlan-dump-based tests (PR #178736)   Andrei Elovikov via llvm-commits
• [llvm] [UTC][VPlan] Use `-vplan-print-after` for VPlan-dump-based tests (PR #178736)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Add VPlan-dump-based test for predication (PR #180794)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Add VPlan-dump-based test for predication (PR #180794)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Add VPlan-dump-based test for predication (PR #180794)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Add VPlan-dump-based test for predication (PR #180794)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Add VPlan-dump-based test for predication (PR #180794)   Andrei Elovikov via llvm-commits
• [llvm] [DominanceFrontier] Support post-dominators on graphs with single root (PR #179336)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Run more passes through `RUN_VPLAN_PASS[_NO_VERIFY]` (PR #180580)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Run more passes through `RUN_VPLAN_PASS[_NO_VERIFY]` (PR #180580)   Andrei Elovikov via llvm-commits
• [llvm] [UTC][VPlan] Use `-vplan-print-after` for VPlan-dump-based tests (PR #178736)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Add VPlan-dump-based test for predication (PR #180794)   Andrei Elovikov via llvm-commits
• [llvm] [UTC][VPlan] Use `-vplan-print-after` for VPlan-dump-based tests (PR #178736)   Andrei Elovikov via llvm-commits
• [llvm] [UTC][VPlan] Use `-vplan-print-after` for VPlan-dump-based tests (PR #178736)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Reuse allowed-users logic in narrowToSingleScalars (PR #174444)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Add VPlan-dump-based test for predication (PR #180794)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Add VPlan-dump-based test for predication (PR #180794)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Add VPlan-dump-based test for predication (PR #180794)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Add VPlan-dump-based test for predication (PR #180794)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Andrei Elovikov via llvm-commits
• [llvm] [LV] Convert gather loads with constant stride into strided loads (PR #147297)   Andrei Elovikov via llvm-commits
• [llvm] [Hexagon] Update maintainers (PR #177935)   Ankit Aggarwal via llvm-commits
• [llvm] [Hexagon] Update maintainers (PR #177935)   Ankit Aggarwal via llvm-commits
• [llvm] [AMDGPU] Add legalization rules for atomicrmw max/min ops (PR #180502)   Anshil Gandhi via llvm-commits
• [llvm] [AMDGPU] Add legalization rules for atomicrmw max/min ops (PR #180502)   Anshil Gandhi via llvm-commits
• [llvm] [AMDGPU] Add legalization rules for G_ATOMICRMW_FADD (PR #175257)   Anshil Gandhi via llvm-commits
• [llvm] [AMDGPU] Add legalization rules for G_ATOMICRMW_FADD (PR #175257)   Anshil Gandhi via llvm-commits
• [llvm] [AMDGPU] Add legalization rules for G_ATOMICRMW_FADD (PR #175257)   Anshil Gandhi via llvm-commits
• [llvm] [AMDGPU] Add legalization rules for G_ATOMICRMW_FADD (PR #175257)   Anshil Gandhi via llvm-commits
• [llvm] [AMDGPU] Add legalization rules for G_ATOMICRMW_FADD (PR #175257)   Anshil Gandhi via llvm-commits
• [llvm] [AMDGPU] Add legalization rules for atomicrmw max/min ops (PR #180502)   Anshil Gandhi via llvm-commits
• [llvm] [IndVarSimplify] Add safety check for getTruncateExpr in genLoopLimit (PR #172234)   Anshil Gandhi via llvm-commits
• [llvm] [IndVarSimplify] Add safety check for getTruncateExpr in genLoopLimit (PR #172234)   Anshil Gandhi via llvm-commits
• [llvm] [IndVarSimplify] Add safety check for getTruncateExpr in genLoopLimit (PR #172234)   Anshil Gandhi via llvm-commits
• [llvm] [IndVarSimplify] Add safety check for getTruncateExpr in genLoopLimit (PR #172234)   Anshil Gandhi via llvm-commits
• [llvm] [IndVarSimplify] Add safety check for getTruncateExpr in genLoopLimit (PR #172234)   Anshil Gandhi via llvm-commits
• [llvm] [IndVarSimplify] Add safety check for getTruncateExpr in genLoopLimit (PR #181296)   Anshil Gandhi via llvm-commits
• [llvm] [IndVarSimplify] Add safety check for getTruncateExpr in genLoopLimit (PR #181296)   Anshil Gandhi via llvm-commits
• [llvm] [IndVarSimplify] Add safety check for getTruncateExpr in genLoopLimit (PR #181296)   Anshil Gandhi via llvm-commits
• [llvm] [IndVarSimplify] Add safety check for getTruncateExpr in genLoopLimit (PR #181296)   Anshil Gandhi via llvm-commits
• [llvm] [IndVarSimplify] Add safety check for getTruncateExpr in genLoopLimit (PR #181296)   Anshil Gandhi via llvm-commits
• [llvm] [IndVarSimplify] Add safety check for getTruncateExpr in genLoopLimit (PR #181296)   Anshil Gandhi via llvm-commits
• [llvm] [IndVarSimplify] Add safety check for getTruncateExpr in genLoopLimit (PR #181296)   Anshil Gandhi via llvm-commits
• [llvm] [IndVarSimplify] Add safety check for getTruncateExpr in genLoopLimit (PR #181296)   Anshil Gandhi via llvm-commits
• [llvm] [NewPM] Port x86-winehstate (PR #180687)   Anshul Nigham via llvm-commits
• [llvm] [NewPM] Port x86-global-base-reg (PR #180119)   Anshul Nigham via llvm-commits
• [llvm] [NewPM] Port x86-winehstate (PR #180687)   Anshul Nigham via llvm-commits
• [llvm] [NewPM] Port x86-insert-x87-wait (PR #180128)   Anshul Nigham via llvm-commits
• [llvm] [TwoAddressInstruction] Iterate through tied regs when analyzing revcopy (PR #179940)   Anton Sidorenko via llvm-commits
• [llvm] [TwoAddressInstruction] Iterate through tied regs when analyzing revcopy (PR #179940)   Anton Sidorenko via llvm-commits
• [llvm] [TwoAddressInstruction] Iterate through tied regs when analyzing revcopy (PR #179940)   Anton Sidorenko via llvm-commits
• [llvm] [TwoAddressInstruction] Iterate through tied regs when analyzing revcopy (PR #179940)   Anton Sidorenko via llvm-commits
• [llvm] [TwoAddressInstruction] Iterate through tied regs when analyzing revcopy (PR #179940)   Anton Sidorenko via llvm-commits
• [llvm] [TwoAddressInstruction] Iterate through tied regs when analyzing revcopy (PR #179940)   Anton Sidorenko via llvm-commits
• [llvm] [TwoAddressInstruction] Iterate through tied regs when analyzing revcopy (PR #179940)   Anton Sidorenko via llvm-commits
• [llvm] [TwoAddressInstruction] Iterate through tied regs when analyzing revcopy (PR #179940)   Anton Sidorenko via llvm-commits
• [llvm] [IR] Update docstring for stripAndAccumulateConstantOffset (PR #180365)   Antonio Frighetto via llvm-commits
• [llvm] [IR] Update docstring for stripAndAccumulateConstantOffset (PR #180365)   Antonio Frighetto via llvm-commits
• [clang] [llvm] [mlir] [LLVM] Improve IR parsing and printing for target memory locations (PR #176968)   Antonio Frighetto via llvm-commits
• [llvm] [MemorySSA] Relax clobbering checks for calls to consider writes only (PR #179721)   Antonio Frighetto via llvm-commits
• [llvm] [MemorySSA] Relax clobbering checks for calls to consider writes only (PR #179721)   Antonio Frighetto via llvm-commits
• [llvm] [InstCombine] Fold ((X + AddC) & Mask) ^ Mask to ((Mask - AddC) - X) & Mask (PR #174278)   Antonio Frighetto via llvm-commits
• [llvm] [InstCombine] Fold ((X + AddC) & Mask) ^ Mask to ((Mask - AddC) - X) & Mask (PR #174278)   Antonio Frighetto via llvm-commits
• [llvm] [InstCombine] Fold ((X + AddC) & Mask) ^ Mask to ((Mask - AddC) - X) & Mask (PR #174278)   Antonio Frighetto via llvm-commits
• [llvm] [ValueLattice][SCCP] Consider provenance for predicate-derived pointer constants (PR #160083)   Antonio Frighetto via llvm-commits
• [llvm] [ValueLattice][SCCP] Consider provenance for predicate-derived pointer constants (PR #160083)   Antonio Frighetto via llvm-commits
• [llvm] [ValueLattice][SCCP] Consider provenance for predicate-derived pointer constants (PR #160083)   Antonio Frighetto via llvm-commits
• [llvm] [LangRef] Mention allocation elision (PR #177592)   Antonio Frighetto via llvm-commits
• [llvm] [LangRef] Mention allocation elision (PR #177592)   Antonio Frighetto via llvm-commits
• [llvm] [AggressiveInstCombine] Create zext during store merge (PR #181125)   Antonio Frighetto via llvm-commits
• [llvm] [IndVars] Use context for proving same sign (PR #181093)   Antonio Frighetto via llvm-commits
• [llvm] [IndVars] Use context for proving same sign (PR #181093)   Antonio Frighetto via llvm-commits
• [llvm] [llvm/CAS] Add file-based APIs to `ObjectStore` (PR #180657)   Argyrios Kyrtzidis via llvm-commits
• [llvm] [llvm/CAS] Add file-based APIs to `ObjectStore` (PR #180657)   Argyrios Kyrtzidis via llvm-commits
• [llvm] [llvm/unittests/CAS] Fix `CASTests` compilation when `LLVM_ENABLE_ONDISK_CAS=OFF` (PR #181403)   Argyrios Kyrtzidis via llvm-commits
• [llvm] [llvm/CAS] Add file-based APIs to `ObjectStore` (PR #180657)   Argyrios Kyrtzidis via llvm-commits
• [llvm] [llvm/unittests/CAS] Fix `CASTests` compilation when `LLVM_ENABLE_ONDISK_CAS=OFF` (PR #181403)   Argyrios Kyrtzidis via llvm-commits
• [llvm] [X86] i512 shift expansion on AVX512 targets (PR #180432)   Aryan Kadole via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16add to header only (PR #181392)   Atharv Mane via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16add to header only (PR #181392)   Atharv Mane via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16add to header only (PR #181392)   Atharv Mane via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16add to header only (PR #181392)   Atharv Mane via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16add to header only (PR #181392)   Atharv Mane via llvm-commits
• [llvm] [lit] Add JSON diffing support to lit (PR #177513)   Aviral Goel via llvm-commits
• [llvm] [Windows][Support] Add helper to expand short 8.3 form paths (PR #178480)   Ben Dunbobbin via llvm-commits
• [llvm] [Windows][Support] Add helper to expand short 8.3 form paths (PR #178480)   Ben Dunbobbin via llvm-commits
• [llvm] [Windows][Support] Add helper to expand short 8.3 form paths (PR #178480)   Ben Dunbobbin via llvm-commits
• [llvm] [Windows][Support] Add helper to expand short 8.3 form paths (PR #178480)   Ben Dunbobbin via llvm-commits
• [llvm] [Windows][Support] Add helper to expand short 8.3 form paths (PR #178480)   Ben Dunbobbin via llvm-commits
• [llvm] [Windows][Support] Add helper to expand short 8.3 form paths (PR #178480)   Ben Dunbobbin via llvm-commits
• [llvm] [DTLTO][Windows] Expand short 8.3 form paths in ThinLTO module IDs (PR #178303)   Ben Dunbobbin via llvm-commits
• [llvm] [DTLTO][NFC] Minor improvements to the input file preparation class (PR #180824)   Ben Dunbobbin via llvm-commits
• [llvm] [DTLTO][NFC] Minor improvements to the input file preparation class (PR #180824)   Ben Dunbobbin via llvm-commits
• [llvm] [DTLTO][NFC] Minor improvements to the input file preparation class (PR #180824)   Ben Dunbobbin via llvm-commits
• [llvm] [DTLTO][Windows] Expand short 8.3 form paths in ThinLTO module IDs (PR #178303)   Ben Dunbobbin via llvm-commits
• [llvm] [DTLTO][Windows] Expand short 8.3 form paths in ThinLTO module IDs (PR #178303)   Ben Dunbobbin via llvm-commits
• [llvm] [DTLTO][Windows] Expand short 8.3 form paths in ThinLTO module IDs (PR #178303)   Ben Dunbobbin via llvm-commits
• [llvm] [WIP] - [DTLTO][NFC] Minor improvements to DTLTO archive support class (PR #176770)   Ben Dunbobbin via llvm-commits
• [llvm] [WIP] - [DTLTO][NFC] Minor improvements to DTLTO archive support class (PR #176770)   Ben Dunbobbin via llvm-commits
• [llvm] [DTLTO][Windows] Expand short 8.3 form paths in ThinLTO module IDs (PR #178303)   Ben Dunbobbin via llvm-commits
• [llvm] [llvm][cas] Validate OnDiskKeyValueDB against the corresponding OnDiskGraphDB (PR #180852)   Ben Langmuir via llvm-commits
• [llvm] [llvm/unittests/CAS] Fix `CASTests` compilation when `LLVM_ENABLE_ONDISK_CAS=OFF` (PR #181403)   Ben Langmuir via llvm-commits
• [llvm] [llvm-objdump][AVR] Detect AVR architecture from ELF flags for disassembling (PR #180468)   Ben Shi via llvm-commits
• [llvm] [llvm-objdump][AVR] Detect AVR architecture from ELF flags for disassembling (PR #180468)   Ben Shi via llvm-commits
• [llvm] [llvm-objdump][AVR] Detect AVR architecture from ELF flags for disassembling (PR #180468)   Ben Shi via llvm-commits
• [llvm] Add const check (PR #181190)   Benjamin Kramer via llvm-commits
• [llvm] Add const check (PR #181190)   Benjamin Kramer via llvm-commits
• [llvm] Add const check (PR #181190)   Benjamin Kramer via llvm-commits
• [llvm] [LV] Support conditional scalar assignments of masked operations (PR #178862)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Tweak fixed-length loop.dependence.mask costs (PR #175538)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Tweak fixed-length loop.dependence.mask costs (PR #175538)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Tweak fixed-length loop.dependence.mask costs (PR #175538)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Tweak fixed-length loop.dependence.mask costs (PR #175538)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Tweak fixed-length loop.dependence.mask costs (PR #175538)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Support conditional scalar assignments of masked operations (PR #178862)   Benjamin Maxwell via llvm-commits
• [llvm] [SDAG] Implement SplitVecOp for `ISD::VECTOR_FIND_LAST_ACTIVE` (PR #180290)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SVE] Use loop.dependence.war.mask in vector.memcheck (PR #175943)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Benjamin Maxwell via llvm-commits
• [llvm] [RegisterCoalescer] The COPY with the implicit-def of super register is not coalescable. (PR #169997)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Benjamin Maxwell via llvm-commits
• [llvm] [SDAG] Implement SplitVecOp for `ISD::VECTOR_FIND_LAST_ACTIVE` (PR #180290)   Benjamin Maxwell via llvm-commits
• [llvm] [SDAG] Implement missing legalization for `ISD::VECTOR_FIND_LAST_ACTIVE` (PR #180290)   Benjamin Maxwell via llvm-commits
• [llvm] [SDAG] Implement missing legalization for `ISD::VECTOR_FIND_LAST_ACTIVE` (PR #180290)   Benjamin Maxwell via llvm-commits
• [llvm] [SDAG] Implement missing legalization for `ISD::VECTOR_FIND_LAST_ACTIVE` (PR #180290)   Benjamin Maxwell via llvm-commits
• [llvm] Reland "[LoopVectorize] Support vectorization of overflow intrinsics" (#179819) (PR #180526)   Benjamin Maxwell via llvm-commits
• [llvm] Reland "[LoopVectorize] Support vectorization of overflow intrinsics" (#179819) (PR #180526)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Fix issue in VPFirstOrderRecurrencePHIRecipe::usesFirstLaneOnly (PR #179977)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Pass symbolic VF to CalculateTripCountMinusVF and CanonicalIVIncrementForPart (NFC) (PR #180542)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Benjamin Maxwell via llvm-commits
• [llvm] 84f4b1e - Reland "[LoopVectorize] Support vectorization of overflow intrinsics" (#180526)   Benjamin Maxwell via llvm-commits
• [llvm] Reland "[LoopVectorize] Support vectorization of overflow intrinsics" (#179819) (PR #180526)   Benjamin Maxwell via llvm-commits
• [llvm] Reland "[LoopVectorize] Support vectorization of overflow intrinsics" (#179819) (PR #180526)   Benjamin Maxwell via llvm-commits
• [llvm] [SDAG] Implement missing legalization for `ISD::VECTOR_FIND_LAST_ACTIVE` (PR #180290)   Benjamin Maxwell via llvm-commits
• [llvm] Reland "[LV] Support conditional scalar assignments of masked operations" (PR #180708)   Benjamin Maxwell via llvm-commits
• [llvm] Reland "[LV] Support conditional scalar assignments of masked operations" (PR #180708)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Pass symbolic VF to CalculateTripCountMinusVF and CanonicalIVIncrementForPart (NFC) (PR #180542)   Benjamin Maxwell via llvm-commits
• [llvm] [IVDesc] Add `[[maybe_unused]]` to `NumNonPHIUsers` (NFC) (PR #180729)   Benjamin Maxwell via llvm-commits
• [llvm] [IVDesc] Add `[[maybe_unused]]` to `NumNonPHIUsers` (NFC) (PR #180729)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Pass symbolic VF to CalculateTripCountMinusVF and CanonicalIVIncrementForPart (NFC) (PR #180542)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SVE] Use loop.dependence.war.mask in vector.memcheck (PR #175943)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SVE] Use loop.dependence.war.mask in vector.memcheck (PR #175943)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SVE] Use loop.dependence.war.mask in vector.memcheck (PR #175943)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SVE] Use loop.dependence.war.mask in vector.memcheck (PR #175943)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SVE] Use loop.dependence.war.mask in vector.memcheck (PR #175943)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SVE] Use loop.dependence.war.mask in vector.memcheck (PR #175943)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SVE] Use loop.dependence.war.mask in vector.memcheck (PR #175943)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Pass symbolic VF to CalculateTripCountMinusVF and CanonicalIVIncrementForPart (NFC) (PR #180542)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Pass symbolic VF to CalculateTripCountMinusVF and CanonicalIVIncrementForPart (NFC) (PR #180542)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Pass symbolic VF to CalculateTripCountMinusVF and CanonicalIVIncrementForPart (NFC) (PR #180542)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Pass symbolic VF to CalculateTripCountMinusVF and CanonicalIVIncrementForPart (NFC) (PR #180542)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Pass symbolic VF to CalculateTripCountMinusVF and CanonicalIVIncrementForPart (NFC) (PR #180542)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Pass symbolic VF to CalculateTripCountMinusVF and CanonicalIVIncrementForPart (NFC) (PR #180542)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Pass symbolic VF to CalculateTripCountMinusVF and CanonicalIVIncrementForPart (NFC) (PR #180542)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Pass symbolic VF to CalculateTripCountMinusVF and CanonicalIVIncrementForPart (NFC) (PR #180542)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Pass symbolic VF to CalculateTripCountMinusVF and CanonicalIVIncrementForPart (NFC) (PR #180542)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Pass symbolic VF to CalculateTripCountMinusVF and CanonicalIVIncrementForPart (NFC) (PR #180542)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SVE] Use loop.dependence.war.mask in vector.memcheck (PR #175943)   Benjamin Maxwell via llvm-commits
• [llvm] Revert "[WebAssembly] Mark extract.last.active as having invalid cost." (PR #180942)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SVE] Use loop.dependence.war.mask in vector.memcheck (PR #175943)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Pass symbolic VF to CalculateTripCountMinusVF and CanonicalIVIncrementForPart (NFC) (PR #180542)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Pass symbolic VF to CalculateTripCountMinusVF and CanonicalIVIncrementForPart (NFC) (PR #180542)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Prefer SVE for fixed-length [S|U][MIN|MAX] reductions (PR #181161)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SVE] Use loop.dependence.war.mask in vector.memcheck (PR #175943)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SVE] Use loop.dependence.war.mask in vector.memcheck (PR #175943)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SVE] Use loop.dependence.war.mask in vector.memcheck (PR #175943)   Benjamin Maxwell via llvm-commits
• [llvm] Revert "[WebAssembly] Mark extract.last.active as having invalid cost." (PR #180942)   Benjamin Maxwell via llvm-commits
• [llvm] Revert "[WebAssembly] Mark extract.last.active as having invalid cost." (PR #180942)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Prefer SVE for fixed-length [S|U][MIN|MAX] reductions (PR #181161)   Benjamin Maxwell via llvm-commits
• [llvm] Revert "[WebAssembly] Mark extract.last.active as having invalid cost." (PR #180942)   Benjamin Maxwell via llvm-commits
• [llvm] Revert "Revert "[WebAssembly] Mark extract.last.active as having invalid cost."" (PR #181342)   Benjamin Maxwell via llvm-commits
• [llvm] Revert "Revert "[WebAssembly] Mark extract.last.active as having invalid cost."" (PR #181342)   Benjamin Maxwell via llvm-commits
• [llvm] Revert "[WebAssembly] Mark extract.last.active as having invalid cost." (PR #180942)   Benjamin Maxwell via llvm-commits
• [llvm] Revert "[WebAssembly] Mark extract.last.active as having invalid cost." (PR #180942)   Benjamin Maxwell via llvm-commits
• [clang] [llvm] [Clang][inlineasm] Add special support for "rm" output constraints (PR #92040)   Bill Wendling via llvm-commits
• [clang] [llvm] [Clang][inlineasm] Add special support for "rm" output constraints (PR #92040)   Bill Wendling via llvm-commits
• [clang] [llvm] [Clang][inlineasm] Add special support for "rm" output constraints (PR #92040)   Bill Wendling via llvm-commits
• [llvm] [SelectionDAG] Make sure demanded lanes for AND-by-zero are frozen (PR #180727)   Björn Pettersson via llvm-commits
• [llvm] [SelectionDAG] Make sure demanded lanes for AND-by-zero are frozen (PR #180727)   Björn Pettersson via llvm-commits
• [llvm] [SelectionDAG] Make sure demanded lanes for AND-by-zero are frozen (PR #180727)   Björn Pettersson via llvm-commits
• [llvm] [SelectionDAG] Make sure demanded lanes for AND/MUL-by-zero are frozen (PR #180727)   Björn Pettersson via llvm-commits
• [llvm] [SelectionDAG] Make sure demanded lanes for AND/MUL-by-zero are frozen (PR #180727)   Björn Pettersson via llvm-commits
• [llvm] [SelectionDAG] Make sure demanded lanes for AND/MUL-by-zero are frozen (PR #180727)   Björn Pettersson via llvm-commits
• [llvm] [SelectionDAG] Make sure demanded lanes for AND/MUL-by-zero are frozen (PR #180727)   Björn Pettersson via llvm-commits
• [llvm] [SelectionDAG] Make sure demanded lanes for AND/MUL-by-zero are frozen (PR #180727)   Björn Pettersson via llvm-commits
• [llvm] [DAGCombiner] Fix subvector extraction index for big-endian STLF (PR #180795)   Björn Pettersson via llvm-commits
• [llvm] [LangRef] Specify semantics for non-byte-sized loads and stores (PR #180739)   Björn Pettersson via llvm-commits
• [llvm] [LangRef] Specify semantics for non-byte-sized loads and stores (PR #180739)   Björn Pettersson via llvm-commits
• [llvm] [SelectionDAG] Make sure demanded lanes for AND/MUL-by-zero are frozen (PR #180727)   Björn Pettersson via llvm-commits
• [llvm] [DAGCombiner] Fix subvector extraction index for big-endian STLF (PR #180795)   Björn Pettersson via llvm-commits
• [llvm] [SelectionDAG] Make sure demanded lanes for AND/MUL-by-zero are frozen (PR #180727)   Björn Pettersson via llvm-commits
• [llvm] [SelectionDAG] Make sure demanded lanes for AND/MUL-by-zero are frozen (PR #180727)   Björn Pettersson via llvm-commits
• [llvm] [RISCV] Refactor the MC layer SiFive VCIX classes. (PR #180433)   Brandon Wu via llvm-commits
• [llvm] [RISCV] Refactor the MC layer SiFive VCIX classes. (PR #180433)   Brandon Wu via llvm-commits
• [llvm] [RISCV] Refactor the MC layer SiFive VCIX classes. (PR #180433)   Brandon Wu via llvm-commits
• [clang] [llvm] [Clang][RISCV] Add Zvabd intrinsics (PR #180929)   Brandon Wu via llvm-commits
• [clang] [llvm] [Clang][RISCV] Add Zvabd intrinsics (PR #180929)   Brandon Wu via llvm-commits
• [llvm] [RISCV] Move NSRL/NSRA isel to tablegen. NFC (PR #181096)   Brandon Wu via llvm-commits
• [clang] [llvm] [Clang][RISCV] Add Zvabd intrinsics (PR #180929)   Brandon Wu via llvm-commits
• [llvm] [Hexagon] Fix encoding of packets with fixups followed by alignment (PR #179168)   Brian Cain via llvm-commits
• [lld] [lld][Hexagon] Fix R_HEX_TPREL_11_X relocation on duplex instructions (PR #179860)   Brian Cain via llvm-commits
• [llvm] [Hexagon] Fix encoding of packets with fixups followed by alignment (PR #179168)   Brian Cain via llvm-commits
• [lld] [lld][Hexagon] Fix TLS GD PLT to only create PLT entry for __tls_get_addr (PR #180297)   Brian Cain via llvm-commits
• [lld] [lld][Hexagon] Fix TLS GD PLT to only create PLT entry for __tls_get_addr (PR #180297)   Brian Cain via llvm-commits
• [lld] [lld][Hexagon] Fix TLS GD PLT to only create PLT entry for __tls_get_addr (PR #180297)   Brian Cain via llvm-commits
• [lld] [lld][Hexagon] Fix TLS GD PLT to only create PLT entry for __tls_get_addr (PR #180297)   Brian Cain via llvm-commits
• [llvm] [Hexagon] Fix APInt assertion in getBuildVectorConstInts (PR #181202)   Brian Cain via llvm-commits
• [llvm] [Hexagon] Handle truncating COPY from DoubleRegs to IntRegs (PR #181360)   Brian Cain via llvm-commits
• [llvm] [Hexagon] Fix APInt assertion in getBuildVectorConstInts (PR #181202)   Brian Cain via llvm-commits
• [llvm] [Hexagon] Fix APInt assertion in getBuildVectorConstInts (PR #181202)   Brian Cain via llvm-commits
• [llvm] [Hexagon] Fix extractHvxSubvectorPred shuffle mask for small predicates (PR #181364)   Brian Cain via llvm-commits
• [llvm] [Hexagon] Fix extractHvxSubvectorPred shuffle mask for small predicates (PR #181364)   Brian Cain via llvm-commits
• [llvm] [Hexagon] Fix SplitVectors crash in HVX type legalization (PR #181377)   Brian Cain via llvm-commits
• [llvm] [Hexagon] Fix SplitVectors crash in HVX type legalization (PR #181377)   Brian Cain via llvm-commits
• [llvm] [Hexagon] Fix SplitVectors crash in HVX type legalization (PR #181377)   Brian Cain via llvm-commits
• [llvm] draft: Enable libc++ hardening mode for LLVM_ENABLE_ASSERTIONS (PR #130243)   Brian Cain via llvm-commits
• [llvm] Enable libc++ hardening mode for LLVM_ENABLE_ASSERTIONS (PR #130243)   Brian Cain via llvm-commits
• [llvm] Enable libc++ hardening mode for LLVM_ENABLE_ASSERTIONS (PR #130243)   Brian Cain via llvm-commits
• [llvm] Enable libc++ hardening mode for LLVM_ENABLE_ASSERTIONS (PR #130243)   Brian Cain via llvm-commits
• [llvm] [JumpThreading] Preserve assume instructions to maintain constraint information (PR #176600)   Bu Le via llvm-commits
• [flang] [llvm] [OpenMP][flang] Enabling support for Allocate clause in DO construct (PR #180172)   CHANDRA GHALE via llvm-commits
• [flang] [llvm] [OpenMP][flang] Enabling support for Allocate clause in DO construct (PR #180172)   CHANDRA GHALE via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Enabling support for Allocate clause in DO construct (PR #180172)   CHANDRA GHALE via llvm-commits
• [llvm] [CodeGen][AMDGPU] TwoAddress: Only skip undef COPY at REG_SEQUENCE lowering when there is Live info or no uses for subreg (PR #175598)   Carl Ritson via llvm-commits
• [llvm] [CodeGen][AMDGPU] TwoAddress: Only skip undef COPY at REG_SEQUENCE lowering when there is Live info or no uses for subreg (PR #175598)   Carl Ritson via llvm-commits
• [llvm] [CodeGen][AMDGPU] TwoAddress: Only skip undef COPY at REG_SEQUENCE lowering when there is Live info or no uses for subreg (PR #175598)   Carl Ritson via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtual call-site target information in DWARF. (PR #167666)   Carlos Alberto Enciso via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtual call-site target information in DWARF. (PR #167666)   Carlos Alberto Enciso via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for LLVM IR format. (PR #135440)   Carlos Alberto Enciso via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for LLVM IR format. (PR #135440)   Carlos Alberto Enciso via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for LLVM IR format. (PR #135440)   Carlos Alberto Enciso via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for LLVM IR format. (PR #135440)   Carlos Alberto Enciso via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for LLVM IR format. (PR #135440)   Carlos Alberto Enciso via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for LLVM IR format. (PR #135440)   Carlos Alberto Enciso via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for LLVM IR format. (PR #135440)   Carlos Alberto Enciso via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for LLVM IR format. (PR #135440)   Carlos Alberto Enciso via llvm-commits
• [flang] [llvm] [flang] Implement 'F_C_STRING' library function (Fortran 2023) (PR #174474)   Caroline Newcombe via llvm-commits
• [flang] [llvm] [flang] Implement 'F_C_STRING' library function (Fortran 2023) (PR #174474)   Caroline Newcombe via llvm-commits
• [flang] [llvm] [flang] Implement 'F_C_STRING' library function (Fortran 2023) (PR #174474)   Caroline Newcombe via llvm-commits
• [flang] [llvm] [flang] Implement 'F_C_STRING' library function (Fortran 2023) (PR #174474)   Caroline Newcombe via llvm-commits
• [llvm] [AMDGPU] Clean up VOP3PWMMA_Profile by removing XF32 related stuff (PR #180688)   Changpeng Fang via llvm-commits
• [llvm] [AMDGPU][GISel] Add RegBankLegalize support for G_SI_CALL (PR #165747)   Chinmay Deshpande via llvm-commits
• [llvm] [AMDGPU][GISel] Add RegBankLegalize support for G_SI_CALL (PR #165747)   Chinmay Deshpande via llvm-commits
• [llvm] [AMDGPU][GISel] Add RegBankLegalize support for G_SI_CALL (PR #165747)   Chinmay Deshpande via llvm-commits
• [libc] [llvm] [libc][math] Move hypot to shared/math and make it constexpr (PR #177588)   Chinmay Ingle via llvm-commits
• [compiler-rt] [llvm] [tsan] Introduce Adaptive Delay Scheduling to TSAN (PR #178836)   Chris Cotter via llvm-commits
• [compiler-rt] [llvm] [tsan] Introduce Adaptive Delay Scheduling to TSAN (PR #178836)   Chris Cotter via llvm-commits
• [compiler-rt] [llvm] [tsan] Introduce Adaptive Delay Scheduling to TSAN (PR #178836)   Chris Cotter via llvm-commits
• [compiler-rt] [llvm] [tsan] Introduce Adaptive Delay Scheduling to TSAN (PR #178836)   Chris Cotter via llvm-commits
• [compiler-rt] [llvm] [tsan] Introduce Adaptive Delay Scheduling to TSAN (PR #178836)   Chris Cotter via llvm-commits
• [compiler-rt] [llvm] [tsan] Introduce Adaptive Delay Scheduling to TSAN (PR #178836)   Chris Cotter via llvm-commits
• [compiler-rt] [llvm] [tsan] Introduce Adaptive Delay Scheduling to TSAN (PR #178836)   Chris Cotter via llvm-commits
• [compiler-rt] [llvm] [tsan] Introduce Adaptive Delay Scheduling to TSAN (PR #178836)   Chris Cotter via llvm-commits
• [compiler-rt] [llvm] [tsan] Introduce Adaptive Delay Scheduling to TSAN (PR #178836)   Chris Cotter via llvm-commits
• [compiler-rt] [llvm] [tsan] Introduce Adaptive Delay Scheduling to TSAN (PR #178836)   Chris Cotter via llvm-commits
• [compiler-rt] [llvm] [tsan] Introduce Adaptive Delay Scheduling to TSAN (PR #178836)   Chris Cotter via llvm-commits
• [compiler-rt] [llvm] [tsan] Introduce Adaptive Delay Scheduling to TSAN (PR #178836)   Chris Cotter via llvm-commits
• [compiler-rt] [llvm] [tsan] Introduce Adaptive Delay Scheduling to TSAN (PR #178836)   Chris Cotter via llvm-commits
• [compiler-rt] [llvm] [tsan] Introduce Adaptive Delay Scheduling to TSAN (PR #178836)   Chris Cotter via llvm-commits
• [compiler-rt] [llvm] [tsan] Introduce Adaptive Delay Scheduling to TSAN (PR #178836)   Chris Cotter via llvm-commits
• [compiler-rt] [llvm] [tsan] Introduce Adaptive Delay Scheduling to TSAN (PR #178836)   Chris Cotter via llvm-commits
• [llvm] [RISCV] Add an initial set of InstAliases for P extension. (PR #180315)   Christian Herber via llvm-commits
• [llvm] [RISCV] Add an initial set of InstAliases for P extension. (PR #180315)   Christian Herber via llvm-commits
• [llvm] [bazel] NFC: shave off unnecessary newlines (PR #180626)   Christian Sigg via llvm-commits
• [llvm] [bazel] NFC: shave off unnecessary newlines (PR #180626)   Christian Sigg via llvm-commits
• [llvm] b46d6dc - Rename llvm/test/Transforms/LoopIdiom/Sparc -> /SPARC   Christian Sigg via llvm-commits
• [clang] [llvm] [Clang][Lexer] Reland "Detect SSE4.2 availability at runtime in fastParseASCIIIdentifier" (PR #180631)   Corentin Jabot via llvm-commits
• [llvm] [RISCV] Remove redundant czero in multi-word comparisons (PR #180485)   Craig Topper via llvm-commits
• [llvm] [RISCV] Lower (abd[s|u] a, b) to (abs (sub a, b)) for i32/i64 element when `Zvabd` exists (PR #180494)   Craig Topper via llvm-commits
• [llvm] [RISCV] Rename FeatureEnableSelectOptimize to TuneEnableSelectOptimize (PR #180496)   Craig Topper via llvm-commits
• [llvm] [RISCV] Combine ADDD+WMULSU to WMACCSU (PR #180454)   Craig Topper via llvm-commits
• [llvm] [X86] Fixed flags issue of onlyZeroFlagUsed (PR #180405)   Craig Topper via llvm-commits
• [llvm] [TargetLowering] Avoid creating a VTList until we know we need it. NFC (PR #180599)   Craig Topper via llvm-commits
• [llvm] [RISCV] Remove explicitly adding spilled registers as liveins. (PR #180483)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add basic scalar support for MERGE, MVM, and MVMN from P extension (PR #180677)   Craig Topper via llvm-commits
• [llvm] [RISCV] Remove redundant czero in multi-word comparisons (PR #180485)   Craig Topper via llvm-commits
• [llvm] [IROutliner] Add TTI Hook for Propagating Attributes (PR #153985)   Craig Topper via llvm-commits
• [llvm] [RISCV] Stash GPR to FPR if emergency spill slot is not reachable (PR #180685)   Craig Topper via llvm-commits
• [llvm] [Mips] Fix cttz.i32 fails to lower on mips16 (PR #179633)   Craig Topper via llvm-commits
• [llvm] [FastISel] Lower call instruction with illegal type returned (PR #180322)   Craig Topper via llvm-commits
• [llvm] [RISCV] Stash GPR to FPR if emergency spill slot is not reachable (PR #180685)   Craig Topper via llvm-commits
• [llvm] [RISCV] Lower (abd[s|u] a, b) to (abs (sub a, b)) for i32/i64 element when `Zvabd` exists (PR #180494)   Craig Topper via llvm-commits
• [llvm] [RISCV] Lower (abd[s|u] a, b) to (abs (sub a, b)) for i32/i64 element when `Zvabd` exists (PR #180494)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add basic scalar support for MERGE, MVM, and MVMN from P extension (PR #180677)   Craig Topper via llvm-commits
• [llvm] [RISCV] Enable select optimization by default (PR #178394)   Craig Topper via llvm-commits
• [llvm] [RISCV] Relax reversed mask's mask requirement in reverse to strided load/store combine (PR #180706)   Craig Topper via llvm-commits
• [llvm] [ARM] Replace manual CLS expansion with ISD::CTLS (PR #178430)   Craig Topper via llvm-commits
• [llvm] [ARM] Replace manual CLS expansion with ISD::CTLS (PR #178430)   Craig Topper via llvm-commits
• [llvm] [ARM] Replace manual CLS expansion with ISD::CTLS (PR #178430)   Craig Topper via llvm-commits
• [llvm] [RISCV] Stash GPR to FPR if emergency spill slot is not reachable (PR #180685)   Craig Topper via llvm-commits
• [llvm] [RISCV] Refactor the MC layer SiFive VCIX classes. (PR #180433)   Craig Topper via llvm-commits
• [llvm] [RISCV] Refactor the MC layer SiFive VCIX classes. (PR #180433)   Craig Topper via llvm-commits
• [llvm] [RISCV] Refactor the MC layer SiFive VCIX classes. (PR #180433)   Craig Topper via llvm-commits
• [llvm] [RISCV] Refactor the MC layer SiFive VCIX classes. (PR #180433)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add (BSETI x0, 11) to isLoadImm for optimizeCondBranch (PR #180820)   Craig Topper via llvm-commits
• [llvm] [RISCV] Remove non-alias tests from rv32zbb-aliases-valid.s and rv64zbb-aliases-valid.s. NFC (PR #180317)   Craig Topper via llvm-commits
• [llvm] [DAGCombiner] Combine (fshl A, B, S) | (fshr C, D, BW-S) --> (fshl (A|C), (B|D), S) (PR #180889)   Craig Topper via llvm-commits
• [llvm] [LegalizeTypes] Emit FSHL/FSHR from ExpandShiftByConstant when Legal. (PR #180888)   Craig Topper via llvm-commits
• [llvm] [LegalizeTypes] Emit FSHL/FSHR from ExpandShiftByConstant when Legal. (PR #180888)   Craig Topper via llvm-commits
• [llvm] [Docs] Improve Target TableGen Docs (PR #178518)   Craig Topper via llvm-commits
• [llvm] [Docs] Improve Target TableGen Docs (PR #178518)   Craig Topper via llvm-commits
• [llvm] [Docs] Improve Target TableGen Docs (PR #178518)   Craig Topper via llvm-commits
• [llvm] [DAGCombiner] Combine (fshl A, X, Y) | (shl X, Y) --> fshl (A|X), X, Y (PR #180887)   Craig Topper via llvm-commits
• [llvm] [DAGCombiner] Combine (fshl A, X, Y) | (shl X, Y) --> fshl (A|X), X, Y (PR #180887)   Craig Topper via llvm-commits
• [llvm] [DAGCombiner] Combine (fshl A, B, S) | (fshr C, D, BW-S) --> (fshl (A|C), (B|D), S) (PR #180889)   Craig Topper via llvm-commits
• [clang] [llvm] [Clang][RISCV] Add Zvabd intrinsics (PR #180929)   Craig Topper via llvm-commits
• [clang] [llvm] [Clang][RISCV] Add Zvabd intrinsics (PR #180929)   Craig Topper via llvm-commits
• [llvm] [AggressiveInstCombine] POPCNT generation for bit-count pattern (PR #180917)   Craig Topper via llvm-commits
• [llvm] [AggressiveInstCombine] POPCNT generation for bit-count pattern (PR #180917)   Craig Topper via llvm-commits
• [llvm] [AggressiveInstCombine] POPCNT generation for bit-count pattern (PR #180917)   Craig Topper via llvm-commits
• [llvm] [AggressiveInstCombine] POPCNT generation for bit-count pattern (PR #180917)   Craig Topper via llvm-commits
• [llvm] [AggressiveInstCombine] POPCNT generation for bit-count pattern (PR #177109)   Craig Topper via llvm-commits
• [llvm] [DAGCombiner] Combine (fshl A, B, S) | (fshr C, D, BW-S) --> (fshl (A|C), (B|D), S) (PR #180889)   Craig Topper via llvm-commits
• [llvm] [RISC] Rename the P extensions srx/slx tests and add fshl/fshr intrinsic tests. NFC (PR #180984)   Craig Topper via llvm-commits
• [llvm] [RISC] Rename the P extensions srx/slx tests and add fshl/fshr intrinsic tests. NFC (PR #180984)   Craig Topper via llvm-commits
• [llvm] [Docs] Improve Target TableGen Docs (PR #178518)   Craig Topper via llvm-commits
• [llvm] [RISCV] Cost UDIV/UREM by a constant power of 2 as a SHL/AND in getArithmeticInstrCost() (PR #179570)   Craig Topper via llvm-commits
• [llvm] [DemandedBits] Support non-constant shift amounts for funnel shifts (PR #180569)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use NSRL/NSRA for legalizing i64 shifts with P extension on RV32. (PR #181040)   Craig Topper via llvm-commits
• [llvm] [RISCV] Move NSRL/NSRA isel to tablegen. (PR #181096)   Craig Topper via llvm-commits
• [llvm] [RISCV] Move NSRL/NSRA isel to tablegen. NFC (PR #181096)   Craig Topper via llvm-commits
• [llvm] [RISCV] Move NSRL/NSRA isel to tablegen. NFC (PR #181096)   Craig Topper via llvm-commits
• [llvm] Reapply "[MC][TableGen] Expand Opcode field of MCInstrDesc" (#180321) (PR #180954)   Craig Topper via llvm-commits
• [llvm] [RISCV] Move NSRL/NSRA isel to tablegen. NFC (PR #181096)   Craig Topper via llvm-commits
• [llvm] [Docs] Improve Target TableGen Docs (PR #178518)   Craig Topper via llvm-commits
• [llvm] [RISCV] Remove RISCVISD::WMACC*. Match during isel. NFC (PR #181197)   Craig Topper via llvm-commits
• [clang] [llvm] [Clang][RISCV] Add Zvabd intrinsics (PR #180929)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use FSHR in LowerShiftRightParts for P extension on RV64. (PR #181234)   Craig Topper via llvm-commits
• [llvm] [RISCV] Stash GPR to FPR if emergency spill slot is not reachable (PR #180685)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG] Optimize 32-bit udiv with 33-bit magic constants on 64-bit targets (PR #181288)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG] Optimize 32-bit udiv with 33-bit magic constants on 64-bit targets (PR #181288)   Craig Topper via llvm-commits
• [llvm] [RISCV] Remove RISCVISD::WMACC*. Match during isel. NFC (PR #181197)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use PADD_DW instead of ADDD for GPRPair copy on RV32 with P extension (PR #181316)   Craig Topper via llvm-commits
• [llvm] [RISCV] In tryWideningMulAcc, check multiple users before checking operand 1. (PR #181321)   Craig Topper via llvm-commits
• [llvm] [RISCV] In tryWideningMulAcc, check multiple users before checking operand 1. (PR #181321)   Craig Topper via llvm-commits
• [llvm] [RISCV] In tryWideningMulAcc, check multiple users before checking operand 1. (PR #181321)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use PADD_DW instead of ADDD for GPRPair copy on RV32 with P extension (PR #181316)   Craig Topper via llvm-commits
• [llvm] [RISCV] Combine ADDD(lo, hi, x, 0) -> WADDAU(lo, hi, x, 0). Combine WADDAU (WADDAU lo, hi, x, 0), y, 0 -> WADDAU lo, hi, x, y (PR #181396)   Craig Topper via llvm-commits
• [llvm] [RISCV] Combine ADDD(lo, hi, x, 0) -> WADDAU(lo, hi, x, 0). Combine WADDAU (WADDAU lo, hi, x, 0), y, 0 -> WADDAU lo, hi, x, y (PR #181396)   Craig Topper via llvm-commits
• [clang] [llvm] [Clang][RISCV] Add Zvabd intrinsics (PR #180929)   Craig Topper via llvm-commits
• [llvm] [Hexagon] Fix SplitVectors crash in HVX type legalization (PR #181377)   Craig Topper via llvm-commits
• [llvm] 1d588c5 - [RISCV] Rename tablegen class VALU_MV_VS2->VEXT_MV_VS2. NFC   Craig Topper via llvm-commits
• [llvm] [RISCV] Combine ADDD(lo, hi, x, 0) -> WADDAU(lo, hi, x, 0). Combine WADDAU (WADDAU lo, hi, x, 0), y, 0 -> WADDAU lo, hi, x, y (PR #181396)   Craig Topper via llvm-commits
• [llvm] [RISCV] Combine ADDD(lo, hi, x, 0) -> WADDAU(lo, hi, x, 0). Combine WADDAU (WADDAU lo, hi, x, 0), y, 0 -> WADDAU lo, hi, x, y (PR #181396)   Craig Topper via llvm-commits
• [llvm] [RISCV] Combine ADDD(lo, hi, x, 0) -> WADDAU(lo, hi, x, 0). Combine WADDAU (WADDAU lo, hi, x, 0), y, 0 -> WADDAU lo, hi, x, y (PR #181396)   Craig Topper via llvm-commits
• [llvm] [RISCV] Combine ADDD(lo, hi, x, 0) -> WADDAU(lo, hi, x, 0). Combine WADDAU (WADDAU lo, hi, x, 0), y, 0 -> WADDAU lo, hi, x, y (PR #181396)   Craig Topper via llvm-commits
• [llvm] [RISCV] Combine ADDD(lo, hi, x, 0) -> WADDAU(lo, hi, x, 0). Combine WADDAU (WADDAU lo, hi, x, 0), y, 0 -> WADDAU lo, hi, x, y (PR #181396)   Craig Topper via llvm-commits
• [llvm] [RISCV] Combine ADDD(lo, hi, x, 0) -> WADDAU(lo, hi, x, 0). Combine WADDAU (WADDAU lo, hi, x, 0), y, 0 -> WADDAU lo, hi, x, y (PR #181396)   Craig Topper via llvm-commits
• [llvm] [RISCV] Combine ADDD(lo, hi, x, 0) -> WADDAU(lo, hi, x, 0). Combine WADDAU (WADDAU lo, hi, x, 0), y, 0 -> WADDAU lo, hi, x, y (PR #181396)   Craig Topper via llvm-commits
• [llvm] [RISCV] Convert some multiclasses in RISCVInstrInfoV.td to classes if they only have one child def. NFC (PR #181408)   Craig Topper via llvm-commits
• [llvm] [RISCV] In tryWideningMulAcc, check multiple users before checking operand 1. (PR #181321)   Craig Topper via llvm-commits
• [llvm] [GISel][RISCV] Simplify the generated code for narrowScalarCTLS. (PR #180827)   Craig Topper via llvm-commits
• [llvm] [TableGen] Introduce MatcherList to manage a linked list of Matchers. NFC (PR #177875)   Craig Topper via llvm-commits
• [llvm] [Hexagon] Fix encoding of packets with fixups followed by alignment (PR #179168)   Cullen Rhodes via llvm-commits
• [llvm] workflows/release-task: Use less privileged token for uploading release notes (PR #180299)   Cullen Rhodes via llvm-commits
• [llvm] workflows/release-binaries: Pass missing release-version input to upload-release-artifact (PR #180879)   Cullen Rhodes via llvm-commits
• [clang] [lld] [llvm] [LTO][LLD] Prevent invalid LTO libfunc transforms (PR #164916)   Daniel Thornburgh via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Daniel Thornburgh via llvm-commits
• [llvm] [CodeGen] Expand power-of-2 div/rem at IR level in ExpandIRInsts. (PR #180654)   Daniil Fukalov via llvm-commits
• [llvm] [CodeGen] Expand power-of-2 div/rem at IR level in ExpandIRInsts. (PR #180654)   Daniil Fukalov via llvm-commits
• [llvm] [CodeGen] Expand power-of-2 div/rem at IR level in ExpandIRInsts. (PR #180654)   Daniil Fukalov via llvm-commits
• [llvm] [AArch64] Codegen for AArch64 Return Address Signing Hardening (PR #176187)   Daniil Kovalev via llvm-commits
• [llvm] [AArch64] Codegen for AArch64 Return Address Signing Hardening (PR #176187)   Daniil Kovalev via llvm-commits
• [llvm] [AArch64] Codegen for AArch64 Return Address Signing Hardening (PR #176187)   Daniil Kovalev via llvm-commits
• [llvm] [AMDGPU][Scheduler] Fix inconsistent MI slots after rematerialization revert (PR #180646)   Dark Steve via llvm-commits
• [llvm] [AMDGPU][Scheduler] Fix inconsistent MI slots after rematerialization revert (PR #180646)   Dark Steve via llvm-commits
• [llvm] [AMDGPU] Teach SIPreEmitPeephole pass to preserve MachineLoopInfo (PR #178868)   Dark Steve via llvm-commits
• [llvm] [AMDGPU] Teach SIPreEmitPeephole pass to preserve MachineLoopInfo (PR #178868)   Dark Steve via llvm-commits
• [llvm] [AMDGPU][NPM] Port AMDGPUArgumentUsageInfo to NPM (PR #170886)   Dark Steve via llvm-commits
• [llvm] [DebugInfo/DWARF] Fix data race in DWARFUnit DIE extraction (PR #180470)   David Blaikie via llvm-commits
• [llvm] [DebugInfo/DWARF] Fix data race in DWARFUnit DIE extraction (PR #180470)   David Blaikie via llvm-commits
• [llvm] [llvm-dwp] Adds --prioritize-discard-path to explicitly control dwp overflow order. (PR #180909)   David Blaikie via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtual call-site target information in DWARF. (PR #167666)   David Blaikie via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtual call-site target information in DWARF. (PR #167666)   David Blaikie via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtual call-site target information in DWARF. (PR #167666)   David Blaikie via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtual call-site target information in DWARF. (PR #167666)   David Blaikie via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtual call-site target information in DWARF. (PR #167666)   David Blaikie via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtual call-site target information in DWARF. (PR #167666)   David Blaikie via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtual call-site target information in DWARF. (PR #167666)   David Blaikie via llvm-commits
• [llvm] [ARM] Precommit tests: strictfp rounding vector intrinsics (PR #180479)   David Green via llvm-commits
• [llvm] [ARM] Precommit tests: strictfp rounding vector intrinsics (PR #180479)   David Green via llvm-commits
• [llvm] [Analysis] isTriviallyVectorizable - add Intrinsic::clmul along with vectorisation tests (PR #180014)   David Green via llvm-commits
• [llvm] [Thumb2] mve-shuffle.ll - add missing check prefix coverage for some fullfp16 cases (PR #180567)   David Green via llvm-commits
• [llvm] 4dc4abc - [AArch64][GlobalISel] Add test coverage for arm64-neon-2velem-high.ll and mla_mls_merge.ll. NFC   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Reassociate add sub mul. (PR #180753)   David Green via llvm-commits
• [llvm] b2444d0 - [AArch64][ARM] Add some tests for fcmp or branches. NFC   David Green via llvm-commits
• [llvm] [SDAG] Do not treat fp x!=0|y!=0 as special case in branch builder. (PR #180895)   David Green via llvm-commits
• [llvm] [SDAG] Do not treat fp x!=0|y!=0 as special case in branch builder. (PR #180895)   David Green via llvm-commits
• [llvm] [SDAG] Do not treat fp x!=0|y!=0 as special case in branch builder. (PR #180895)   David Green via llvm-commits
• [llvm] [AArch64][ISel] Lower fixed-width i64 vector CLMUL intrinsics (PR #178876)   David Green via llvm-commits
• [llvm] [AArch64][ISel] Lower fixed-width i64 vector CLMUL intrinsics (PR #178876)   David Green via llvm-commits
• [llvm] [AArch64][ISel] Lower fixed-width i64 vector CLMUL intrinsics (PR #178876)   David Green via llvm-commits
• [llvm] [AArch64] Eliminate XTN/SSHLL for vector splats (PR #180913)   David Green via llvm-commits
• [llvm] [AArch64] Fix regression from “Fold scalar-to-vector shuffles into DUP/FMOV" (PR #178227)   David Green via llvm-commits
• [llvm] [AArch64] Fix regression from “Fold scalar-to-vector shuffles into DUP/FMOV" (PR #178227)   David Green via llvm-commits
• [llvm] [AArch64] Fix regression from “Fold scalar-to-vector shuffles into DUP/FMOV" (PR #178227)   David Green via llvm-commits
• [llvm] [AArch64] Fix regression from “Fold scalar-to-vector shuffles into DUP/FMOV" (PR #178227)   David Green via llvm-commits
• [llvm] [AArch64] Fix regression from “Fold scalar-to-vector shuffles into DUP/FMOV" (PR #178227)   David Green via llvm-commits
• [llvm] 14fe03f - [AArch64] Add extra fcmp+select tests. NFC   David Green via llvm-commits
• [llvm] [AArch64] Eliminate XTN/SSHLL for vector splats (PR #180913)   David Green via llvm-commits
• [llvm] [AArch64] Remove NoNaNsFPMath uses (PR #180462)   David Green via llvm-commits
• [llvm] [SDAG] Copy flags in convertMask when legalizing vselect/setcc (PR #180979)   David Green via llvm-commits
• [llvm] [SDAG] Copy flags in convertMask when legalizing vselect/setcc (PR #180979)   David Green via llvm-commits
• [llvm] [AArch64] Eliminate XTN/SSHLL for vector splats (PR #180913)   David Green via llvm-commits
• [llvm] [AArch64] Eliminate XTN/SSHLL for vector splats (PR #180913)   David Green via llvm-commits
• [llvm] [ARM] Precommit tests: strictfp rounding vector intrinsics (PR #180479)   David Green via llvm-commits
• [llvm] [ARM] Precommit tests: strictfp rounding vector intrinsics (PR #180479)   David Green via llvm-commits
• [llvm] ce6dd9c - [AArch64][GlobalISel] Update and regnerate switch-cases-to-branch-and.ll. NFC   David Green via llvm-commits
• [llvm] 8111a6c - [AArch64][GlobalISel] Add some extra sqxtn test coverage. NFC   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Combine to sqxtn pre legalization for FewerElements (PR #181163)   David Green via llvm-commits
• [llvm] 8d5a58e - [AArch64] Even more fcmp+select tests. NFC   David Green via llvm-commits
• [llvm] eb30b5c - [AArch64] Lower SETLE and SETLT vector CondCodes to FCMGT/FCMGE directly.   David Green via llvm-commits
• [compiler-rt] [ASan][Windows] Fix false positive for zero sized rtl allocations (PR #181015)   David Justo via llvm-commits
• [compiler-rt] [ASan][Windows] Fix false positive for zero sized rtl allocations (PR #181015)   David Justo via llvm-commits
• [compiler-rt] [ASan][Windows] Fix false positive for zero sized rtl allocations (PR #181015)   David Justo via llvm-commits
• [compiler-rt] [ASan][Windows] Fix false positive for zero sized rtl allocations (PR #181015)   David Justo via llvm-commits
• [compiler-rt] [ASan][Windows] Fix false positive for zero sized rtl allocations (PR #181015)   David Justo via llvm-commits
• [compiler-rt] [ASan][Windows] Fix false positive for zero sized rtl allocations (PR #181015)   David Justo via llvm-commits
• [llvm] Add llvm-extract-bundle-entry to extend llvm-objcopy (PR #169386)   David Salinas via llvm-commits
• [llvm] [LV] Fix issue in VPFirstOrderRecurrencePHIRecipe::usesFirstLaneOnly (PR #179977)   David Sherwood via llvm-commits
• [llvm] [LV] Fix issue in VPFirstOrderRecurrencePHIRecipe::usesFirstLaneOnly (PR #179977)   David Sherwood via llvm-commits
• [llvm] [LV] Fix issue in VPFirstOrderRecurrencePHIRecipe::usesFirstLaneOnly (PR #179977)   David Sherwood via llvm-commits
• [llvm] [LV] Fix issue in VPFirstOrderRecurrencePHIRecipe::usesFirstLaneOnly (PR #179977)   David Sherwood via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   David Sherwood via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   David Sherwood via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   David Sherwood via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   David Sherwood via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   David Sherwood via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   David Sherwood via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   David Sherwood via llvm-commits
• [llvm] [VPlan] Skip applying InstsToScalarize with forced instr costs. (PR #168269)   David Sherwood via llvm-commits
• [llvm] [LV] Fix issue in VPFirstOrderRecurrencePHIRecipe::usesFirstLaneOnly (PR #179977)   David Sherwood via llvm-commits
• [llvm] [LV][NFC] Add "REQUIRES: assert" to new test file (PR #180522)   David Sherwood via llvm-commits
• [llvm] [LV][NFC] Add "REQUIRES: assert" to new test file (PR #180522)   David Sherwood via llvm-commits
• [llvm] [LV][NFC] Add "REQUIRES: assert" to new test file (PR #180522)   David Sherwood via llvm-commits
• [llvm] Reland "[LoopVectorize] Support vectorization of overflow intrinsics" (#179819) (PR #180526)   David Sherwood via llvm-commits
• [llvm] [LV] Convert scatter w/uniform addr and mask being header mask to scalar store. (PR #172799)   David Sherwood via llvm-commits
• [llvm] [LV] Convert scatter w/uniform addr and mask being header mask to scalar store. (PR #172799)   David Sherwood via llvm-commits
• [llvm] [IR] Change getParamIndexForOptionalMask to assume masked parameter is last (PR #180558)   David Sherwood via llvm-commits
• [llvm] [IR] Change getParamIndexForOptionalMask to assume masked parameter is last (PR #180558)   David Sherwood via llvm-commits
• [llvm] [LV] Add LoopVectorize/VPlan subdirectory for VPlan printing tests. (PR #180611)   David Sherwood via llvm-commits
• [llvm] [IR] Change getParamIndexForOptionalMask to assume masked parameter is last (PR #180558)   David Sherwood via llvm-commits
• [llvm] [IR] Change getParamIndexForOptionalMask to assume masked parameter is last (PR #180558)   David Sherwood via llvm-commits
• [llvm] [LoopIdiomVectorize] Test all needles when vectorising find_first_of loops. (PR #179298)   David Sherwood via llvm-commits
• [llvm] [LoopIdiomVectorize] Test all needles when vectorising find_first_of loops. (PR #179298)   David Sherwood via llvm-commits
• [llvm] [LoopIdiomVectorize] Test all needles when vectorising find_first_of loops. (PR #179298)   David Sherwood via llvm-commits
• [llvm] [IR] Add llvm.masked.load.first.fault intrinsic (PR #156470)   David Sherwood via llvm-commits
• [llvm] [SLP] Use the correct calling convention for vector math routines (PR #180759)   David Sherwood via llvm-commits
• [llvm] [CodeGen] Teach ReplaceWithVeclib to use correct calling convention (PR #180773)   David Sherwood via llvm-commits
• [llvm] [SLP] Use the correct calling convention for vector math routines (PR #180759)   David Sherwood via llvm-commits
• [llvm] [SLP] Use the correct calling convention for vector math routines (PR #180759)   David Sherwood via llvm-commits
• [llvm] [SLP] Use the correct calling convention for vector math routines (PR #180759)   David Sherwood via llvm-commits
• [llvm] [LV] Add LoopVectorize/VPlan subdirectory for VPlan printing tests. (PR #180611)   David Sherwood via llvm-commits
• [llvm] [CodeGen] Teach ReplaceWithVeclib to use correct calling convention (PR #180773)   David Sherwood via llvm-commits
• [llvm] [CodeGen] Teach ReplaceWithVeclib to use correct calling convention (PR #180773)   David Sherwood via llvm-commits
• [llvm] [CodeGen] Teach ReplaceWithVeclib to use correct calling convention (PR #180773)   David Sherwood via llvm-commits
• [llvm] [VPlan] Use ExitingIVValue for pointer inductions as well. (PR #180925)   David Sherwood via llvm-commits
• [llvm] [VPlan] Use ExitingIVValue for pointer inductions as well. (PR #180925)   David Sherwood via llvm-commits
• [llvm] [VPlan] Use ExitingIVValue for pointer inductions as well. (PR #180925)   David Sherwood via llvm-commits
• [llvm] [VPlan] Use ExitingIVValue for pointer inductions as well. (PR #180925)   David Sherwood via llvm-commits
• [llvm] [IR] Change getParamIndexForOptionalMask to assume masked parameter is last (PR #180558)   David Sherwood via llvm-commits
• [llvm] [IR] Change getParamIndexForOptionalMask to assume masked parameter is last (PR #180558)   David Sherwood via llvm-commits
• [llvm] [CodeGen] Teach ReplaceWithVeclib to use correct calling convention (PR #180773)   David Sherwood via llvm-commits
• [llvm] [CodeGen] Teach ReplaceWithVeclib to use correct calling convention (PR #180773)   David Sherwood via llvm-commits
• [llvm] [IR] Change getParamIndexForOptionalMask to assume masked parameter is last (PR #180558)   David Sherwood via llvm-commits
• [llvm] [IR] Change getParamIndexForOptionalMask to assume masked parameter is last (PR #180558)   David Sherwood via llvm-commits
• [llvm] [DebugInfo] DWARFFormValue use formatv instead of format (PR #180498)   David Spickett via llvm-commits
• [llvm] [DebugInfo] DWARFFormValue use formatv instead of format (PR #180498)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSD] Add riscv64 support (PR #180549)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSD] Add riscv64 support (PR #180549)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSD] Add riscv64 support (PR #180549)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSD] Add riscv64 support (PR #180549)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSD] Add riscv64 support (PR #180549)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSD] Add riscv64 support (PR #180549)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSD] Add riscv64 support (PR #180549)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSD] Add riscv64 support (PR #180549)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSD] Add riscv64 support (PR #180549)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSD] Add riscv64 support (PR #180549)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSD] Add riscv64 support (PR #180549)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSD] Add riscv64 support (PR #180549)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSD] Add riscv64 support (PR #180549)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSD] Add riscv64 support (PR #180549)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSD] Add riscv64 support (PR #180549)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSD] Add riscv64 support (PR #180549)   David Spickett via llvm-commits
• [llvm] [DebugInfo] DWARFFormValue use formatv instead of format (PR #180498)   David Spickett via llvm-commits
• [llvm] [DebugInfo] DWARFFormValue use formatv instead of format (PR #180498)   David Spickett via llvm-commits
• [llvm] [DebugInfo] DWARFFormValue use formatv instead of format (PR #180498)   David Spickett via llvm-commits
• [llvm] [DebugInfo] DWARFFormValue use formatv instead of format (PR #180498)   David Spickett via llvm-commits
• [llvm] [DebugInfo] DWARFFormValue use formatv instead of format (PR #180498)   David Spickett via llvm-commits
• [llvm] [DebugInfo] DWARFFormValue use formatv instead of format (PR #180498)   David Spickett via llvm-commits
• [llvm] [DebugInfo] DWARFFormValue use formatv instead of format (PR #180498)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add ppc64le support (PR #180669)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add ppc64le support (PR #180669)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add ppc64le support (PR #180669)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add ppc64le support (PR #180669)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add ppc64le support (PR #180669)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add ppc64le support (PR #180669)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add ppc64le support (PR #180669)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add ppc64le support (PR #180669)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add ppc64le support (PR #180669)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add ppc64le support (PR #180669)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSD] Add riscv64 support (PR #180549)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSD] Add riscv64 support (PR #180549)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add arm support (PR #180674)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add arm support (PR #180674)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add ppc64le support (PR #180669)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add ppc64le support (PR #180669)   David Spickett via llvm-commits
• [lldb] [llvm] [llvm][lldb] Add check for incorrect target features (PR #180901)   David Spickett via llvm-commits
• [lldb] [llvm] [llvm][lldb] Add check for incorrect target features (PR #180901)   David Spickett via llvm-commits
• [lldb] [llvm] [llvm][lldb] Add check for incorrect target features (PR #180901)   David Spickett via llvm-commits
• [lldb] [llvm] [llvm][lldb] Add check for incorrect target features (PR #180901)   David Spickett via llvm-commits
• [lldb] [llvm] [llvm][lldb] Add check for incorrect target features (PR #180901)   David Spickett via llvm-commits
• [lldb] [llvm] [llvm][lldb] Add check for incorrect target features (PR #180901)   David Spickett via llvm-commits
• [lldb] [llvm] [llvm][lldb] Add check for incorrect target features (PR #180901)   David Spickett via llvm-commits
• [lldb] [llvm] [llvm][lldb] Add check for incorrect target features (PR #180901)   David Spickett via llvm-commits
• [lldb] [llvm] [llvm][lldb] Add check for incorrect target features (PR #180901)   David Spickett via llvm-commits
• [lldb] [llvm] [llvm][lldb] Add check for incorrect target features (PR #180901)   David Spickett via llvm-commits
• [lldb] [llvm] [llvm][lldb] Add check for incorrect target features (PR #180901)   David Spickett via llvm-commits
• [lldb] [llvm] [llvm][lldb] Add check for incorrect target features (PR #180901)   David Spickett via llvm-commits
• [lldb] [llvm] [llvm][lldb] Add check for incorrect target features (PR #180901)   David Spickett via llvm-commits
• [lldb] [llvm] [llvm][lldb] Add check for incorrect target features (PR #180901)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add riscv64 support (PR #180670)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add riscv64 support (PR #180670)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add riscv64 support (PR #180670)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add riscv64 support (PR #180670)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add riscv64 support (PR #180670)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add arm support (PR #180674)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add arm support (PR #180674)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add arm support (PR #180674)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add arm support (PR #180674)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add ppc64le support (PR #180669)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add arm support (PR #180674)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add arm support (PR #180674)   David Spickett via llvm-commits
• [llvm] [ReleaseNotes] Create subheader for LLDB/FreeBSD (PR #181000)   David Spickett via llvm-commits
• [llvm] [ReleaseNotes] Create subheader for LLDB/FreeBSD (PR #181000)   David Spickett via llvm-commits
• [llvm] [DebugInfo] DWARFFormValue use formatv instead of format (PR #180498)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add arm support (PR #180674)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add arm support (PR #180674)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add arm support (PR #180674)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add arm support (PR #180674)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add arm support (PR #180674)   David Spickett via llvm-commits
• [llvm] [MC][ARM] Don't set funcs to Thumb as a side effect of .hidden (PR #181156)   David Spickett via llvm-commits
• [llvm] [MC][ARM] Don't set funcs to Thumb as a side effect of .hidden (PR #181156)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add arm support (PR #180674)   David Spickett via llvm-commits
• [llvm] [DebugInfo] DWARFFormValue use formatv instead of format (PR #180498)   David Spickett via llvm-commits
• [llvm] [DebugInfo] DWARFFormValue use formatv instead of format (PR #180498)   David Spickett via llvm-commits
• [llvm] [cross-project-tests] Fix lldb version regex (PR #180204)   David Stenberg via llvm-commits
• [llvm] [llvm-cov] Support multicall binary (PR #178294)   David Zbarsky via llvm-commits
• [llvm] [llvm-isel-fuzzer] Fix crash in `IRMutator::getEffectiveTerminator` (PR #180853)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly] Add a WASM table to `llvm/test/MC/WebAssembly/wasm64.s`. NFC (PR #180861)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly] Define `__funcref_call_table` in generated asm and objects (PR #180900)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly] Define `__funcref_call_table` in generated asm and objects (PR #180900)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly] Define `__funcref_call_table` in generated asm and objects (PR #180900)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly] Replace Reachability with SCCs in Irreducible CFG Fixer (PR #179722)   Demetrius Kanios via llvm-commits
• [llvm] [CodeGen] Improve `getLoadExtAction` and friends (PR #181104)   Demetrius Kanios via llvm-commits
• [llvm] [CodeGen] Improve `getLoadExtAction` and friends (PR #181104)   Demetrius Kanios via llvm-commits
• [llvm] [CodeGen] Improve `getLoadExtAction` and friends (PR #181104)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly] Define `__funcref_call_table` in generated asm and objects (PR #180900)   Demetrius Kanios via llvm-commits
• [llvm] Revert "[WebAssembly] Mark extract.last.active as having invalid cost." (PR #180942)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] Error on Wasm SjLj if +exception-handling is missing (PR #181070)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] Define `__funcref_call_table` in generated asm and objects (PR #180900)   Derek Schuff via llvm-commits
• [llvm] `dwarf2yaml.cpp` optimizations (PR #179048)   Derek Schuff via llvm-commits
• [llvm] [SLP]Support for zext i1 %x modeling as select %x, 1, 0 (PR #180635)   Devon Loehr via llvm-commits
• [llvm] [LLVM-Tablegen] Explicit Type Constraints for Overloaded LLVM Intrinsics (PR #172442)   Dharuni R Acharya via llvm-commits
• [llvm] [AMDGPU] Physical register tracking in GCN trackers. (PR #177223)   Dhruva Chakrabarti via llvm-commits
• [llvm] [AMDGPU] Physical register tracking in GCN trackers. (PR #177223)   Dhruva Chakrabarti via llvm-commits
• [llvm] [AMDGPU] Add intrinsic exposing s_alloc_vgpr (PR #163951)   Diana Picus via llvm-commits
• [llvm] [AMDGPU] Add intrinsic exposing s_alloc_vgpr (PR #163951)   Diana Picus via llvm-commits
• [llvm] [AMDGPU] Physical register tracking in GCN trackers. (PR #177223)   Diana Picus via llvm-commits
• [llvm] [AMDGPU] Physical register tracking in GCN trackers. (PR #177223)   Diana Picus via llvm-commits
• [llvm] [AMDGPU] Physical register tracking in GCN trackers. (PR #177223)   Diana Picus via llvm-commits
• [llvm] [AMDGPU] Physical register tracking in GCN trackers. (PR #177223)   Diana Picus via llvm-commits
• [llvm] [AMDGPU] Physical register tracking in GCN trackers. (PR #177223)   Diana Picus via llvm-commits
• [llvm] [AMDGPU] Physical register tracking in GCN trackers. (PR #177223)   Diana Picus via llvm-commits
• [llvm] [AMDGPU] Physical register tracking in GCN trackers. (PR #177223)   Diana Picus via llvm-commits
• [lld] [LLD][ELF][RISCV] Support big-endian RISC-V linking (PR #180912)   Djordje Todorovic via llvm-commits
• [lld] [LLD][ELF][RISCV] Support big-endian RISC-V linking (PR #180912)   Djordje Todorovic via llvm-commits
• [llvm] Add const check (PR #181190)   Dmitrii Makarenko via llvm-commits
• [llvm] Add const check (PR #181190)   Dmitrii Makarenko via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Dmitry Rogozhkin via llvm-commits
• [llvm] [libsycl] Add USM alloc & release funcs (PR #181120)   Dmitry Rogozhkin via llvm-commits
• [llvm] [libsycl] Add USM alloc & release funcs (PR #181120)   Dmitry Rogozhkin via llvm-commits
• [llvm] [libsycl] Add USM alloc & release funcs (PR #181120)   Dmitry Rogozhkin via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.convert.from.arbitrary (PR #179318)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Emit ceil(Bitwidth / 32) words during OpConstant creation (PR #180218)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Emit ceil(Bitwidth / 32) words during OpConstant creation (PR #180218)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Emit ceil(Bitwidth / 32) words during OpConstant creation (PR #180218)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIRV] Fix constant materialization for width > 64bit (PR #180182)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Emit ceil(Bitwidth / 32) words during OpConstant creation (PR #180218)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Emit ceil(Bitwidth / 32) words during OpConstant creation (PR #180218)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIRV] Fix APInt overflow in memset constant array creation (PR #180189)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIRV] Add handling for `uinc_wrap` and `udec_wrap` atomics (PR #179114)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIRV] Add handling for `uinc_wrap` and `udec_wrap` atomics (PR #179114)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIRV] Scalarize single-element vectors in type creation (PR #180735)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIRV] Scalarize single-element vectors in type creation (PR #180735)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIRV] Scalarize single-element vectors in type creation (PR #180735)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIRV] Scalarize single-element vectors in type creation (PR #180735)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIRV] Scalarize single-element vectors in type creation (PR #180735)   Dmitry Sidorov via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.convert.from.arbitrary (PR #179318)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIRV] Legalize extended integers for compare instructions. (PR #180254)   Dmitry Sidorov via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Dmitry Vodopyanov via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Dmitry Vodopyanov via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Dmitry Vodopyanov via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Dmitry Vodopyanov via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Dmitry Vodopyanov via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Dmitry Vodopyanov via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Dmitry Vodopyanov via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Dmitry Vodopyanov via llvm-commits
• [compiler-rt] [llvm] [tsan] Introduce Adaptive Delay Scheduling to TSAN (PR #178836)   Dmitry Vyukov via llvm-commits
• [compiler-rt] [llvm] [tsan] Introduce Adaptive Delay Scheduling to TSAN (PR #178836)   Dmitry Vyukov via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [lldb] [llvm] [lldb-dap] Add unknown request handler (PR #181109)   Ebuka Ezike via llvm-commits
• [lldb] [llvm] [lldb-dap] Add unknown request handler (PR #181109)   Ebuka Ezike via llvm-commits
• [lldb] [llvm] [lldb-dap] Add unknown request handler (PR #181109)   Ebuka Ezike via llvm-commits
• [lldb] [llvm] [lldb-dap] Add unknown request handler (PR #181109)   Ebuka Ezike via llvm-commits
• [lldb] [llvm] [lldb-dap] Add unknown request handler (PR #181109)   Ebuka Ezike via llvm-commits
• [lldb] [llvm] [lldb-dap] Add unknown request handler (PR #181109)   Ebuka Ezike via llvm-commits
• [lldb] [llvm] [lldb-dap] Add unknown request handler (PR #181109)   Ebuka Ezike via llvm-commits
• [lldb] [llvm] [lldb-dap] Add unknown request handler (PR #181109)   Ebuka Ezike via llvm-commits
• [lldb] [llvm] [lldb-dap] Add unknown request handler (PR #181109)   Ebuka Ezike via llvm-commits
• [llvm] [DA] Fixing correctness issues in StrongSIV test (PR #178047)   Ehsan Amiri via llvm-commits
• [llvm] [DA] Rewrite the formula in the Strong SIV test (PR #179665)   Ehsan Amiri via llvm-commits
• [llvm] [DA] Rewrite the formula in the Strong SIV test (PR #179665)   Ehsan Amiri via llvm-commits
• [llvm] [DA] Rewrite the formula in the Strong SIV test (PR #179665)   Ehsan Amiri via llvm-commits
• [llvm] [DA] Rewrite the formula in the Strong SIV test (PR #179665)   Ehsan Amiri via llvm-commits
• [llvm] [DA] Add test for RDIV misses dependency due to "minor algebra" (NFC) (PR #179653)   Ehsan Amiri via llvm-commits
• [llvm] [DA] Ensure nsw flag is checked for StrongSIV addrecs (PR #178047)   Ehsan Amiri via llvm-commits
• [llvm] [DA] Ensure nsw flag is checked for StrongSIV addrecs (PR #178047)   Ehsan Amiri via llvm-commits
• [llvm] [win][aarch64] The Windows Control Flow Guard Check function also preserves X15 (PR #179738)   Eli Friedman via llvm-commits
• [llvm] [win][aarch64] The Windows Control Flow Guard Check function also preserves X15 (PR #179738)   Eli Friedman via llvm-commits
• [llvm] [win][aarch64] The Windows Control Flow Guard Check function also preserves X15 (PR #179738)   Eli Friedman via llvm-commits
• [llvm] TableGen: Allow defining sets of runtime libraries (PR #144978)   Eli Friedman via llvm-commits
• [lld] [lld] Fix undefined behavior with misaligned SHT_GROUP section. (PR #180848)   Eli Friedman via llvm-commits
• [lld] [lld] Fix undefined behavior with misaligned SHT_GROUP section. (PR #180848)   Eli Friedman via llvm-commits
• [llvm] [MC][ARM] Don't set funcs to Thumb as a side effect of .hidden (PR #181156)   Eli Friedman via llvm-commits
• [llvm] [x86] Enable indirect tail calls with more arguments (PR #137643)   Eli Friedman via llvm-commits
• [llvm] [x86] Enable indirect tail calls with more arguments (PR #137643)   Eli Friedman via llvm-commits
• [llvm] [x86] Enable indirect tail calls with more arguments (PR #137643)   Eli Friedman via llvm-commits
• [llvm] [x86] Enable indirect tail calls with more arguments (PR #137643)   Eli Friedman via llvm-commits
• [llvm] [x86] Enable indirect tail calls with more arguments (PR #137643)   Eli Friedman via llvm-commits
• [llvm] [X86] Correctly call 16 byte atomic helpers on x86_64 Windows (PR #181356)   Eli Friedman via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Eli Friedman via llvm-commits
• [llvm] [GlobalISel] Use named constant for impossible repair cost (PR #180490)   Eliz Habiboullah via llvm-commits
• [llvm] [GlobalISel] Use named constant for impossible repair cost (PR #180490)   Eliz Habiboullah via llvm-commits
• [llvm] [GlobalISel] Use named constant for impossible repair cost (PR #180490)   Eliz Habiboullah via llvm-commits
• [compiler-rt] [llvm] [Profile] Enable binary profile correlation for Mach-O binaries (PR #179937)   Ellis Hoag via llvm-commits
• [llvm] [LV] Convert scatter w/uniform addr and mask being header mask to scalar store. (PR #172799)   Elvis Wang via llvm-commits
• [llvm] [LV] Convert scatter w/uniform addr and mask being header mask to scalar store. (PR #172799)   Elvis Wang via llvm-commits
• [llvm] [LV] Convert scatter w/uniform addr and mask being header mask to scalar store. (PR #172799)   Elvis Wang via llvm-commits
• [llvm] [LV] Convert scatter w/uniform addr and mask being header mask to scalar store. (PR #172799)   Elvis Wang via llvm-commits
• [llvm] [LV] Convert scatter w/uniform addr and mask being header mask to scalar store. (PR #172799)   Elvis Wang via llvm-commits
• [llvm] [LV] Convert scatter w/uniform addr and mask being header mask to scalar store. (PR #172799)   Elvis Wang via llvm-commits
• [llvm] [LV] Convert scatter w/uniform addr and mask being header mask to scalar store. (PR #172799)   Elvis Wang via llvm-commits
• [llvm] [LV] Convert scatter w/uniform addr and mask being header mask to scalar store. (PR #172799)   Elvis Wang via llvm-commits
• [llvm] [LV] Convert scatter w/uniform addr and mask being header mask to scalar store. (PR #172799)   Elvis Wang via llvm-commits
• [llvm] [mlir] Fix #180988: Add GPUDialect and DataLayoutInterfaces to OpenACC related dependencies (PR #181027)   Emilio Cota via llvm-commits
• [llvm] [mlir] Fix #180988: Add GPUDialect and DataLayoutInterfaces to OpenACC related dependencies (PR #181027)   Emilio Cota via llvm-commits
• [llvm] [GlobalISel] Fix type mismatch in LegalizerHelper ternary (PR #180865)   Eric Christopher via llvm-commits
• [llvm] [GlobalISel] Fix type mismatch in LegalizerHelper ternary (PR #180865)   Eric Christopher via llvm-commits
• [llvm] Fix type mismatch in ARM calling convention ternary (PR #180872)   Eric Christopher via llvm-commits
• [llvm] Suppress GCC dangling-pointer false positive for RAII listener pattern (PR #180875)   Eric Christopher via llvm-commits
• [llvm] [llvm][.gitignore] Add instructions.md to coding assistants section (PR #181211)   Eric Christopher via llvm-commits
• [llvm] [llvm][.gitignore] Add instructions.md to coding assistants section (PR #181211)   Eric Christopher via llvm-commits
• [llvm] [llvm][.gitignore] Add instructions.md to coding assistants section (PR #181211)   Eric Christopher via llvm-commits
• [llvm] [llvm][.gitignore] Add instructions.md to coding assistants section (PR #181211)   Eric Christopher via llvm-commits
• [llvm] [llvm][.gitignore] Add instructions.md to coding assistants section (PR #181211)   Eric Christopher via llvm-commits
• [llvm] [GlobalISel] Fix type mismatch in LegalizerHelper ternary (PR #180865)   Eric Christopher via llvm-commits
• [llvm] Reapply "[MC][TableGen] Expand Opcode field of MCInstrDesc" (#180321) (PR #180954)   Erich Keane via llvm-commits
• [flang] [llvm] [flang][runtime] OPEN(STATUS='NEW') should fail on extant file (PR #180605)   Eugene Epshteyn via llvm-commits
• [flang] [llvm] [flang] Implement 'F_C_STRING' library function (Fortran 2023) (PR #174474)   Eugene Epshteyn via llvm-commits
• [flang] [llvm] [flang] Implement 'F_C_STRING' library function (Fortran 2023) (PR #174474)   Eugene Epshteyn via llvm-commits
• [flang] [llvm] [flang] Implement 'F_C_STRING' library function (Fortran 2023) (PR #174474)   Eugene Epshteyn via llvm-commits
• [flang] [llvm] [flang] Implement 'F_C_STRING' library function (Fortran 2023) (PR #174474)   Eugene Epshteyn via llvm-commits
• [llvm] [SPIRV] Implement NaN propation for FMINIMUM and FMAXIMUM. (PR #180797)   Faijul Amin via llvm-commits
• [llvm] [SPIRV] Implement NaN propation for FMINIMUM and FMAXIMUM. (PR #180797)   Faijul Amin via llvm-commits
• [llvm] [SPIRV] Implement NaN propation for FMINIMUM and FMAXIMUM. (PR #180797)   Faijul Amin via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for x86 (PR #178846)   Fangrui Song via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for x86 (PR #178846)   Fangrui Song via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for x86 (PR #178846)   Fangrui Song via llvm-commits
• [lldb] [llvm] [NFC] Ensure MCTargetOptions outlives MCAsmInfo at createMCAsmInfo call sites (PR #180465)   Fangrui Song via llvm-commits
• [lld] [lld][ELF] Add range extension thunks for x86-64 (PR #180266)   Fangrui Song via llvm-commits
• [lld] [lld][ELF] Add range extension thunks for x86-64 (PR #180266)   Fangrui Song via llvm-commits
• [lld] [lld][ELF] Add range extension thunks for x86-64 (PR #180266)   Fangrui Song via llvm-commits
• [lld] [lld][ELF] Add range extension thunks for x86-64 (PR #180266)   Fangrui Song via llvm-commits
• [lld] [lld][ELF] Add range extension thunks for x86-64 (PR #180266)   Fangrui Song via llvm-commits
• [lld] [lld] Fix undefined behavior with misaligned SHT_GROUP section. (PR #180848)   Fangrui Song via llvm-commits
• [lld] [lld] Fix undefined behavior with misaligned SHT_GROUP section. (PR #180848)   Fangrui Song via llvm-commits
• [lld] [lld] Fix undefined behavior with misaligned SHT_GROUP section. (PR #180848)   Fangrui Song via llvm-commits
• [lld] [lld] Fix undefined behavior with misaligned SHT_GROUP section. (PR #180848)   Fangrui Song via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for x86 (PR #178846)   Fangrui Song via llvm-commits
• [lld] 80743bd - [ELF] Fix /DISCARD/ .eh_frame regression after #179089   Fangrui Song via llvm-commits
• [lld] [ELF] Support DW_EH_PE_sdata8 encoding in .eh_frame_hdr (PR #179089)   Fangrui Song via llvm-commits
• [llvm] [MC][ARM] Don't set funcs to Thumb as a side effect of .hidden (PR #181156)   Fangrui Song via llvm-commits
• [llvm] [MC][ARM] Don't set funcs to Thumb as a side effect of .hidden (PR #181156)   Fangrui Song via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for AArch64 (PR #181099)   Fangrui Song via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for AArch64 (PR #181099)   Fangrui Song via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for AArch64 (PR #181099)   Fangrui Song via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for AArch64 (PR #181099)   Fangrui Song via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for x86 (PR #178846)   Fangrui Song via llvm-commits
• [lld] 4b88753 - [ELF] Add target-specific relocation scanning for x86 (#178846)   Fangrui Song via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for AArch64 (PR #181099)   Fangrui Song via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for AArch64 (PR #181099)   Fangrui Song via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for AArch64 (PR #181099)   Fangrui Song via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for AArch64 (PR #181099)   Fangrui Song via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for RISC-V (PR #181332)   Fangrui Song via llvm-commits
• [lld] [LLD] Add support for statically resolved vendor-specific RISCV relocations. (PR #169273)   Fangrui Song via llvm-commits
• [lld] [LLD] Add support for statically resolved vendor-specific RISCV relocations. (PR #169273)   Fangrui Song via llvm-commits
• [lld] [LLD] Add support for statically resolved vendor-specific RISCV relocations. (PR #169273)   Fangrui Song via llvm-commits
• [lld] [LLD] Add support for statically resolved vendor-specific RISCV relocations. (PR #169273)   Fangrui Song via llvm-commits
• [lld] [LLD] Add support for statically resolved vendor-specific RISCV relocations. (PR #169273)   Fangrui Song via llvm-commits
• [lld] [LLD] Add support for statically resolved vendor-specific RISCV relocations. (PR #169273)   Fangrui Song via llvm-commits
• [lld] [LLD] Add support for statically resolved vendor-specific RISCV relocations. (PR #169273)   Fangrui Song via llvm-commits
• [lld] Revert "[LLD] Add support for statically resolved vendor-specific RISCV relocations. (#169273)" (PR #181336)   Fangrui Song via llvm-commits
• [lld] [LLD] Add support for statically resolved vendor-specific RISCV relocations. (PR #169273)   Fangrui Song via llvm-commits
• [lld] [LLD] Add support for statically resolved vendor-specific RISCV relocations. (PR #169273)   Fangrui Song via llvm-commits
• [lld] [lld][ELF] Add range extension thunks for x86-64 (PR #180266)   Farid Zakaria via llvm-commits
• [lld] [lld][ELF] Add range extension thunks for x86-64 (PR #180266)   Farid Zakaria via llvm-commits
• [lld] [lld][ELF] Add range extension thunks for x86-64 (PR #180266)   Farid Zakaria via llvm-commits
• [lld] [lld][ELF] Add range extension thunks for x86-64 (PR #180266)   Farid Zakaria via llvm-commits
• [llvm] [SPIRV] Extend lowering of variadic functions (PR #178980)   Farzon Lotfi via llvm-commits
• [llvm] Add HexagonGlobalScheduler pass (PR #180803)   Fateme Hosseini via llvm-commits
• [llvm] Add HexagonGlobalScheduler pass (PR #180803)   Fateme Hosseini via llvm-commits
• [llvm] Add HexagonGlobalScheduler pass (PR #180803)   Fateme Hosseini via llvm-commits
• [llvm] Add HexagonGlobalScheduler pass (PR #180803)   Fateme Hosseini via llvm-commits
• [llvm] Add HexagonGlobalScheduler pass (PR #180803)   Fateme Hosseini via llvm-commits
• [llvm] [Hexagon] Add MachineUnroller pass (PR #177197)   Fateme Hosseini via llvm-commits
• [llvm] [Hexagon] Add MachineUnroller pass (PR #177197)   Fateme Hosseini via llvm-commits
• [llvm] Revert "Add HexagonGlobalScheduler pass (#180803)" (PR #181418)   Fateme Hosseini via llvm-commits
• [llvm] Revert "Add HexagonGlobalScheduler pass (#180803)" (PR #181418)   Fateme Hosseini via llvm-commits
• [llvm] [TailRecElim] Introduce support for shift accumulator optimization (PR #181331)   Federico Bruzzone via llvm-commits
• [llvm] [ADT] use correct iterator_facade_base for SmallSetIterator (PR #180967)   Fedor Sergeev via llvm-commits
• [llvm] [CodeGen][AMDGPU] TwoAddress: Only skip undef COPY at REG_SEQUENCE lowering when there is Live info or no uses for subreg (PR #175598)   Felipe Quezada via llvm-commits
• [llvm] [CodeGen][AMDGPU] TwoAddress: Only skip undef COPY at REG_SEQUENCE lowering when there is Live info or no uses for subreg (PR #175598)   Felipe Quezada via llvm-commits
• [llvm] [CodeGen][AMDGPU] TwoAddress: Only skip undef COPY at REG_SEQUENCE lowering when there is Live info or no uses for subreg (PR #175598)   Felipe Quezada via llvm-commits
• [llvm] [CodeGen][AMDGPU] Reg. Coalescer: Update live intervals of Src reg when replacing COPY for IMPLICIT_DEF. (PR #175986)   Felipe Quezada via llvm-commits
• [llvm] [CoroSplit][DebugInfo] Fix scope of continuation funclets (PR #180523)   Felipe de Azevedo Piovezan via llvm-commits
• [llvm] [CoroSplit][DebugInfo] Fix scope of continuation funclets (PR #180523)   Felipe de Azevedo Piovezan via llvm-commits
• [llvm] [Analysis] isTriviallyVectorizable - add Intrinsic::clmul along with vectorisation tests (PR #180014)   Florian Hahn via llvm-commits
• [llvm] [LV] Support conditional scalar assignments of masked operations (PR #178862)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Simplify true && x -> x (PR #179426)   Florian Hahn via llvm-commits
• [llvm] [SDAG] Implement SplitVecOp for `ISD::VECTOR_FIND_LAST_ACTIVE` (PR #180290)   Florian Hahn via llvm-commits
• [llvm] [AArch64][SVE] Use loop.dependence.war.mask in vector.memcheck (PR #175943)   Florian Hahn via llvm-commits
• [llvm] [NFC][VPlan] Test showing that unit-stride-mv should be done later in pipeline (PR #180292)   Florian Hahn via llvm-commits
• [llvm] [AArch64][SVE] Use loop.dependence.war.mask in vector.memcheck (PR #175943)   Florian Hahn via llvm-commits
• [llvm] [AArch64][SVE] Use loop.dependence.war.mask in vector.memcheck (PR #175943)   Florian Hahn via llvm-commits
• [llvm] [AArch64][SVE] Use loop.dependence.war.mask in vector.memcheck (PR #175943)   Florian Hahn via llvm-commits
• [llvm] [AArch64][SVE] Use loop.dependence.war.mask in vector.memcheck (PR #175943)   Florian Hahn via llvm-commits
• [llvm] [LV] Fix issue in VPFirstOrderRecurrencePHIRecipe::usesFirstLaneOnly (PR #179977)   Florian Hahn via llvm-commits
• [llvm] [LV] Fix issue in VPFirstOrderRecurrencePHIRecipe::usesFirstLaneOnly (PR #179977)   Florian Hahn via llvm-commits
• [llvm] [LV] Fix issue in VPFirstOrderRecurrencePHIRecipe::usesFirstLaneOnly (PR #179977)   Florian Hahn via llvm-commits
• [llvm] [AArch64][SVE] Use loop.dependence.war.mask in vector.memcheck (PR #175943)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Propagate FastMathFlags from phis to blends (PR #180226)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Florian Hahn via llvm-commits
• [llvm] [LAA][LV]Allow recognition of strided pointers with constant stride (PR #171151)   Florian Hahn via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Florian Hahn via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Florian Hahn via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Florian Hahn via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Florian Hahn via llvm-commits
• [llvm] [LV] Convert scatter w/uniform addr and mask being header mask to scalar store. (PR #172799)   Florian Hahn via llvm-commits
• [llvm] [LV] Convert scatter w/uniform addr and mask being header mask to scalar store. (PR #172799)   Florian Hahn via llvm-commits
• [llvm] [NFC][VPlan] Rename VPEVLBasedIVPHIRecipe to VPCurrentIterationPHIRecipe (PR #177114)   Florian Hahn via llvm-commits
• [llvm] [NFC][VPlan] Rename VPEVLBasedIVPHIRecipe to VPCurrentIterationPHIRecipe (PR #177114)   Florian Hahn via llvm-commits
• [llvm] [NFC][VPlan] Rename VPEVLBasedIVPHIRecipe to VPCurrentIterationPHIRecipe (PR #177114)   Florian Hahn via llvm-commits
• [llvm] [NFC][VPlan] Rename VPEVLBasedIVPHIRecipe to VPCurrentIterationPHIRecipe (PR #177114)   Florian Hahn via llvm-commits
• [llvm] [NFC][VPlan] Rename VPEVLBasedIVPHIRecipe to VPCurrentIterationPHIRecipe (PR #177114)   Florian Hahn via llvm-commits
• [llvm] [NFC][VPlan] Rename VPEVLBasedIVPHIRecipe to VPCurrentIterationPHIRecipe (PR #177114)   Florian Hahn via llvm-commits
• [llvm] [NFC][VPlan] Rename VPEVLBasedIVPHIRecipe to VPCurrentIterationPHIRecipe (PR #177114)   Florian Hahn via llvm-commits
• [llvm] [LAA] Use SCEVPtrToAddr in tryToCreateDiffChecks. (PR #178861)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Run initial recipe simplification on VPlan0. (PR #176828)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Run initial recipe simplification on VPlan0. (PR #176828)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Skip applying InstsToScalarize with forced instr costs. (PR #168269)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Skip applying InstsToScalarize with forced instr costs. (PR #168269)   Florian Hahn via llvm-commits
• [llvm] [LoopVectorize] Fix crash with GC statepoint in epilogue vectorization (PR #179459)   Florian Hahn via llvm-commits
• [llvm] [LoopVectorize] Fix crash with GC statepoint in epilogue vectorization (PR #179459)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Skip applying InstsToScalarize with forced instr costs. (PR #168269)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Skip applying InstsToScalarize with forced instr costs. (PR #168269)   Florian Hahn via llvm-commits
• [llvm] [InstCombine] Always fold nonnull assumptions into operand bundles (PR #169923)   Florian Hahn via llvm-commits
• [llvm] [IVDesc] Check loop-preheader for loop-legality when pass-remarks enabled (PR #166310)   Florian Hahn via llvm-commits
• [llvm] [SCEVExp] Use SCEVPtrToAddr in tryToReuseLCSSAPhi if possible. (PR #178727)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Florian Hahn via llvm-commits
• [llvm] [IVDesc] Check loop-preheader for loop-legality when pass-remarks enabled (PR #166310)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Florian Hahn via llvm-commits
• [llvm] Reland "[LoopVectorize] Support vectorization of overflow intrinsics" (#179819) (PR #180526)   Florian Hahn via llvm-commits
• [llvm] [LAA] Use SCEVPtrToAddr in tryToCreateDiffChecks. (PR #178861)   Florian Hahn via llvm-commits
• [llvm] [LAA] Use SCEVPtrToAddr in tryToCreateDiffChecks. (PR #178861)   Florian Hahn via llvm-commits
• [llvm] [LAA] Use SCEVPtrToAddr in tryToCreateDiffChecks. (PR #178861)   Florian Hahn via llvm-commits
• [llvm] [LAA] Use SCEVPtrToAddr in tryToCreateDiffChecks. (PR #178861)   Florian Hahn via llvm-commits
• [llvm] [LV] Handle partial sub-reductions with sub in middle block. (PR #178919)   Florian Hahn via llvm-commits
• [llvm] [LV] Handle partial sub-reductions with sub in middle block. (PR #178919)   Florian Hahn via llvm-commits
• [llvm] [LV] Handle partial sub-reductions with sub in middle block. (PR #178919)   Florian Hahn via llvm-commits
• [llvm] Provide intrinsics for speculative loads (PR #179642)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Directly unroll VectorEndPointerRecipe (PR #172372)   Florian Hahn via llvm-commits
• [llvm] [LoopVectorizer] Rename variable (NFC). (PR #180585)   Florian Hahn via llvm-commits
• [llvm] [LV] Add LoopVectorize/VPlan subdirectory for VPlan printing tests. (PR #180611)   Florian Hahn via llvm-commits
• [llvm] [LV][NFC] Add "REQUIRES: assert" to new test file (PR #180522)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Fix alias logic in canHoistOrSinkWithNoAliasCheck (PR #179504)   Florian Hahn via llvm-commits
• [llvm] [DominanceFrontier] Support post-dominators on graphs with single root (PR #179336)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Reject partial reductions with invalid costs in getScaledReds. (PR #180438)   Florian Hahn via llvm-commits
• [llvm] [TLI] Add isLegalNTStore/Load hook (PR #177936)   Florian Hahn via llvm-commits
• [llvm] [IR] Change getParamIndexForOptionalMask to assume masked parameter is last (PR #180558)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Florian Hahn via llvm-commits
• [llvm] ceec2c7 - [SCEV] Add ptrtoaddr tests with external state/unstable addrspaces.   Florian Hahn via llvm-commits
• [llvm] [SCEV] Don't create SCEVPtrToAddr for unstable pointer representations. (PR #180718)   Florian Hahn via llvm-commits
• [llvm] [LAA] Use SCEVPtrToAddr in tryToCreateDiffChecks. (PR #178861)   Florian Hahn via llvm-commits
• [llvm] [SCEV] Don't create SCEVPtrToAddr for unstable pointer representations. (PR #180718)   Florian Hahn via llvm-commits
• [llvm] [SCEV] Don't create SCEVPtrToAddr for unstable pointer representations. (PR #180718)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Florian Hahn via llvm-commits
• [llvm] [SCEV] Don't create SCEVPtrToAddr for unstable pointer representations. (PR #180718)   Florian Hahn via llvm-commits
• [llvm] [AArch64] Lower factor-of-2 interleaved stores to STNP (PR #177938)   Florian Hahn via llvm-commits
• [llvm] [AArch64] Lower factor-of-2 interleaved stores to STNP (PR #177938)   Florian Hahn via llvm-commits
• [llvm] [AArch64] Lower factor-of-2 interleaved stores to STNP (PR #177938)   Florian Hahn via llvm-commits
• [llvm] [AArch64] Lower factor-of-2 interleaved stores to STNP (PR #177938)   Florian Hahn via llvm-commits
• [llvm] [AArch64] Lower factor-of-2 interleaved stores to STNP (PR #177938)   Florian Hahn via llvm-commits
• [llvm] [AArch64] Lower factor-of-2 interleaved stores to STNP (PR #177938)   Florian Hahn via llvm-commits
• [llvm] [AArch64] Lower factor-of-2 interleaved stores to STNP (PR #177938)   Florian Hahn via llvm-commits
• [llvm] [AArch64] Lower factor-of-2 interleaved stores to STNP (PR #177938)   Florian Hahn via llvm-commits
• [llvm] [AArch64] Lower factor-of-2 interleaved stores to STNP (PR #177938)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Florian Hahn via llvm-commits
• [llvm] [Matrix] Use tiled loops automatically for large kernels. (PR #179325)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Fix convertToPhisToBlends folding non poison blend to poison (PR #180686)   Florian Hahn via llvm-commits
• [llvm] [LAA] Use SCEVPtrToAddr in tryToCreateDiffChecks. (PR #178861)   Florian Hahn via llvm-commits
• [llvm] [LAA] Use SCEVPtrToAddr in tryToCreateDiffChecks. (PR #178861)   Florian Hahn via llvm-commits
• [llvm] [ConstraintElim] Infer linear constraints from udiv and urem (PR #180689)   Florian Hahn via llvm-commits
• [llvm] [MachineScheduler] Add an option to split regions into chunks of a given maximum size (PR #180519)   Florian Hahn via llvm-commits
• [llvm] [LV] Add LoopVectorize/VPlan subdirectory for VPlan printing tests. (PR #180611)   Florian Hahn via llvm-commits
• [llvm] [LV] Add LoopVectorize/VPlan subdirectory for VPlan printing tests. (PR #180611)   Florian Hahn via llvm-commits
• [llvm] [LV] Add LoopVectorize/VPlan subdirectory for VPlan printing tests. (PR #180611)   Florian Hahn via llvm-commits
• [clang] [llvm] InstCombine: Use SimplifyDemandedFPClass on fmul (PR #177490)   Florian Hahn via llvm-commits
• [llvm] 5131186 - [VPlan] Use UTC to auto-generate more VPlan checks.   Florian Hahn via llvm-commits
• [llvm] [VPlan] Fix alias logic in canHoistOrSinkWithNoAliasCheck (PR #179504)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Fix alias logic in canHoistOrSinkWithNoAliasCheck (PR #179504)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Explicitly reassociate header mask in logical and (PR #180898)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Explicitly reassociate header mask in logical and (PR #180898)   Florian Hahn via llvm-commits
• [llvm] [LV] Add LoopVectorize/VPlan subdirectory for VPlan printing tests. (PR #180611)   Florian Hahn via llvm-commits
• [llvm] [LV] Add LoopVectorize/VPlan subdirectory for VPlan printing tests. (PR #180611)   Florian Hahn via llvm-commits
• [llvm] [LV] Add LoopVectorize/VPlan subdirectory for VPlan printing tests. (PR #180611)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Explicitly reassociate header mask in logical and (PR #180898)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Fix alias logic in canHoistOrSinkWithNoAliasCheck (PR #179504)   Florian Hahn via llvm-commits
• [llvm] [LAA] Use SCEVPtrToAddr in tryToCreateDiffChecks. (PR #178861)   Florian Hahn via llvm-commits
• [llvm] [LAA] Use SCEVPtrToAddr in tryToCreateDiffChecks. (PR #178861)   Florian Hahn via llvm-commits
• [llvm] [LAA] Use SCEVPtrToAddr in tryToCreateDiffChecks. (PR #178861)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use ExitingIVValue for pointer inductions as well. (PR #180925)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Don't use the legacy cost model for loop conditions (PR #156864)   Florian Hahn via llvm-commits
• [llvm] [UTC][VPlan] Use `-vplan-print-after` for VPlan-dump-based tests (PR #178736)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Introduce m_c_Logical(And|Or), simplify x && true -> x (PR #180048)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Run initial recipe simplification on VPlan0. (PR #176828)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Run initial recipe simplification on VPlan0. (PR #176828)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Run initial recipe simplification on VPlan0. (PR #176828)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Run initial recipe simplification on VPlan0. (PR #176828)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Run initial recipe simplification on VPlan0. (PR #176828)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Florian Hahn via llvm-commits
• [llvm] [Matrix] Use tiled loops automatically for large kernels. (PR #179325)   Florian Hahn via llvm-commits
• [llvm] [Matrix] Use tiled loops automatically for large kernels. (PR #179325)   Florian Hahn via llvm-commits
• [llvm] [Matrix] Use tiled loops automatically for large kernels. (PR #179325)   Florian Hahn via llvm-commits
• [llvm] [polly] [SCEV] Use SCEVPtrToAddr instead of SCEVPtrToInt in SCEV. (PR #180244)   Florian Hahn via llvm-commits
• [llvm] [polly] [SCEV] Use SCEVPtrToAddr instead of SCEVPtrToInt in SCEV. (PR #180244)   Florian Hahn via llvm-commits
• [llvm] [polly] [SCEV] Use SCEVPtrToAddr instead of SCEVPtrToInt in SCEV. (PR #180244)   Florian Hahn via llvm-commits
• [llvm] [polly] [SCEV] Use SCEVPtrToAddr instead of SCEVPtrToInt in SCEV. (PR #180244)   Florian Hahn via llvm-commits
• [llvm] [polly] [SCEV] Use SCEVPtrToAddr instead of SCEVPtrToInt in SCEV. (PR #180244)   Florian Hahn via llvm-commits
• [llvm] [polly] [SCEV] Use SCEVPtrToAddr instead of SCEVPtrToInt in SCEV. (PR #180244)   Florian Hahn via llvm-commits
• [llvm] [SystemZ, LoopVectorizer] Enable vectorization of epilogue loops after VF16. (PR #172925)   Florian Hahn via llvm-commits
• [llvm] [SystemZ, LoopVectorizer] Enable vectorization of epilogue loops after VF16. (PR #172925)   Florian Hahn via llvm-commits
• [llvm] [SystemZ, LoopVectorizer] Enable vectorization of epilogue loops after VF16. (PR #172925)   Florian Hahn via llvm-commits
• [llvm] [SystemZ, LoopVectorizer] Enable vectorization of epilogue loops after VF16. (PR #172925)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Introduce m_c_Logical(And|Or) (NFC) (PR #180048)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Directly unroll VectorEndPointerRecipe (PR #172372)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Run initial recipe simplification on VPlan0. (PR #176828)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Run initial recipe simplification on VPlan0. (PR #176828)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Run initial recipe simplification on VPlan0. (PR #176828)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Florian Hahn via llvm-commits
• [llvm] [DominanceFrontier] Support post-dominators on graphs with single root (PR #179336)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Florian Hahn via llvm-commits
• [llvm] [LV] Pass symbolic VF to CalculateTripCountMinusVF and CanonicalIVIncrementForPart (NFC) (PR #180542)   Florian Hahn via llvm-commits
• [llvm] [LV] Pass symbolic VF to CalculateTripCountMinusVF and CanonicalIVIncrementForPart (NFC) (PR #180542)   Florian Hahn via llvm-commits
• [llvm] [DominanceFrontier] Support post-dominators on graphs with single root (PR #179336)   Florian Hahn via llvm-commits
• [llvm] Revert "[WebAssembly] Mark extract.last.active as having invalid cost." (PR #180942)   Florian Hahn via llvm-commits
• [llvm] [DominanceFrontier] Support post-dominators on graphs with single root (PR #179336)   Florian Hahn via llvm-commits
• [llvm] d3afa17 - [LV] Don't scalarize loads that need predication in legacy CM.   Florian Hahn via llvm-commits
• [llvm] [VPlan] Explicitly reassociate header mask in logical and (PR #180898)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Explicitly reassociate header mask in logical and (PR #180898)   Florian Hahn via llvm-commits
• [llvm] [LV] Simplify recipes before cse as well (PR #180235)   Florian Hahn via llvm-commits
• [llvm] [ConstraintElim] Use ConstantRange information for ConstraintElimination (PR #180862)   Florian Hahn via llvm-commits
• [llvm] [ConstraintElim] Use ConstantRange information for ConstraintElimination (PR #180862)   Florian Hahn via llvm-commits
• [llvm] [LV] Add LoopVectorize/VPlan subdirectory for VPlan printing tests. (PR #180611)   Florian Hahn via llvm-commits
• [llvm] [LV] Add LoopVectorize/VPlan subdirectory for VPlan printing tests. (PR #180611)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Explicitly reassociate header mask in logical and (PR #180898)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Introduce m_c_Logical(And|Or) (PR #180048)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Introduce m_c_Logical(And|Or) (PR #180048)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Introduce m_c_Logical(And|Or) (PR #180048)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Introduce m_c_Logical(And|Or) (PR #180048)   Florian Hahn via llvm-commits
• [llvm] [IR] Add llvm.masked.load.first.fault intrinsic (PR #156470)   Florian Hahn via llvm-commits
• [llvm] [IR] Change getParamIndexForOptionalMask to assume masked parameter is last (PR #180558)   Florian Hahn via llvm-commits
• [llvm] [IR] Change getParamIndexForOptionalMask to assume masked parameter is last (PR #180558)   Florian Hahn via llvm-commits
• [llvm] [IR] Change getParamIndexForOptionalMask to assume masked parameter is last (PR #180558)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Explicitly reassociate header mask in logical and (PR #180898)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Explicitly reassociate header mask in logical and (PR #180898)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Explicitly reassociate header mask in logical and (PR #180898)   Florian Hahn via llvm-commits
• [llvm] [LV] Add LoopVectorize/VPlan subdirectory for VPlan printing tests. (PR #180611)   Florian Hahn via llvm-commits
• [llvm] [LV] Add LoopVectorize/VPlan subdirectory for VPlan printing tests. (PR #180611)   Florian Hahn via llvm-commits
• [llvm] [UTC][VPlan] Use `-vplan-print-after` for VPlan-dump-based tests (PR #178736)   Florian Hahn via llvm-commits
• [llvm] [LV] Support argmin/argmax with strict predicates. (PR #170223)   Florian Hahn via llvm-commits
• [llvm] [LV] Support argmin/argmax with strict predicates. (PR #170223)   Florian Hahn via llvm-commits
• [llvm] [polly] [SCEV] Use SCEVPtrToAddr instead of SCEVPtrToInt in SCEV. (PR #180244)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Florian Hahn via llvm-commits
• [llvm] [UTC][VPlan] Use `-vplan-print-after` for VPlan-dump-based tests (PR #178736)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize FindLast of FindIV w/o sentinel. (PR #172569)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize FindLast of FindIV w/o sentinel. (PR #172569)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize FindLast of FindIV w/o sentinel. (PR #172569)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize FindLast of FindIV w/o sentinel. (PR #172569)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize FindLast of FindIV w/o sentinel. (PR #172569)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Florian Hahn via llvm-commits
• [llvm] Revert "[WebAssembly] Mark extract.last.active as having invalid cost." (PR #180942)   Florian Hahn via llvm-commits
• [llvm] [SCEV] Discard samesign when analyzing loop invariant exits (PR #181171)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Directly unroll VectorEndPointerRecipe (PR #172372)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Reject partial reductions with invalid costs in getScaledReds. (PR #180438)   Florian Hahn via llvm-commits
• [llvm] [LV] Pass symbolic VF to CalculateTripCountMinusVF and CanonicalIVIncrementForPart (NFC) (PR #180542)   Florian Hahn via llvm-commits
• [llvm] [LV] Pass symbolic VF to CalculateTripCountMinusVF and CanonicalIVIncrementForPart (NFC) (PR #180542)   Florian Hahn via llvm-commits
• [llvm] [LV] Pass symbolic VF to CalculateTripCountMinusVF and CanonicalIVIncrementForPart (NFC) (PR #180542)   Florian Hahn via llvm-commits
• [llvm] [ProfCheck][Matrix] Propagate profile information for selects (PR #181248)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Run initial recipe simplification on VPlan0. (PR #176828)   Florian Hahn via llvm-commits
• [llvm] [ValueTracking] Conservative nosync check prevents vectorization (PR #181345)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Run initial recipe simplification on VPlan0. (PR #176828)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Run initial recipe simplification on VPlan0. (PR #176828)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Reuse introduces-broadcast logic in narrowToSingleScalars (PR #174444)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Remove unused VPExpandSCEVRecipe before expansion (PR #181329)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use ExitingIVValue for pointer inductions as well. (PR #180925)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use ExitingIVValue for pointer inductions as well. (PR #180925)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use ExitingIVValue for pointer inductions as well. (PR #180925)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use ExitingIVValue for pointer inductions as well. (PR #180925)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add simple driver option to run some individual transforms. (PR #178522)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add simple driver option to run some individual transforms. (PR #178522)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add simple driver option to run some individual transforms. (PR #178522)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add simple driver option to run some individual transforms. (PR #178522)   Florian Hahn via llvm-commits
• [llvm] [polly] [SCEV] Use SCEVPtrToAddr instead of SCEVPtrToInt in SCEV. (PR #180244)   Florian Hahn via llvm-commits
• [llvm] [polly] [SCEV] Use SCEVPtrToAddr instead of SCEVPtrToInt in SCEV. (PR #180244)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPlan-dump-based test for predication (PR #180794)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPlan-dump-based test for predication (PR #180794)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Florian Hahn via llvm-commits
• [clang] [llvm] [IR] Add ConstantExpr::getPtrAdd() (PR #181365)   Florian Hahn via llvm-commits
• [clang] [llvm] [NFCI] [ValueTracking] Add pass to print ConstantRanges (PR #140144)   Florian Mayer via llvm-commits
• [llvm] [NFC] [MemoryTagging] pass AllocaInfo to isStandardLifetime (PR #180311)   Florian Mayer via llvm-commits
• [llvm] [NFC] [IndVars] fix typo in test (PR #181262)   Florian Mayer via llvm-commits
• [llvm] [NFC] [IndVars] test for multiple bounds for predicate-loop-traps (PR #181264)   Florian Mayer via llvm-commits
• [llvm] [NFC] [IndVars] test for multiple bounds for predicate-loop-traps (PR #181264)   Florian Mayer via llvm-commits
• [llvm] Add llvm.looptrap intrinsic. (PR #181299)   Florian Mayer via llvm-commits
• [llvm] Add llvm.looptrap intrinsic. (PR #181299)   Florian Mayer via llvm-commits
• [llvm] [AArch64] optimize vselect of bitcast (PR #180375)   Folkert de Vries via llvm-commits
• [llvm] [AArch64] optimize vselect of bitcast (PR #180375)   Folkert de Vries via llvm-commits
• [llvm] [RISCV] improve `musttail` support (PR #170547)   Folkert de Vries via llvm-commits
• [clang] [llvm] [clang][WebAssembly] Fix Wasm Vararg pointer width (PR #173580)   Folkert de Vries via llvm-commits
• [llvm] [AMDGPU] Add Srl combine for extracting last element of BUILD_VECTOR (PR #181412)   Frederick Vu via llvm-commits
• [llvm] Reapply "[MemCpyOpt] support offset slices for performStackMoveOptzn and processMemCpy", with bug fixed (PR #180002)   Gabriel Baraldi via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Gaëtan Bossu via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Gaëtan Bossu via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Gaëtan Bossu via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Gaëtan Bossu via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Gaëtan Bossu via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Gaëtan Bossu via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Gaëtan Bossu via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Gaëtan Bossu via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Gaëtan Bossu via llvm-commits
• [lldb] [llvm] [llvm][lldb] Add check for incorrect target features (PR #180901)   Georgiy Samoylov via llvm-commits
• [lldb] [llvm] [llvm][lldb] Add check for incorrect target features (PR #180901)   Georgiy Samoylov via llvm-commits
• [llvm] [llvm] Add format check for MCSubtargetFeatures (PR #180943)   Georgiy Samoylov via llvm-commits
• [lldb] [llvm] [llvm][lldb] Add check for incorrect target features (PR #180901)   Georgiy Samoylov via llvm-commits
• [llvm] [llvm] Add format check for MCSubtargetFeatures (PR #180943)   Georgiy Samoylov via llvm-commits
• [llvm] [BOLT][BTI] Refactor: move applyBTIFixup under MCPlusBuilder (PR #177164)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][BTI] Refactor: move applyBTIFixup under MCPlusBuilder (PR #177164)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][BTI] Refactor: move applyBTIFixup under MCPlusBuilder (PR #177164)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][BTI] Refactor: move applyBTIFixup under MCPlusBuilder (PR #177164)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][BTI] Patch ignored functions in place when targeting them with indirect branches (PR #177165)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][BTI] Patch ignored functions in place when targeting them with indirect branches (PR #177165)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][BTI] Patch ignored functions in place when targeting them with indirect branches (PR #177165)   Gergely Bálint via llvm-commits
• [llvm] [GISel] computeKnownBits - add CTLS handling (PR #178063)   Gergo Stomfai via llvm-commits
• [llvm] Issue 180492 (PR #180596)   Gergo Stomfai via llvm-commits
• [llvm] Issue 180492 (PR #180596)   Gergo Stomfai via llvm-commits
• [llvm] [InstCombine] Fold shift of boolean zext to logic sequence (PR #180596)   Gergo Stomfai via llvm-commits
• [llvm] [InstCombine] Fold shift of boolean zext to logic sequence (PR #180596)   Gergo Stomfai via llvm-commits
• [llvm] [InstCombine] Fold shift of boolean zext to logic sequence (PR #180596)   Gergo Stomfai via llvm-commits
• [llvm] Port gisel cse analysis to npm (PR #179815)   Gergo Stomfai via llvm-commits
• [llvm] [InstCombine] Fold shift of boolean zext to logic sequence (PR #180596)   Gergo Stomfai via llvm-commits
• [llvm] [InstCombine] Fold shift of boolean zext to logic sequence (PR #180596)   Gergo Stomfai via llvm-commits
• [llvm] [InstCombine] Fold shift of boolean zext to logic sequence (PR #180596)   Gergo Stomfai via llvm-commits
• [llvm] [InstCombine] Fold shift of boolean zext to logic sequence (PR #180596)   Gergo Stomfai via llvm-commits
• [llvm] [InstCombine] Fold shift of boolean zext to logic sequence (PR #180596)   Gergo Stomfai via llvm-commits
• [llvm] [AMDGPU] Enable sinking of free vector ops that will be folded into their uses (PR #162580)   Gheorghe-Teodor Bercea via llvm-commits
• [llvm] [IR] Add llvm.masked.speculative.load intrinsic (PR #156470)   Graham Hunter via llvm-commits
• [llvm] [IR] Add llvm.masked.load.first.fault intrinsic (PR #156470)   Graham Hunter via llvm-commits
• [llvm] [IR] Add llvm.masked.load.first.fault intrinsic (PR #156470)   Graham Hunter via llvm-commits
• [llvm] [IR] Add llvm.masked.load.first.fault intrinsic (PR #156470)   Graham Hunter via llvm-commits
• [llvm] [IR] Add llvm.masked.load.first.fault intrinsic (PR #156470)   Graham Hunter via llvm-commits
• [llvm] [IR] Add llvm.masked.load.first.fault intrinsic (PR #156470)   Graham Hunter via llvm-commits
• [llvm] [IR] Add llvm.masked.load.first.fault intrinsic (PR #156470)   Graham Hunter via llvm-commits
• [llvm] [IR] Add llvm.masked.load.first.fault intrinsic (PR #156470)   Graham Hunter via llvm-commits
• [llvm] [IR] Add llvm.masked.load.first.fault intrinsic (PR #156470)   Graham Hunter via llvm-commits
• [llvm] [IR] Add llvm.masked.load.first.fault intrinsic (PR #156470)   Graham Hunter via llvm-commits
• [llvm] [SLP] Use the correct calling convention for vector math routines (PR #180759)   Graham Hunter via llvm-commits
• [llvm] [SLP] Use the correct calling convention for vector math routines (PR #180759)   Graham Hunter via llvm-commits
• [llvm] [SLP] Use the correct calling convention for vector math routines (PR #180759)   Graham Hunter via llvm-commits
• [llvm] [CodeGen] Teach ReplaceWithVeclib to use correct calling convention (PR #180773)   Graham Hunter via llvm-commits
• [llvm] [CodeGen] Teach ReplaceWithVeclib to use correct calling convention (PR #180773)   Graham Hunter via llvm-commits
• [llvm] [CodeGen] Teach ReplaceWithVeclib to use correct calling convention (PR #180773)   Graham Hunter via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Graham Hunter via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Graham Hunter via llvm-commits
• [llvm] [VPlan] Optimize FindLast of FindIV w/o sentinel. (PR #172569)   Graham Hunter via llvm-commits
• [llvm] [VPlan] Optimize FindLast of FindIV w/o sentinel. (PR #172569)   Graham Hunter via llvm-commits
• [llvm] [IR] Add llvm.masked.load.first.fault intrinsic (PR #156470)   Graham Hunter via llvm-commits
• [llvm] [IR] Change getParamIndexForOptionalMask to assume masked parameter is last (PR #180558)   Graham Hunter via llvm-commits
• [llvm] [AArch64][SVE] Use loop.dependence.war.mask in vector.memcheck (PR #175943)   Graham Hunter via llvm-commits
• [llvm] [AArch64][SVE] Use loop.dependence.war.mask in vector.memcheck (PR #175943)   Graham Hunter via llvm-commits
• [llvm] [AArch64][SVE] Use loop.dependence.war.mask in vector.memcheck (PR #175943)   Graham Hunter via llvm-commits
• [llvm] [AArch64][SVE] Use loop.dependence.war.mask in vector.memcheck (PR #175943)   Graham Hunter via llvm-commits
• [llvm] [AArch64] Eliminate XTN/SSHLL for vector splats (PR #180913)   Guy David via llvm-commits
• [llvm] [VectorCombine] Fold (icmp eq/ne (reduce.add X), 0) to reduce.umax (PR #180001)   Guy David via llvm-commits
• [llvm] [ValueTracking] Extend computeConstantRange for add/sub, sext/zext/trunc (PR #181110)   Guy David via llvm-commits
• [llvm] [ValueTracking] Extend computeConstantRange for add/sub, sext/zext/trunc (PR #181110)   Guy David via llvm-commits
• [llvm] [VectorCombine] Fold (icmp eq/ne (reduce.add X), 0) to reduce.umax (PR #180001)   Guy David via llvm-commits
• [llvm] [AArch64] Eliminate XTN/SSHLL for vector splats (PR #180913)   Guy David via llvm-commits
• [llvm] [AArch64] Eliminate XTN/SSHLL for vector splats (PR #180913)   Guy David via llvm-commits
• [llvm] [ValueTracking] Extend computeConstantRange for add/sub, sext/zext/trunc (PR #181110)   Guy David via llvm-commits
• [llvm] [InstSimplify] Discard unnecessary `select` when the conditions are `ICmps` with EQ (PR #179183)   Gábor Spaits via llvm-commits
• [llvm] [InstSimplify] Discard unnecessary `select` when the conditions are `ICmps` with EQ (PR #179183)   Gábor Spaits via llvm-commits
• [llvm] [InstSimplify] Discard unnecessary `select` when the conditions are `ICmps` with EQ (PR #179183)   Gábor Spaits via llvm-commits
• [llvm] [InstSimplify] Discard unnecessary `select` when the conditions are `ICmps` with EQ (PR #179183)   Gábor Spaits via llvm-commits
• [llvm] [ARM] Replace manual CLS expansion with ISD::CTLS (PR #178430)   Hamza Hassanain via llvm-commits
• [llvm] [ARM] Replace manual CLS expansion with ISD::CTLS (PR #178430)   Hamza Hassanain via llvm-commits
• [llvm] [ARM] Replace manual CLS expansion with ISD::CTLS (PR #178430)   Hamza Hassanain via llvm-commits
• [llvm] [ARM] Replace manual CLS expansion with ISD::CTLS (PR #178430)   Hamza Hassanain via llvm-commits
• [llvm] [ARM] Replace manual CLS expansion with ISD::CTLS (PR #178430)   Hamza Hassanain via llvm-commits
• [lld] [lld] Add explicit std::move(...) to avoid a few vector copies (PR #180474)   Hans Wennborg via llvm-commits
• [lld] [lld] Add explicit std::move(...) to avoid a few vector copies (PR #180474)   Hans Wennborg via llvm-commits
• [lld] [lld] Add explicit std::move(...) to avoid a few vector copies (PR #180474)   Hans Wennborg via llvm-commits
• [llvm] [x86] Enable indirect tail calls with more arguments (PR #137643)   Hans Wennborg via llvm-commits
• [lld] [llvm] [LIT] Use forward slashes in substitutions when LLVM_WINDOWS_PREFER_FORWARD_SLASH is set (PR #179865)   Hans Wennborg via llvm-commits
• [lld] [llvm] [LIT] Use forward slashes in substitutions when LLVM_WINDOWS_PREFER_FORWARD_SLASH is set (PR #179865)   Hans Wennborg via llvm-commits
• [llvm] [X86] Correctly call 16 byte atomic helpers on x86_64 Windows (PR #181356)   Hans Wennborg via llvm-commits
• [llvm] [x86] Enable indirect tail calls with more arguments (PR #137643)   Hans Wennborg via llvm-commits
• [llvm] [x86] Enable indirect tail calls with more arguments (PR #137643)   Hans Wennborg via llvm-commits
• [llvm] [x86] Enable indirect tail calls with more arguments (PR #137643)   Hans Wennborg via llvm-commits
• [llvm] [x86] Enable indirect tail calls with more arguments (PR #137643)   Hans Wennborg via llvm-commits
• [llvm] [MC][COFF] Associate pseudo probe desc section with its function (PR #177540)   Haohai Wen via llvm-commits
• [llvm] [LoopIdiomVectorize] Bail when vectorization is disabled (PR #181142)   Hari Limaye via llvm-commits
• [llvm] [CMake] Only pass PYTHON_EXECUTABLE to native build if defined (PR #180964)   Harrison Hao via llvm-commits
• [llvm] [CMake] Only pass PYTHON_EXECUTABLE to native build if defined (PR #180964)   Harrison Hao via llvm-commits
• [llvm] [CMake] Only pass PYTHON_EXECUTABLE to native build if defined (PR #180964)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Support i8/i16 GEP indices when promoting allocas to vectors (PR #175489)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Support i8/i16 GEP indices when promoting allocas to vectors (PR #175489)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Support i8/i16 GEP indices when promoting allocas to vectors (PR #175489)   Harrison Hao via llvm-commits
• [llvm] This is a draft for enabling opt-in tail-folding on vectorized epilogue. (PR #181401)   Hassnaa Hamdi via llvm-commits
• [llvm] [NFC][LV]: Differentiate between Pred and Unpred masked operations. (PR #169509)   Hassnaa Hamdi via llvm-commits
• [llvm] This is a draft for enabling opt-in tail-folding on vectorized epilogue. (PR #181401)   Hassnaa Hamdi via llvm-commits
• [llvm] [WebAssembly] Print type signature and table for call_indirect (PR #179120)   Heejin Ahn via llvm-commits
• [llvm] [utils] update how auto-updated tests are displayed when the test is retried (PR #181097)   Henrik G. Olsson via llvm-commits
• [libcxx] [llvm] [utils] update how auto-updated tests are displayed when the test is retried (PR #181097)   Henrik G. Olsson via llvm-commits
• [libcxx] [llvm] [utils] update how auto-updated tests are displayed when the test is retried (PR #181097)   Henrik G. Olsson via llvm-commits
• [libcxx] [llvm] [utils] update how auto-updated tests are displayed when the test is retried (PR #181097)   Henrik G. Olsson via llvm-commits
• [libcxx] [llvm] [utils] update how auto-updated tests are displayed when the test is retried (PR #181097)   Henrik G. Olsson via llvm-commits
• [libcxx] [llvm] [utils] update how auto-updated tests are displayed when the test is retried (PR #181097)   Henrik G. Olsson via llvm-commits
• [clang] [llvm] [OpenASIP] Update the TCE target defs for OpenASIP 2.2 (PR #176698)   Henry Linjamäki via llvm-commits
• [clang] [llvm] [OpenASIP] Update the TCE target defs for OpenASIP 2.2 (PR #176698)   Henry Linjamäki via llvm-commits
• [clang] [llvm] [OpenASIP] Update the TCE target defs for OpenASIP 2.2 (PR #176698)   Henry Linjamäki via llvm-commits
• [llvm] Add XCOFF object file support in sanitizer coverage tool (PR #179884)   Honey Goyal via llvm-commits
• [llvm] [RegisterPressure] Remove dead defs correctly (PR #156576)   Hongyu Chen via llvm-commits
• [llvm] [RegisterPressure] Remove dead defs correctly (PR #156576)   Hongyu Chen via llvm-commits
• [llvm] [RegisterPressure] Remove dead defs correctly (PR #156576)   Hongyu Chen via llvm-commits
• [llvm] [RegisterPressure] Remove dead defs correctly (PR #156576)   Hongyu Chen via llvm-commits
• [llvm] [SelectionDAG] Make sure demanded lanes for AND/MUL-by-zero are frozen (PR #180727)   Hongyu Chen via llvm-commits
• [llvm] [InstCombine] Fix #163110: Fold icmp (shl X, L), (add (shl Y, L), 1<<L) to icmp X, (Y + 1) (PR #165975)   Hongyu Chen via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Hubert Tong via llvm-commits
• [lld] [lldb] [llvm] [AArch64] Support TLS variables in debug info (PR #146572)   Igor Kudrin via llvm-commits
• [llvm] fix: add encoding for Python 3.14 compatibility in lit test file (PR #178261)   Igor Luppi via llvm-commits
• [llvm] [Hexagon] Fix encoding of packets with fixups followed by alignment (PR #179168)   Ikhlas Ajbar via llvm-commits
• [llvm] [AMDGPU] Have VCC as a first-class member of the SGPR pool. (PR #173870)   Ivan Kosarev via llvm-commits
• [llvm] [AMDGPU][NFC] Use RegisterOperand instead of RegisterClass (PR #180574)   Ivan Kosarev via llvm-commits
• [llvm] [NFC][TableGen] Use std::move to avoid copy (PR #180785)   Ivan Kosarev via llvm-commits
• [llvm] [NFC][TableGen] Use std::move to avoid copy (PR #180775)   Ivan Kosarev via llvm-commits
• [llvm] [True16] Make loads into s16 legal in GlobalISel (PR #176963)   Ivan Kosarev via llvm-commits
• [llvm] Enable All Function Properties when Stats are enabled (PR #180658)   Iñaki V Arrechea via llvm-commits
• [llvm] Enable All Function Properties when Stats are enabled (PR #180658)   Iñaki V Arrechea via llvm-commits
• [llvm] Enable All Function Properties when Stats are enabled (PR #180658)   Iñaki V Arrechea via llvm-commits
• [llvm] [llvm/CAS] Handle switch default to fix missing return warning (PR #180481)   Jack Huang via llvm-commits
• [llvm] [llvm/CAS] Handle switch default to fix missing return warning (PR #180481)   Jack Huang via llvm-commits
• [llvm] [llvm/CAS] Insert llvm_unreachable to resolve missing return warning (PR #180481)   Jack Huang via llvm-commits
• [llvm] [llvm/CAS] Insert llvm_unreachable to resolve missing return warning (PR #180481)   Jack Huang via llvm-commits
• [flang] [llvm] Enabling support for Allocate clause in DO construct (PR #180172)   Jack Styles via llvm-commits
• [llvm] [MLIR] [Python] Added plumbing to run stubgen on the mlir._mlir package (PR #179211)   Jacques Pienaar via llvm-commits
• [compiler-rt] [sanitizer_common][NFC] Fix sanitizer_platform_limits_posix.cpp formatting (PR #180823)   Jake Egan via llvm-commits
• [compiler-rt] [sanitizer_common] Implement address sanitizer on AIX: platform specific support (PR #131866)   Jake Egan via llvm-commits
• [compiler-rt] [sanitizer_common] Implement address sanitizer on AIX: platform specific support (PR #131866)   Jake Egan via llvm-commits
• [compiler-rt] [sanitizer_common][NFC] Fix sanitizer_platform_limits_posix.cpp formatting (PR #180823)   Jake Egan via llvm-commits
• [llvm] Fix SafeStack crashing with scalable TypeSizes (PR #180547)   Jakob Koschel via llvm-commits
• [llvm] [SLP] Use static_assert() rather than assert() where possible (PR #180867)   Jakub Kuderski via llvm-commits
• [llvm] [SLP] Use static_assert() rather than assert() where possible (PR #180867)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] use correct iterator_facade_base for SmallSetIterator (PR #180967)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Allow member pointers in map_range and map_to_vector (PR #181154)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Allow member pointers in map_range and map_to_vector (PR #181154)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Allow member pointers in map_range and map_to_vector (PR #181154)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Allow member pointers in map_range and map_to_vector (PR #181154)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Allow member pointers in map_range and map_to_vector (PR #181154)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Allow member pointers in map_range and map_to_vector (PR #181154)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Allow member pointers in map_range and map_to_vector (PR #181154)   Jakub Kuderski via llvm-commits
• [llvm] Add const check (PR #181190)   Jakub Kuderski via llvm-commits
• [llvm] [Support] Support 5-component VersionTuples (PR #181275)   Jakub Kuderski via llvm-commits
• [clang] [lld] [llvm] [Support] Support 5-component VersionTuples (PR #181275)   Jakub Kuderski via llvm-commits
• [llvm] [llvm-objdump][AVR] Detect AVR architecture from ELF flags for disassembling (PR #180468)   James Henderson via llvm-commits
• [llvm] [llvm-objdump][AVR] Detect AVR architecture from ELF flags for disassembling (PR #180468)   James Henderson via llvm-commits
• [llvm] [llvm-objdump][AVR] Detect AVR architecture from ELF flags for disassembling (PR #180468)   James Henderson via llvm-commits
• [llvm] [llvm-objdump][AVR] Detect AVR architecture from ELF flags for disassembling (PR #180468)   James Henderson via llvm-commits
• [llvm] [llvm-objdump][AVR] Detect AVR architecture from ELF flags for disassembling (PR #180468)   James Henderson via llvm-commits
• [llvm] `dwarf2yaml.cpp` optimizations (PR #179048)   James Henderson via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [lld] [llvm] [NFC] Fix tests with invalid RUN directives (PR #179668)   James Henderson via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [lld] [llvm] [NFC] Fix tests with invalid RUN directives (PR #179668)   James Henderson via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [lld] [llvm] [NFC] Fix tests with invalid RUN directives (PR #179668)   James Henderson via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [lld] [llvm] [NFC] Fix tests with invalid RUN directives (PR #179668)   James Henderson via llvm-commits
• [llvm] [llvm-readobj, ELF] Support reading binary with more than PN_XNUM segments. (PR #165278)   James Henderson via llvm-commits
• [llvm] [llvm-readobj, ELF] Support reading binary with more than PN_XNUM segments. (PR #165278)   James Henderson via llvm-commits
• [llvm] [llvm-readobj, ELF] Support reading binary with more than PN_XNUM segments. (PR #165278)   James Henderson via llvm-commits
• [llvm] [llvm-readobj, ELF] Support reading binary with more than PN_XNUM segments. (PR #165278)   James Henderson via llvm-commits
• [llvm] [llvm-readobj, ELF] Support reading binary with more than PN_XNUM segments. (PR #165278)   James Henderson via llvm-commits
• [llvm] [llvm-readobj, ELF] Support reading binary with more than PN_XNUM segments. (PR #165278)   James Henderson via llvm-commits
• [llvm] [llvm-readobj, ELF] Support reading binary with more than PN_XNUM segments. (PR #165278)   James Henderson via llvm-commits
• [llvm] [llvm-readobj, ELF] Support reading binary with more than PN_XNUM segments. (PR #165278)   James Henderson via llvm-commits
• [llvm] [llvm-readobj, ELF] Support reading binary with more than PN_XNUM segments. (PR #165278)   James Henderson via llvm-commits
• [llvm] [llvm-readobj, ELF] Support reading binary with more than PN_XNUM segments. (PR #165278)   James Henderson via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [lld] [llvm] [NFC] Fix tests with invalid RUN directives (PR #179668)   James Henderson via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [lld] [llvm] [NFC] Fix tests with invalid RUN directives (PR #179668)   James Henderson via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [lld] [llvm] [NFC] Fix tests with invalid RUN directives (PR #179668)   James Henderson via llvm-commits
• [llvm] Add llvm-extract-bundle-entry to extend llvm-objcopy (PR #169386)   James Henderson via llvm-commits
• [llvm] Add llvm-extract-bundle-entry to extend llvm-objcopy (PR #169386)   James Henderson via llvm-commits
• [llvm] Add llvm-extract-bundle-entry to extend llvm-objcopy (PR #169386)   James Henderson via llvm-commits
• [llvm] Add llvm-extract-bundle-entry to extend llvm-objcopy (PR #169386)   James Henderson via llvm-commits
• [llvm] Add llvm-extract-bundle-entry to extend llvm-objcopy (PR #169386)   James Henderson via llvm-commits
• [llvm] Add llvm-extract-bundle-entry to extend llvm-objcopy (PR #169386)   James Henderson via llvm-commits
• [llvm] Add llvm-extract-bundle-entry to extend llvm-objcopy (PR #169386)   James Henderson via llvm-commits
• [llvm] Add llvm-extract-bundle-entry to extend llvm-objcopy (PR #169386)   James Henderson via llvm-commits
• [llvm] Add llvm-extract-bundle-entry to extend llvm-objcopy (PR #169386)   James Henderson via llvm-commits
• [llvm] Add llvm-extract-bundle-entry to extend llvm-objcopy (PR #169386)   James Henderson via llvm-commits
• [llvm] Add llvm-extract-bundle-entry to extend llvm-objcopy (PR #169386)   James Henderson via llvm-commits
• [llvm] Add llvm-extract-bundle-entry to extend llvm-objcopy (PR #169386)   James Henderson via llvm-commits
• [llvm] [llvm-otool] Fix error messages to use -p instead of --dis-symname (PR #181225)   James Henderson via llvm-commits
• [llvm] `dwarf2yaml.cpp` optimizations (PR #179048)   James Henderson via llvm-commits
• [llvm] Reland "[llvm-readobj] Dump callgraph section info for ELF" (PR #176260)   James Henderson via llvm-commits
• [llvm] Reland "[llvm-readobj] Dump callgraph section info for ELF" (PR #176260)   James Henderson via llvm-commits
• [llvm] Reland "[llvm-readobj] Dump callgraph section info for ELF" (PR #176260)   James Henderson via llvm-commits
• [llvm] [llvm-otool] Fix error messages to use -p instead of --dis-symname (PR #181225)   James Henderson via llvm-commits
• [llvm] [llvm-otool] Fix error messages to use -p instead of --dis-symname (PR #181225)   James Henderson via llvm-commits
• [llvm] [LangRef] Clarify nsz semantics (PR #180906)   James Y Knight via llvm-commits
• [llvm] Revert "workflows: Use main-branch-only environment when using ISSUE_SUBSCRIBER_TOKEN (#179990)" (PR #181352)   James Y Knight via llvm-commits
• [llvm] Reapply "[MemCpyOpt] support offset slices for performStackMoveOptzn and processMemCpy", with bug fixed (PR #180002)   Jameson Nash via llvm-commits
• [llvm] Reapply "[MemCpyOpt] support offset slices for performStackMoveOptzn and processMemCpy", with bug fixed (PR #180002)   Jameson Nash via llvm-commits
• [llvm] Reapply "[MemCpyOpt] support offset slices for performStackMoveOptzn and processMemCpy", with bug fixed (PR #180002)   Jameson Nash via llvm-commits
• [llvm] Reapply "[MemCpyOpt] support offset slices for performStackMoveOptzn and processMemCpy", with bug fixed (PR #180002)   Jameson Nash via llvm-commits
• [llvm] Reapply "[MemCpyOpt] support offset slices for performStackMoveOptzn and processMemCpy", with bug fixed (PR #180002)   Jameson Nash via llvm-commits
• [llvm] Reapply "[MemCpyOpt] support offset slices for performStackMoveOptzn and processMemCpy", with bug fixed (PR #180002)   Jameson Nash via llvm-commits
• [llvm] [SimplifyCFG] correct and move debug info for mergeConditionalStoreToAddress (PR #180789)   Jameson Nash via llvm-commits
• [llvm] [SimplifyCFG] correct and move debug info for mergeConditionalStoreToAddress (PR #180789)   Jameson Nash via llvm-commits
• [llvm] [SimplifyCFG] correct and move debug info for mergeConditionalStoreToAddress (PR #180789)   Jameson Nash via llvm-commits
• [llvm] Reapply "[MemCpyOpt] support offset slices for performStackMoveOptzn and processMemCpy", with bug fixed (PR #180002)   Jameson Nash via llvm-commits
• [llvm] [NFCI][Coroutines] update tests to autogenerated formatting (PR #178358)   Jameson Nash via llvm-commits
• [clang] [llvm] [Coroutines] Replace struct alloca frame with byte array and ptradd (PR #178359)   Jameson Nash via llvm-commits
• [llvm] [NFCI][Coroutines] update tests to autogenerated formatting (PR #178358)   Jameson Nash via llvm-commits
• [llvm] [OFFLOAD] Add support for host offloading device (PR #177307)   Jan Patrick Lehr via llvm-commits
• [llvm] [OFFLOAD] Fix issue where host plugin is added twice to the plugin list (PR #181346)   Jan Patrick Lehr via llvm-commits
• [clang] [llvm] [openmp] [OpenMP][clang] Indirect and Virtual function call mapping from host to device (PR #159857)   Jason Van Beusekom via llvm-commits
• [llvm] [MachineScheduler] Add an option to split regions into chunks of a given maximum size (PR #180519)   Javed Absar via llvm-commits
• [llvm] [MachineScheduler] Add an option to split regions into chunks of a given maximum size (PR #180519)   Javed Absar via llvm-commits
• [llvm] [MachineScheduler] Add an option to split regions into chunks of a given maximum size (PR #180519)   Javed Absar via llvm-commits
• [llvm] [MachineScheduler] Add an option to split regions into chunks of a given maximum size (PR #180519)   Javed Absar via llvm-commits
• [llvm] [MC][TableGen] Expand Opcode field of MCInstrDesc (PR #179652)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Use V_FMAC_F64 in "if (cond) a -= c" (PR #168710)   Jay Foad via llvm-commits
• [llvm] [AArch64][GlobalISel] Remove a couple of SUBREG_TO_REG from instruction selection. (PR #180253)   Jay Foad via llvm-commits
• [llvm] [CodeGen] Improve documentation for SUBREG_TO_REG (PR #180504)   Jay Foad via llvm-commits
• [llvm] [AArch64][GlobalISel] Remove a couple of SUBREG_TO_REG from instruction selection. (PR #180253)   Jay Foad via llvm-commits
• [llvm] [DAGCombiner] Fix crash in reassociationCanBreakAddressingModePattern for multi-memop nodes (PR #180268)   Jay Foad via llvm-commits
• [llvm] [DAG] TargetLowering::expandCLMUL - avoid ISD::MUL if target hasBitTest (PR #177566)   Jay Foad via llvm-commits
• [llvm] [DAG] TargetLowering::expandCLMUL - avoid ISD::MUL if target hasBitTest (PR #177566)   Jay Foad via llvm-commits
• [llvm] [CodeGen] Improve documentation for SUBREG_TO_REG (PR #180504)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fix LDS address correction in promoteConstantOffsetToImm for async stores (PR #180220)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnt][NFC] Access Waitcnt elements using InstCounterType (PR #178345)   Jay Foad via llvm-commits
• [llvm] [DemandedBits] Support non-constant shift amounts for funnel shifts (PR #180569)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Drop `AMDGPU::` (PR #180663)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Allow hoisting of V_READFIRSTLANE_B32 for uniform operand (PR #178312)   Jay Foad via llvm-commits
• [llvm] [DemandedBits] Support non-constant shift amounts for funnel shifts (PR #180569)   Jay Foad via llvm-commits
• [llvm] [DemandedBits] Support non-constant shift amounts for funnel shifts (PR #180569)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fix LDS address correction in promoteConstantOffsetToImm for async stores (PR #180220)   Jay Foad via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Update splitGEP to handle case where including base offset results in an offset that's too large (PR #177653)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Move instr events code into separate function (PR #180864)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Remove alignment constraint from spill pseudos (PR #177317)   Jay Foad via llvm-commits
• [llvm] [DAGCombiner] Combine (fshl A, B, S) | (fshr C, D, BW-S) --> (fshl (A|C), (B|D), S) (PR #180889)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Allow hoisting of V_READFIRSTLANE_B32 for uniform operand (PR #178312)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Treat F64 TRANS instructions as VALU for S_DELAY_ALU insertion (PR #180940)   Jay Foad via llvm-commits
• [llvm] [Uniformity] Implement per-output machine uniformity analysis (PR #179275)   Jay Foad via llvm-commits
• [llvm] [Uniformity] Implement per-output machine uniformity analysis (PR #179275)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][ISel] `setcc` peephole for comparisons with upper 32 bits of a 64-bit register pair (PR #177662)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][ISel] `setcc` peephole for comparisons with upper 32 bits of a 64-bit register pair (PR #177662)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][ISel] `setcc` peephole for comparisons with upper 32 bits of a 64-bit register pair (PR #177662)   Jay Foad via llvm-commits
• [clang] [llvm] [AMDGPU] Fix crash in InstCombine (PR #179511)   Jay Foad via llvm-commits
• [clang] [llvm] [AMDGPU] Fix crash in InstCombine (PR #179511)   Jay Foad via llvm-commits
• [clang] [llvm] [AMDGPU] Fix crash in InstCombine (PR #179511)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][ISel] `setcc` peephole for comparisons with upper 32 bits of a 64-bit register pair (PR #177662)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Treat F64 TRANS instructions as VALU for S_DELAY_ALU insertion (PR #180940)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][ISel] `setcc` peephole for comparisons with upper 32 bits of a 64-bit register pair (PR #177662)   Jay Foad via llvm-commits
• [llvm] [DAGCombiner] Combine (fshl A, B, S) | (fshr C, D, BW-S) --> (fshl (A|C), (B|D), S) (PR #180889)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Allow hoisting of V_READFIRSTLANE_B32 for uniform operand (PR #178312)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Clean up loop (PR #179572)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Drop IsExpertMode and MaxCounter member variables (PR #181092)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][NFC] Minor source cleanups in SIInsertWaitcnts (PR #181095)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][NFC] Minor source cleanups in SIInsertWaitcnts (PR #181095)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][NFC] Minor source cleanups in SIInsertWaitcnts (PR #181095)   Jay Foad via llvm-commits
• [clang] [llvm] [AMDGPU] Restrict `@llvm.amdgcn.image.*` intrinsic's dmask argument (PR #179511)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][NFC] Minor source cleanups in SIInsertWaitcnts (PR #181095)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][NFC] Minor source cleanups in SIInsertWaitcnts (PR #181095)   Jay Foad via llvm-commits
• [llvm] [mlir] [OMPIRBuilder] Hoist alloca's to entry blocks of compiler-emitted GPU reduction functions (PR #181359)   Jeff Sandoval via llvm-commits
• [clang] [llvm] [llvm][DebugInfo] Avoid attaching retained nodes to unrelated subprograms in DIBuilder (PR #180294)   Jeremy Morse via llvm-commits
• [clang] [llvm] [llvm][DebugInfo] Avoid attaching retained nodes to unrelated subprograms in DIBuilder (PR #180294)   Jeremy Morse via llvm-commits
• [clang] [llvm] [llvm][DebugInfo] Avoid attaching retained nodes to unrelated subprograms in DIBuilder (PR #180294)   Jeremy Morse via llvm-commits
• [lld] fbcfbd9 - [NFC][ELF] Fix overzealous find/replace affecting comments   Jessica Clarke via llvm-commits
• [lld] [NFC][ELF] Remove redundant and unused file argument from deleteFallThruJmpInsn (PR #180540)   Jessica Clarke via llvm-commits
• [lld] [NFC][ELF] Remove redundant and unused file argument from deleteFallThruJmpInsn (PR #180540)   Jessica Clarke via llvm-commits
• [lld] [NFC][ELF] Remove redundant and unused file argument from deleteFallThruJmpInsn (PR #180540)   Jessica Clarke via llvm-commits
• [llvm] [RISCV] Remove explicitly adding spilled registers as liveins. (PR #180483)   Jim Lin via llvm-commits
• [llvm] [RISCV] Remove explicitly adding spilled registers as liveins. (PR #180483)   Jim Lin via llvm-commits
• [llvm] [RISCV] Add sp register as implicit/implicit-def register to save/restore call (PR #180667)   Jim Lin via llvm-commits
• [llvm] [RISCV] Update Andes45 vector floating-point arithmetic scheduling info (PR #181289)   Jim Lin via llvm-commits
• [llvm] [AArch64] Add support for B and H loads/stores in LoadStoreOptimizer (PR #180535)   John Brawn via llvm-commits
• [llvm] [AArch64] Add support for B and H loads/stores in LoadStoreOptimizer (PR #180535)   John Brawn via llvm-commits
• [llvm] [VPlan] Add the cost of spills when considering register pressure (PR #179646)   John Brawn via llvm-commits
• [llvm] [VPlan] Don't use the legacy cost model for loop conditions (PR #156864)   John Brawn via llvm-commits
• [llvm] [VPlan] Don't use the legacy cost model for loop conditions (PR #156864)   John Brawn via llvm-commits
• [llvm] [VPlan] Add the cost of spills when considering register pressure (PR #179646)   John Brawn via llvm-commits
• [llvm] [VPlan] Add the cost of spills when considering register pressure (PR #179646)   John Brawn via llvm-commits
• [llvm] [LSR] Add unequal cost eval for dropping solutions (PR #178039)   John Brawn via llvm-commits
• [llvm] [LSR] Add unequal cost eval for dropping solutions (PR #178039)   John Brawn via llvm-commits
• [lldb] [llvm] [lldb-dap] Add unknown request handler (PR #181109)   John Harrison via llvm-commits
• [lldb] [llvm] [lldb-dap] Add unknown request handler (PR #181109)   John Harrison via llvm-commits
• [lldb] [llvm] [lldb-dap] Add unknown request handler (PR #181109)   John Harrison via llvm-commits
• [lldb] [llvm] [lldb-dap] Add unknown request handler (PR #181109)   John Harrison via llvm-commits
• [llvm] [M68k] implement -mxgot (PR #119803)   John Paul Adrian Glaubitz via llvm-commits
• [llvm] [M68k] implement -mxgot (PR #119803)   John Paul Adrian Glaubitz via llvm-commits
• [llvm] [AArch64] Use VectorInstrContext in getScalarizationOverhead. (PR #177201)   Jon Roelofs via llvm-commits
• [llvm] [DebugInfo] DWARFFormValue use formatv instead of format (PR #180498)   Jonas Devlieghere via llvm-commits
• [llvm] [DebugInfo] DWARFFormValue use formatv instead of format (PR #180498)   Jonas Devlieghere via llvm-commits
• [llvm] [CMake] Only pass PYTHON_EXECUTABLE to native build if defined (PR #180964)   Jonas Devlieghere via llvm-commits
• [lldb] [llvm] [lldb-dap] Add unknown request handler (PR #181109)   Jonas Devlieghere via llvm-commits
• [lldb] [llvm] [lldb-dap] Add unknown request handler (PR #181109)   Jonas Devlieghere via llvm-commits
• [lldb] [llvm] [lldb-dap] Add unknown request handler (PR #181109)   Jonas Devlieghere via llvm-commits
• [llvm] [LoopVectorizer] Rename variable (NFC). (PR #180585)   Jonas Paulsson via llvm-commits
• [llvm] [LoopVectorizer] Rename variable (NFC). (PR #180585)   Jonas Paulsson via llvm-commits
• [llvm] [LoopVectorizer] Rename variable (NFC). (PR #180585)   Jonas Paulsson via llvm-commits
• [llvm] [LoopVectorizer] Rename variable (NFC). (PR #180585)   Jonas Paulsson via llvm-commits
• [llvm] [SystemZ, LoopVectorizer] Enable vectorization of epilogue loops after VF16. (PR #172925)   Jonas Paulsson via llvm-commits
• [llvm] [SystemZ, LoopVectorizer] Enable vectorization of epilogue loops after VF16. (PR #172925)   Jonas Paulsson via llvm-commits
• [llvm] [SystemZ, LoopVectorizer] Enable vectorization of epilogue loops. (PR #172925)   Jonas Paulsson via llvm-commits
• [llvm] [EarlyIfConversion] Extend data dependent analysis across multiple blocks (PR #180623)   Jonathan Cohen via llvm-commits
• [llvm] [AArch64] Add support for B and H loads/stores in LoadStoreOptimizer (PR #180535)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64]Add SCR2_EL3 system register (PR #180918)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Pre-commit tests for enabling streaming with +fprcvt (PR #177333)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Pre-commit tests for enabling streaming with +fprcvt (PR #177333)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Preserve FP_TO_*_SAT VT operand in SVE scalar-combine (PR #177333)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Preserve FP_TO_*_SAT VT operand in SVE scalar-combine (PR #177333)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Preserve FP_TO_*_SAT VT operand in SVE scalar-combine (PR #177333)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Preserve FP_TO_*_SAT VT operand in SVE scalar-combine (PR #177333)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Preserve FP_TO_*_SAT VT operand in SVE scalar-combine (PR #177333)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Preserve FP_TO_*_SAT VT operand in SVE scalar-combine (PR #177333)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Preserve FP_TO_*_SAT VT operand in SVE scalar-combine (PR #177333)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Improve codegen for FP_TO_*_SAT (PR #180932)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Allow FPRCVT insns to run in streaming mode if safe (PR #177334)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Allow FPRCVT insns to run in streaming mode if safe (PR #177334)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Improve codegen for FP_TO_*_SAT (PR #180932)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Allow FPRCVT insns to run in streaming mode if safe (PR #177334)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [compiler-rt] [scudo] Add new fast purge option. (PR #175266)   Jordan R AW via llvm-commits
• [compiler-rt] [scudo] Add new fast purge option. (PR #175266)   Jordan R AW via llvm-commits
• [llvm] [bazel][lldb] Port 304c680809f05923edd097835d1056e6460a3646 (PR #180931)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel][lldb] Port 304c680809f05923edd097835d1056e6460a3646 (PR #180931)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel][lldb] Port #179832 (PR #181085)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel][lldb] Port #179832 (PR #181085)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel][lldb] Port #179832 (PR #181085)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel][lldb] Port #179832 (PR #181087)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel][lldb] Port #179832 (PR #181085)   Jordan Rupprecht via llvm-commits
• [llvm] [offload] Adapt tests to new PluginInterface quoting [NFC] (PR #180505)   Joseph Huber via llvm-commits
• [llvm] [offload] Adapt tests to new PluginInterface quoting [NFC] (PR #180505)   Joseph Huber via llvm-commits
• [llvm] [offload][flang-rt] Fix NVPTX runtime build (PR #180530)   Joseph Huber via llvm-commits
• [llvm] [offload][flang-rt] Fix NVPTX runtime build (PR #180530)   Joseph Huber via llvm-commits
• [llvm] [OFFLOAD] Support host plugin on Windows (PR #180401)   Joseph Huber via llvm-commits
• [llvm] [OFFLOAD] Add support to dump device images (PR #180545)   Joseph Huber via llvm-commits
• [llvm] [OFFLOAD] Add support to dump device images (PR #180545)   Joseph Huber via llvm-commits
• [clang] [llvm] [Offload][SYCL] Refactoring: get rid of newline separators (PR #180274)   Joseph Huber via llvm-commits
• [libc] [llvm] [libc] Add RPC helpers for dispatching functions to the host (PR #179085)   Joseph Huber via llvm-commits
• [libc] [llvm] [libc] Add RPC helpers for dispatching functions to the host (PR #179085)   Joseph Huber via llvm-commits
• [llvm] [OFFLOAD] Add support for host offloading device (PR #177307)   Joseph Huber via llvm-commits
• [flang] [llvm] [flang-rt] Implement basic support for I/O from OpenMP GPU Offloading (PR #181039)   Joseph Huber via llvm-commits
• [flang] [llvm] [flang-rt] Implement basic support for I/O from OpenMP GPU Offloading (PR #181039)   Joseph Huber via llvm-commits
• [flang] [llvm] [flang-rt] Implement basic support for I/O from OpenMP GPU Offloading (PR #181039)   Joseph Huber via llvm-commits
• [llvm] [SPIRV] Extend lowering of variadic functions (PR #178980)   Joseph Huber via llvm-commits
• [llvm] [SPIRV] Extend lowering of variadic functions (PR #178980)   Joseph Huber via llvm-commits
• [llvm] [SPIRV] Extend lowering of variadic functions (PR #178980)   Joseph Huber via llvm-commits
• [llvm] [SPIRV] Extend lowering of variadic functions (PR #178980)   Joseph Huber via llvm-commits
• [llvm] [AMDGPU] Allow folding of non-subregs through REG_SEQUENCE (PR #151033)   Josh Hutton via llvm-commits
• [llvm] [LangRef] Clarify nsz semantics (PR #180906)   Joshua Cranmer via llvm-commits
• [llvm] [AArch64][GlobalISel] WIP Remove fallbacks for FPCVT intrinsics with 16-bit operands (PR #179693)   Joshua Rodriguez via llvm-commits
• [llvm] [AArch64][GlobalISel] WIP Remove fallbacks for FPCVT intrinsics with 16-bit operands (PR #179693)   Joshua Rodriguez via llvm-commits
• [llvm] [AArch64][GlobalISel] Remove fallbacks for fpcvt intrinsics with 16-bit operands (PR #179693)   Joshua Rodriguez via llvm-commits
• [llvm] [AArch64][GlobalISel] Remove fallbacks for fpcvt intrinsics with 16-bit operands (PR #179693)   Joshua Rodriguez via llvm-commits
• [clang] [llvm] Make OpenCL an OSType rather than an EnvironmentType. (PR #170297)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Fix constant materialization for width > 64bit (PR #180182)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Emit ceil(Bitwidth / 32) words during OpConstant creation (PR #180218)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Emit ceil(Bitwidth / 32) words during OpConstant creation (PR #180218)   Juan Manuel Martinez Caamaño via llvm-commits
• [clang] [llvm] Make OpenCL an OSType rather than an EnvironmentType. (PR #170297)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Add a `SPIRVTypeInst` type with some guardrails (PR #179947)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Add a `SPIRVTypeInst` type with some guardrails (PR #179947)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Add a `SPIRVTypeInst` type with some guardrails (PR #179947)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Add a `SPIRVTypeInst` type with some guardrails (PR #179947)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Add a `SPIRVTypeInst` type with some guardrails (PR #179947)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Add a `SPIRVTypeInst` type with some guardrails (PR #179947)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Add a `SPIRVTypeInst` type with some guardrails (PR #179947)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Add a `SPIRVTypeInst` type with some guardrails (PR #179947)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Add a `SPIRVTypeInst` type with some guardrails (PR #179947)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Replace `SPIRVType` with `SPIRVTypeInst` as much as we can (PR #180721)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Replace `SPIRVType` with `SPIRVTypeInst` as much as we can (PR #180721)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Replace `SPIRVType` with `SPIRVTypeInst` as much as we can (PR #180721)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Replace `SPIRVType` with `SPIRVTypeInst` as much as we can (PR #180721)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [llvm-reduce] Add a pass to replace unconditinal branches with returns (PR #180993)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [llvm-reduce] Add a pass to replace unconditinal branches with returns (PR #180993)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [llvm-reduce] Add a pass to replace unconditinal branches with returns (PR #180993)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [llvm-reduce] Add a pass to replace unconditinal branches with returns (PR #180993)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] Fix for issue #177696 (PR #181047)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] Fix for issue #177696 (PR #181047)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] Fix for issue #177696 (PR #181047)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] Fix for issue #177696 (PR #181047)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC][AMDGPU] Remove unused/unimplemented `getWavesPerEU` variants (PR #181131)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC][AMDGPU] Remove unused/unimplemented `getWavesPerEU` variants (PR #181131)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC][AMDGPU] Remove unused `getLDSSize` (PR #181133)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC][AMDGPU] Remove unused `getLDSSize` (PR #181133)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC][AMDGPU] Remove unused `getLDSSize` (PR #181133)   Juan Manuel Martinez Caamaño via llvm-commits
• [clang] [lld] [llvm] [Support] Support 5-component VersionTuples (PR #181275)   Juergen Ributzka via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Julius Alexandre via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Julius Alexandre via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Julius Alexandre via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Julius Alexandre via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Julius Alexandre via llvm-commits
• [llvm] [LoopInfo] Don't recognize loop as parallel if it stores to out-of-loop alloca (PR #180551)   Julius Ikkala via llvm-commits
• [llvm] [LoopInfo] Don't recognize loop as parallel if it stores to out-of-loop alloca (PR #180551)   Julius Ikkala via llvm-commits
• [llvm] [LoopInfo] Don't recognize loop as parallel if it stores to out-of-loop alloca (PR #180551)   Julius Ikkala via llvm-commits
• [llvm] [LoopInfo] Don't recognize loop as parallel if it stores to out-of-loop alloca (PR #180551)   Julius Ikkala via llvm-commits
• [llvm] [LoopInfo] Don't recognize loop as parallel if it stores to out-of-loop alloca (PR #180551)   Julius Ikkala via llvm-commits
• [llvm] [LoopInfo] Don't recognize loop as parallel if it stores to out-of-loop alloca (PR #180551)   Julius Ikkala via llvm-commits
• [llvm] [LoopInfo] Don't recognize loop as parallel if it stores to out-of-loop alloca (PR #180551)   Julius Ikkala via llvm-commits
• [llvm] [LoopInfo] Don't recognize loop as parallel if it stores to out-of-loop alloca (PR #180551)   Julius Ikkala via llvm-commits
• [llvm] [LoopInfo] Don't recognize loop as parallel if it stores to out-of-loop alloca (PR #180551)   Julius Ikkala via llvm-commits
• [lld] [llvm] [LIT] Use forward slashes in substitutions when LLVM_WINDOWS_PREFER_FORWARD_SLASH is set (PR #179865)   Junji Watanabe via llvm-commits
• [lld] [llvm] [LIT] Use forward slashes in substitutions when LLVM_WINDOWS_PREFER_FORWARD_SLASH is set (PR #179865)   Junji Watanabe via llvm-commits
• [lld] [llvm] [LIT] Use forward slashes in substitutions when LLVM_WINDOWS_PREFER_FORWARD_SLASH is set (PR #179865)   Junji Watanabe via llvm-commits
• [lld] [llvm] [LIT] Use forward slashes in substitutions when LLVM_WINDOWS_PREFER_FORWARD_SLASH is set (PR #179865)   Junji Watanabe via llvm-commits
• [llvm] [Green Dragon] add green dragon jenkinsfile definitions for multibranch pipelines (PR #180793)   Justice Adams via llvm-commits
• [llvm] [Green Dragon] add green dragon jenkinsfile definitions for multibranch pipelines (PR #180793)   Justice Adams via llvm-commits
• [llvm] [DataLayout] Add a specifier for element-aligned vectors (PR #180617)   Justin Bogner via llvm-commits
• [llvm] [DirectX][ResourceAccess] Legalize resource handles into unique global resources (PR #176797)   Justin Bogner via llvm-commits
• [llvm] [TargetLowering] Avoid creating a VTList until we know we need it. NFC (PR #180599)   Justin Fargnoli via llvm-commits
• [llvm] [LoopVectorizer] Rename variable (NFC). (PR #180585)   Justin Fargnoli via llvm-commits
• [clang] [flang] [llvm] [mlir] Reland "[NVPTX] Validate user-specified PTX version against SM version" (PR #180116)   Justin Fargnoli via llvm-commits
• [clang] [flang] [llvm] [mlir] Reland "[NVPTX] Validate user-specified PTX version against SM version" (PR #180116)   Justin Fargnoli via llvm-commits
• [clang] [flang] [llvm] [mlir] Reland "[NVPTX] Validate user-specified PTX version against SM version" (PR #180116)   Justin Fargnoli via llvm-commits
• [clang] [flang] [llvm] [mlir] Reland "[NVPTX] Validate user-specified PTX version against SM version" (PR #180116)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnrollPass] Indent `LLVM_DEBUG()` messages based on our depth in the `tryToUnrollLoop()` call graph (PR #178945)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnrollPass] Indent `LLVM_DEBUG()` messages based on our depth in the `tryToUnrollLoop()` call graph (PR #178945)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnrollPass] Indent `LLVM_DEBUG()` messages based on our depth in the `tryToUnrollLoop()` call graph (PR #178945)   Justin Fargnoli via llvm-commits
• [llvm] Revert "[Inliner] Add option (default off) to inline all calls regardless of the cost" (PR #180431)   Justin Fargnoli via llvm-commits
• [llvm] [InstCombine] Bail out on type mismatch in foldBitCastBitwiseLogic (PR #179640)   Kacper Doga via llvm-commits
• [llvm] [InstCombine] Bail out on type mismatch in foldBitCastBitwiseLogic (PR #179640)   Kacper Doga via llvm-commits
• [llvm] [InstCombine] Bail out on type mismatch in foldBitCastBitwiseLogic (PR #179640)   Kacper Doga via llvm-commits
• [llvm] [InstCombine] Bail out on type mismatch in foldBitCastBitwiseLogic (PR #179640)   Kacper Doga via llvm-commits
• [llvm] [ConstantFolding] Support bitcasting vectors to smaller element sizes with non-integer ratios. (PR #179640)   Kacper Doga via llvm-commits
• [llvm] [ConstantFolding] Support bitcasting vectors to smaller element sizes with non-integer ratios. (PR #179640)   Kacper Doga via llvm-commits
• [llvm] [ConstantFolding] Support bitcasting vectors to smaller element sizes with non-integer ratios. (PR #179640)   Kacper Doga via llvm-commits
• [llvm] [ConstantFolding] Support bitcasting vectors to smaller element sizes with non-integer ratios. (PR #179640)   Kacper Doga via llvm-commits
• [llvm] [ConstantFolding] Support bitcasting vectors to smaller element sizes with non-integer ratios. (PR #179640)   Kacper Doga via llvm-commits
• [llvm] [ConstantFolding] Support bitcasting vectors to smaller element sizes with non-integer ratios. (PR #179640)   Kacper Doga via llvm-commits
• [llvm] [ConstantFolding] Support bitcasting vectors to smaller element sizes with non-integer ratios. (PR #179640)   Kacper Doga via llvm-commits
• [llvm] [SystemZ][z/OS] Migrate most test case to use HLASM syntax (PR #181222)   Kai Nacke via llvm-commits
• [clang] [llvm] [SystemZ][z/OS] Migrate most test case to use HLASM syntax (PR #181222)   Kai Nacke via llvm-commits
• [clang] [llvm] [SystemZ][z/OS] Migrate most test case to use HLASM syntax (PR #181222)   Kai Nacke via llvm-commits
• [llvm] [mlir] [OMPIRBuilder] Hoist alloca's to entry blocks of compiler-emitted GPU reduction functions (PR #181359)   Kareem Ergawy via llvm-commits
• [clang] [llvm] [AArch64] Add support for intent to read prefetch intrinsic (PR #179709)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64] Add support for intent to read prefetch intrinsic (PR #179709)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64] Add support for range prefetch intrinsic (PR #170490)   Kerry McLaughlin via llvm-commits
• [llvm] [OFFLOAD] Extend olMemRegister API to handle cases when a memory block may have been mapped outside of liboffload. (PR #172226)   Kevin Sala Penades via llvm-commits
• [llvm] [OFFLOAD] Extend olMemRegister API to handle cases when a memory block may have been mapped outside of liboffload. (PR #172226)   Kevin Sala Penades via llvm-commits
• [llvm] [OFFLOAD] Extend olMemRegister API to handle cases when a memory block may have been mapped outside of liboffload. (PR #172226)   Kevin Sala Penades via llvm-commits
• [llvm] [OFFLOAD] Extend olMemRegister API to handle cases when a memory block may have been mapped outside of liboffload. (PR #172226)   Kevin Sala Penades via llvm-commits
• [llvm] [OFFLOAD] Extend olMemRegister API to handle cases when a memory block may have been mapped outside of liboffload. (PR #172226)   Kevin Sala Penades via llvm-commits
• [llvm] [OFFLOAD] Extend olMemRegister API to handle cases when a memory block may have been mapped outside of liboffload. (PR #172226)   Kevin Sala Penades via llvm-commits
• [llvm] [OFFLOAD] Extend olMemRegister API to handle cases when a memory block may have been mapped outside of liboffload. (PR #172226)   Kevin Sala Penades via llvm-commits
• [llvm] [OFFLOAD] Extend olMemRegister API to handle cases when a memory block may have been mapped outside of liboffload. (PR #172226)   Kevin Sala Penades via llvm-commits
• [llvm] [OFFLOAD] Extend olMemRegister API to handle cases when a memory block may have been mapped outside of liboffload. (PR #172226)   Kevin Sala Penades via llvm-commits
• [llvm] [OFFLOAD] Extend olMemRegister API to handle cases when a memory block may have been mapped outside of liboffload. (PR #172226)   Kevin Sala Penades via llvm-commits
• [llvm] [OFFLOAD] Extend olMemRegister API to handle cases when a memory block may have been mapped outside of liboffload. (PR #172226)   Kevin Sala Penades via llvm-commits
• [llvm] [OFFLOAD] Extend olMemRegister API to handle cases when a memory block may have been mapped outside of liboffload. (PR #172226)   Kevin Sala Penades via llvm-commits
• [clang] [flang] [llvm] [mlir] [mlir][OpenMP] Translate omp.declare_simd to LLVM IR (x86) (PR #178087)   Kiran Chandramohan via llvm-commits
• [clang] [flang] [llvm] [mlir] [mlir][OpenMP] Translate omp.declare_simd to LLVM IR (x86) (PR #178087)   Kiran Chandramohan via llvm-commits
• [clang] [flang] [llvm] [mlir] [mlir][OpenMP] Translate omp.declare_simd to LLVM IR (x86) (PR #178087)   Kiran Chandramohan via llvm-commits
• [clang] [flang] [llvm] [mlir] [mlir][OpenMP] Translate omp.declare_simd to LLVM IR (x86) (PR #178087)   Kiran Chandramohan via llvm-commits
• [llvm] [RISCV] Add an initial set of InstAliases for P extension. (PR #180315)   Kito Cheng via llvm-commits
• [llvm] [DebugInfo] DWARFFormValue use formatv instead of format (PR #180498)   Konrad Kleine via llvm-commits
• [llvm] [DebugInfo] DWARFFormValue use formatv instead of format (PR #180498)   Konrad Kleine via llvm-commits
• [llvm] [DebugInfo] DWARFFormValue use formatv instead of format (PR #180498)   Konrad Kleine via llvm-commits
• [llvm] [DebugInfo] DWARFFormValue use formatv instead of format (PR #180498)   Konrad Kleine via llvm-commits
• [llvm] [DebugInfo] DWARFFormValue use formatv instead of format (PR #180498)   Konrad Kleine via llvm-commits
• [llvm] [DebugInfo] DWARFFormValue use formatv instead of format (PR #180498)   Konrad Kleine via llvm-commits
• [llvm] [DebugInfo] DWARFFormValue use formatv instead of format (PR #180498)   Konrad Kleine via llvm-commits
• [llvm] [DebugInfo] DWARFFormValue use formatv instead of format (PR #180498)   Konrad Kleine via llvm-commits
• [llvm] [DebugInfo] DWARFFormValue use formatv instead of format (PR #180498)   Konrad Kleine via llvm-commits
• [llvm] [DebugInfo] DWARFFormValue use formatv instead of format (PR #180498)   Konrad Kleine via llvm-commits
• [llvm] [DebugInfo] DWARFFormValue use formatv instead of format (PR #180498)   Konrad Kleine via llvm-commits
• [llvm] [DebugInfo] DWARFFormValue use formatv instead of format (PR #180498)   Konrad Kleine via llvm-commits
• [llvm] [DebugInfo] DWARFFormValue use formatv instead of format (PR #180498)   Konrad Kleine via llvm-commits
• [llvm] [DebugInfo] DWARFFormValue use formatv instead of format (PR #180498)   Konrad Kleine via llvm-commits
• [llvm] [DebugInfo] DWARFFormValue use formatv instead of format (PR #180498)   Konrad Kleine via llvm-commits
• [llvm] [DebugInfo] DWARFFormValue use formatv instead of format (PR #180498)   Konrad Kleine via llvm-commits
• [llvm] [DebugInfo] DWARFFormValue use formatv instead of format (PR #180498)   Konrad Kleine via llvm-commits
• [llvm] [DebugInfo] DWARFFormValue use formatv instead of format (PR #180498)   Konrad Kleine via llvm-commits
• [llvm] [DebugInfo] DWARFFormValue use formatv instead of format (PR #180498)   Konrad Kleine via llvm-commits
• [llvm] [Support] Fixup for formatting hex on 32 bit (PR #181338)   Konrad Kleine via llvm-commits
• [llvm] [Support] Fixup for formatting hex on 32 bit (PR #181338)   Konrad Kleine via llvm-commits
• [llvm] [Support] Fixup for formatting hex on 32 bit (PR #181338)   Konrad Kleine via llvm-commits
• [llvm] [Support] Fixup for formatting hex on 32 bit (PR #181338)   Konrad Kleine via llvm-commits
• [llvm] [Support] Fixup for formatting hex on 32 bit (PR #181338)   Konrad Kleine via llvm-commits
• [llvm] [Support] Fixup for formatting hex on 32 bit (PR #181338)   Konrad Kleine via llvm-commits
• [clang] [llvm] [AMDGPU] Asynchronous loads from global/buffer to LDS on pre-GFX12 (PR #180466)   Krzysztof Drewniak via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add USM alloc & release funcs (PR #181120)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add USM alloc & release funcs (PR #181120)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add USM alloc & release funcs (PR #181120)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add USM alloc & release funcs (PR #181120)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add USM alloc & release funcs (PR #181120)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add USM alloc & release funcs (PR #181120)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add USM alloc & release funcs (PR #181120)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add USM alloc & release funcs (PR #181120)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add USM alloc & release funcs (PR #181120)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add USM alloc & release funcs (PR #181120)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Fix for static vars deinit order (libsycl vs liboffload) (PR #181366)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Fix for static vars deinit order (libsycl vs liboffload) (PR #181366)   Kseniya Tikhomirova via llvm-commits
• [llvm] [ValueTracking] Fix crash in PR175590 (PR #180355)   Kshitij Paranjape via llvm-commits
• [llvm] [ValueTracking] Conservative nosync check prevents vectorization (PR #181345)   Kshitij Paranjape via llvm-commits
• [llvm] [ValueTracking] Conservative nosync check prevents vectorization (PR #181345)   Kshitij Paranjape via llvm-commits
• [llvm] [ValueTracking] Conservative nosync check prevents vectorization (PR #181345)   Kshitij Paranjape via llvm-commits
• [llvm] [ValueTracking] Conservative nosync check prevents vectorization (PR #181345)   Kshitij Paranjape via llvm-commits
• [llvm] [ValueTracking] Conservative nosync check prevents vectorization (PR #181345)   Kshitij Paranjape via llvm-commits
• [llvm] [ValueTracking] Conservative nosync check prevents vectorization (PR #181345)   Kshitij Paranjape via llvm-commits
• [llvm] [ValueTracking] Conservative nosync check prevents vectorization (PR #181345)   Kshitij Paranjape via llvm-commits
• [llvm] [ValueTracking] Conservative nosync check prevents vectorization (PR #181345)   Kshitij Paranjape via llvm-commits
• [llvm] [ValueTracking] Conservative nosync check prevents vectorization (PR #181345)   Kshitij Paranjape via llvm-commits
• [llvm] [InstructionSimplify] Extend simplifyICmpWithZero to handle equivalent zero RHS (PR #179055)   Kunqiu Chen via llvm-commits
• [llvm] [InstructionSimplify] Extend simplifyICmpWithZero to handle equivalent zero RHS (PR #179055)   Kunqiu Chen via llvm-commits
• [llvm] [InstructionSimplify] Extend simplifyICmpWithZero to handle equivalent zero RHS (PR #179055)   Kunqiu Chen via llvm-commits
• [llvm] [NewPM] Port x86-issue-vzero-upper (PR #180886)   Kyungtak Woo via llvm-commits
• [llvm] [NewPM] Port x86-insert-x87-wait (PR #180128)   Kyungtak Woo via llvm-commits
• [llvm] [NewPM] Port x86-issue-vzero-upper (PR #180886)   Kyungtak Woo via llvm-commits
• [llvm] [NewPM] Port x86-issue-vzero-upper (PR #180886)   Kyungtak Woo via llvm-commits
• [llvm] [X86] Optimized ADC + ADD to ADC (PR #176713)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Propagate FastMathFlags from phis to blends (PR #180226)   LLVM Continuous Integration via llvm-commits
• [llvm] [X86] Allow handling of i128/256/512 SELECT on the FPU (PR #180197)   LLVM Continuous Integration via llvm-commits
• [lld] [lld] Add explicit std::move(...) to avoid a few vector copies (PR #180474)   LLVM Continuous Integration via llvm-commits
• [llvm] [InstCombine] Support minimumnum/maximumnum (PR #180529)   LLVM Continuous Integration via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Enabling support for Allocate clause in DO construct (PR #180172)   LLVM Continuous Integration via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Enabling support for Allocate clause in DO construct (PR #180172)   LLVM Continuous Integration via llvm-commits
• [llvm] [AArch64] Add support for B and H loads/stores in LoadStoreOptimizer (PR #180535)   LLVM Continuous Integration via llvm-commits
• [compiler-rt] [llvm] [Profile] Enable binary profile correlation for Mach-O binaries (PR #179937)   LLVM Continuous Integration via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for G_FSQRT (PR #179817)   LLVM Continuous Integration via llvm-commits
• [llvm] [DebugInfo] Fix an assertion in DWARFTypePrinter (PR #178986)   LLVM Continuous Integration via llvm-commits
• [llvm] [RISCV] Remove redundant czero in multi-word comparisons (PR #180485)   LLVM Continuous Integration via llvm-commits
• [llvm] [SPARC] Add TTI implementation for getPopcntSupport (PR #178843)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [AArch64] Add support for intent to read prefetch intrinsic (PR #179709)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU] Add intrinsic exposing s_alloc_vgpr (PR #163951)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [AMDGPU] Add dot4 fp8/bf8 instructions for gfx1170 (PR #180516)   LLVM Continuous Integration via llvm-commits
• [llvm] [X86] Add tests showing failure to reduce the vector width of vpmaddwd/vpmaddubsw/pmulhrsw nodes (PR #180728)   LLVM Continuous Integration via llvm-commits
• [llvm] [NFC] Initialize AtomicLoadExtActions array (PR #180752)   LLVM Continuous Integration via llvm-commits
• [flang] [llvm] [flang] Implement 'F_C_STRING' library function (Fortran 2023) (PR #174474)   LLVM Continuous Integration via llvm-commits
• [llvm] [SimplifyCFG][PGO] Add missing overflow check to ConstantFoldTerminator (PR #178964)   LLVM Continuous Integration via llvm-commits
• [llvm] [SimplifyCFG][PGO] Add missing overflow check to ConstantFoldTerminator (PR #178964)   LLVM Continuous Integration via llvm-commits
• [llvm] [llubi] Add UTC helper (PR #180603)   LLVM Continuous Integration via llvm-commits
• [llvm] [NewPM] Port x86-insert-x87-wait (PR #180128)   LLVM Continuous Integration via llvm-commits
• [compiler-rt] [llvm] [TySan] Add skeleton for adding interface functions (PR #170859)   LLVM Continuous Integration via llvm-commits
• [llvm] [NewPM] Port x86-insert-x87-wait (PR #180128)   LLVM Continuous Integration via llvm-commits
• [llvm] [outliners] Turn nooutline into an Enum Attribute (PR #163665)   LLVM Continuous Integration via llvm-commits
• [llvm] InstCombine: Fix wrong insert point for sqrt -> copysign simplify (PR #180838)   LLVM Continuous Integration via llvm-commits
• [compiler-rt] [llvm] [TySan] Add skeleton for adding interface functions (PR #170859)   LLVM Continuous Integration via llvm-commits
• [llvm] [NewPM] Port x86-insert-x87-wait (PR #180128)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU][Scheduler] Fix inconsistent MI slots after rematerialization revert (PR #180646)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU][NFC] Fix test by removing debug flag in llvm.amdgcn.raw.buffer.atomic.integer-minmax.ll (PR #181044)   LLVM Continuous Integration via llvm-commits
• [llvm] [DominanceFrontier] Support post-dominators on graphs with single root (PR #179336)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU] Add missing assert requirement to unit test (PR #181102)   LLVM Continuous Integration via llvm-commits
• [llvm] [RISCV] Improve 2*XLEN SHL legalization with P extension. (PR #181056)   LLVM Continuous Integration via llvm-commits
• [llvm] [NFC][AMDGPU] Remove unused/unimplemented `getWavesPerEU` variants (PR #181131)   LLVM Continuous Integration via llvm-commits
• [llvm] [IndVarSimplify] Add safety check for getTruncateExpr in genLoopLimit (PR #181296)   LLVM Continuous Integration via llvm-commits
• [llvm] [SPARC] Add TTI implementation for getPopcntSupport (PR #178843)   LLVM Continuous Integration via llvm-commits
• [llvm] [llvm/CAS] Add file-based APIs to `ObjectStore` (PR #180657)   LLVM Continuous Integration via llvm-commits
• [llvm] Revert "[WebAssembly] Mark extract.last.active as having invalid cost." (PR #180942)   LLVM Continuous Integration via llvm-commits
• [llvm] Revert "[WebAssembly] Mark extract.last.active as having invalid cost." (PR #180942)   LLVM Continuous Integration via llvm-commits
• [llvm] Revert "[WebAssembly] Mark extract.last.active as having invalid cost." (PR #180942)   LLVM Continuous Integration via llvm-commits
• [llvm] Revert "[WebAssembly] Mark extract.last.active as having invalid cost." (PR #180942)   LLVM Continuous Integration via llvm-commits
• [llvm] Revert "[WebAssembly] Mark extract.last.active as having invalid cost." (PR #180942)   LLVM Continuous Integration via llvm-commits
• [llvm] Revert "[WebAssembly] Mark extract.last.active as having invalid cost." (PR #180942)   LLVM Continuous Integration via llvm-commits
• [llvm] Revert "[WebAssembly] Mark extract.last.active as having invalid cost." (PR #180942)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Run initial recipe simplification on VPlan0. (PR #176828)   LLVM Continuous Integration via llvm-commits
• [llvm] [llubi] Add support for integer arithmetic ops (PR #181224)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Run initial recipe simplification on VPlan0. (PR #176828)   LLVM Continuous Integration via llvm-commits
• [llvm] [SCEV] Discard samesign when analyzing loop invariant exits (PR #181171)   LLVM Continuous Integration via llvm-commits
• [lldb] [llvm] [lldb-dap] Add unknown request handler (PR #181109)   LLVM Continuous Integration via llvm-commits
• [llvm] [NFC][LLVM][IPO] Remove pass initialization from pass constructors (PR #180584)   LLVM Continuous Integration via llvm-commits
• [llvm] [Github] Update requirements_formatting.txt (PR #181184)   LLVM Continuous Integration via llvm-commits
• [llvm] Add HexagonGlobalScheduler pass (PR #180803)   LLVM Continuous Integration via llvm-commits
• [llvm] [CodeGen][AMDGPU] TwoAddress: Only skip undef COPY at REG_SEQUENCE lowering when there is Live info or no uses for subreg (PR #175598)   LLVM Continuous Integration via llvm-commits
• [llvm] Add HexagonGlobalScheduler pass (PR #180803)   LLVM Continuous Integration via llvm-commits
• [llvm] 47fb7cd - [gn build] Port da0ad392ffc6   LLVM GN Syncbot via llvm-commits
• [llvm] 5335e8a - [gn build] Port 1bfa71743b08   LLVM GN Syncbot via llvm-commits
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• [llvm] [mlir] fix #176920 Add SideEffectInterfaces to dependencies (PR #181286)   Lance Wang via llvm-commits
• [llvm] [mlir] fix #176920 Add SideEffectInterfaces to dependencies (PR #181286)   Lance Wang via llvm-commits
• [llvm] [mlir] fix #176920 Add SideEffectInterfaces to dependencies (PR #181286)   Lance Wang via llvm-commits
• [llvm] [mlir] fix #176920 Add SideEffectInterfaces to dependencies (PR #181286)   Lance Wang via llvm-commits
• [llvm] [PowerPC] Legalize i8 for rea/write global name registers (PR #180805)   Lei Huang via llvm-commits
• [llvm] [PowerPC] Legalize i8 for rea/write global name registers (PR #180805)   Lei Huang via llvm-commits
• [llvm] [PowerPC] Legalize i8 for rea/write global name registers (PR #180805)   Lei Huang via llvm-commits
• [llvm] [PowerPC] Legalize i8 for rea/write global name registers (PR #180805)   Lei Huang via llvm-commits
• [llvm] [PowerPC] Legalize i8 for rea/write global name registers (PR #180805)   Lei Huang via llvm-commits
• [llvm] [PowerPC] Legalize i8 for read/write global name registers (PR #180805)   Lei Huang via llvm-commits
• [llvm] [PowerPC] Legalize i8 for read/write global name registers (PR #180805)   Lei Huang via llvm-commits
• [llvm] [PowerPC] Legalize i8 for read/write global name registers (PR #180805)   Lei Huang via llvm-commits
• [llvm] [PowerPC] Legalize i8 for read/write global name registers (PR #180805)   Lei Huang via llvm-commits
• [llvm] [PowerPC] Legalize i8 for read/write global name registers (PR #180805)   Lei Huang via llvm-commits
• [llvm] [NFC] Pre-Commit test case for __builtin_ppc_test_data_class (PR #181181)   Lei Huang via llvm-commits
• [llvm] [DAGCombiner] Fold trunc(build_vector(ext(x), ext(x)) -> build_vector(x,x) (PR #179857)   Liao Chunyu via llvm-commits
• [llvm] [DAGCombiner] Fold trunc(build_vector(ext(x), ext(x)) -> build_vector(x,x) (PR #179857)   Liao Chunyu via llvm-commits
• [llvm] [llvm-dwp] Adds --overflow-discard-path to control non-deterministic dwp overflow. (PR #180909)   Liu Ke via llvm-commits
• [llvm] [llvm-dwp] Adds --overflow-discard-path to control non-deterministic dwp overflow. (PR #180909)   Liu Ke via llvm-commits
• [llvm] [llvm-dwp] Adds --prioritize-discard-path to control non-deterministic dwp overflow. (PR #180909)   Liu Ke via llvm-commits
• [llvm] [llvm-dwp] Adds --prioritize-discard-path to control non-deterministic dwp overflow. (PR #180909)   Liu Ke via llvm-commits
• [llvm] [llvm-dwp] Adds --prioritize-discard-path to explicitly control dwp overflow. (PR #180909)   Liu Ke via llvm-commits
• [llvm] [llvm-dwp] Adds --prioritize-discard-path to explicitly control dwp overflow. (PR #180909)   Liu Ke via llvm-commits
• [llvm] [llvm-dwp] Adds --prioritize-discard-path to explicitly control dwp overflow. (PR #180909)   Liu Ke via llvm-commits
• [llvm] [llvm-dwp] Adds --prioritize-discard-path to explicitly control dwp overflow order. (PR #180909)   Liu Ke via llvm-commits
• [llvm] [llvm-dwp] Adds --prioritize-discard-path to explicitly control dwp overflow order. (PR #180909)   Liu Ke via llvm-commits
• [libcxx] [libcxxabi] [libunwind] [llvm] [libc++] Build Google Benchmark directly from Lit (PR #160367)   Louis Dionne via llvm-commits
• [libcxx] [llvm] [utils] update how auto-updated tests are displayed when the test is retried (PR #181097)   Louis Dionne via llvm-commits
• [libcxx] [llvm] [utils] update how auto-updated tests are displayed when the test is retried (PR #181097)   Louis Dionne via llvm-commits
• [libcxx] [llvm] [utils] update how auto-updated tests are displayed when the test is retried (PR #181097)   Louis Dionne via llvm-commits
• [llvm] [AMDGPU][Scheduler] Fix inconsistent MI slots after rematerialization revert (PR #180646)   Lucas Ramirez via llvm-commits
• [llvm] [AMDGPU][Scheduler] Fix inconsistent MI slots after rematerialization revert (PR #180646)   Lucas Ramirez via llvm-commits
• [llvm] [AMDGPU][Scheduler] Fix inconsistent MI slots after rematerialization revert (PR #180646)   Lucas Ramirez via llvm-commits
• [llvm] [AMDGPU][Scheduler] Fix inconsistent MI slots after rematerialization revert (PR #180646)   Lucas Ramirez via llvm-commits
• [llvm] [AMDGPU][Scheduler] Fix inconsistent MI slots after rematerialization revert (PR #180646)   Lucas Ramirez via llvm-commits
• [llvm] [AMDGPU][Scheduler] Fix inconsistent MI slots after rematerialization revert (PR #180646)   Lucas Ramirez via llvm-commits
• [llvm] [AMDGPU] Add missing assert requirement to unit test (PR #181102)   Lucas Ramirez via llvm-commits
• [llvm] [AMDGPU] Add missing assert requirement to unit test (PR #181102)   Lucas Ramirez via llvm-commits
• [llvm] [AMDGPU][Scheduler] Fix inconsistent MI slots after rematerialization revert (PR #180646)   Lucas Ramirez via llvm-commits
• [llvm] [AMDGPU] Add missing assert requirement to unit test (PR #181102)   Lucas Ramirez via llvm-commits
• [llvm] [AMDGPU] Add missing assert requirement to unit test (PR #181102)   Lucas Ramirez via llvm-commits
• [llvm] [NFC][AMDGPU] Remove unused/unimplemented `getWavesPerEU` variants (PR #181131)   Lucas Ramirez via llvm-commits
• [llvm] [SPIRV] Implement lowering for HLSL Texture2D sampling intrinsics (PR #179312)   Lucie Choi via llvm-commits
• [llvm] [VPlan] Add `-vplan-print-after=` option (PR #178700)   Luke Lau via llvm-commits
• [llvm] [RISCV] Add cost for @llvm.vector.splice.{left, right} (PR #179219)   Luke Lau via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Luke Lau via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Luke Lau via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Luke Lau via llvm-commits
• [llvm] [LV] Convert scatter w/uniform addr and mask being header mask to scalar store. (PR #172799)   Luke Lau via llvm-commits
• [llvm] [LV] Convert scatter w/uniform addr and mask being header mask to scalar store. (PR #172799)   Luke Lau via llvm-commits
• [llvm] [LV] Convert scatter w/uniform addr and mask being header mask to scalar store. (PR #172799)   Luke Lau via llvm-commits
• [llvm] [LV] Convert scatter w/uniform addr and mask being header mask to scalar store. (PR #172799)   Luke Lau via llvm-commits
• [llvm] [LV] Convert scatter w/uniform addr and mask being header mask to scalar store. (PR #172799)   Luke Lau via llvm-commits
• [llvm] [RISCV] Lower (abd[s|u] a, b) to (abs (sub a, b)) for i32/i64 element when `Zvabd` exists (PR #180494)   Luke Lau via llvm-commits
• [llvm] [RISCV] Lower (abd[s|u] a, b) to (abs (sub a, b)) for i32/i64 element when `Zvabd` exists (PR #180494)   Luke Lau via llvm-commits
• [llvm] [RISCV] Enable select optimization by default (PR #178394)   Luke Lau via llvm-commits
• [llvm] [RISCV] Enable select optimization by default (PR #178394)   Luke Lau via llvm-commits
• [llvm] [NFC][VPlan] Test showing that unit-stride-mv should be done later in pipeline (PR #180292)   Luke Lau via llvm-commits
• [llvm] [NFC][VPlan] Test showing that unit-stride-mv should be done later in pipeline (PR #180292)   Luke Lau via llvm-commits
• [llvm] [LV] Fix issue in VPFirstOrderRecurrencePHIRecipe::usesFirstLaneOnly (PR #179977)   Luke Lau via llvm-commits
• [llvm] [LV] Fix issue in VPFirstOrderRecurrencePHIRecipe::usesFirstLaneOnly (PR #179977)   Luke Lau via llvm-commits
• [llvm] [LV] Fix issue in VPFirstOrderRecurrencePHIRecipe::usesFirstLaneOnly (PR #179977)   Luke Lau via llvm-commits
• [llvm] [VPlan] Propagate FastMathFlags from phis to blends (PR #180226)   Luke Lau via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Luke Lau via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Luke Lau via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Luke Lau via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Luke Lau via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Luke Lau via llvm-commits
• [llvm] 2805c8a - [VPlan] Add missing REQUIRES: asserts to VPlan output test   Luke Lau via llvm-commits
• [llvm] [LV][NFC] Add "REQUIRES: assert" to new test file (PR #180522)   Luke Lau via llvm-commits
• [llvm] ed19bbf - Revert "[VPlan] Add missing REQUIRES: asserts to VPlan output test"   Luke Lau via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Luke Lau via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Luke Lau via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Luke Lau via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Luke Lau via llvm-commits
• [llvm] [VPlan] Fix convertToPhisToBlends folding non poison blend to poison (PR #180686)   Luke Lau via llvm-commits
• [llvm] [VPlan] Ignore poison incoming values when creating blend (PR #180005)   Luke Lau via llvm-commits
• [llvm] [RISCV] Relax reversed mask's mask requirement in reverse to strided load/store combine (PR #180706)   Luke Lau via llvm-commits
• [llvm] [VPlan] Add `-vplan-print-after=` option (PR #178700)   Luke Lau via llvm-commits
• [llvm] [VPlan] Add `-vplan-print-after=` option (PR #178700)   Luke Lau via llvm-commits
• [llvm] Provide intrinsics for speculative loads (PR #179642)   Luke Lau via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Luke Lau via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Luke Lau via llvm-commits
• [llvm] [RISCV] Relax reversed mask's mask requirement in reverse to strided load/store combine (PR #180706)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove vp.reverse mask check in performVP_REVERSECombine (PR #180724)   Luke Lau via llvm-commits
• [llvm] [VPlan] Add `-vplan-print-after=` option (PR #178700)   Luke Lau via llvm-commits
• [llvm] [VPlan] Add `-vplan-print-after=` option (PR #178700)   Luke Lau via llvm-commits
• [llvm] [LV] Add LoopVectorize/VPlan subdirectory for VPlan printing tests. (PR #180611)   Luke Lau via llvm-commits
• [llvm] [LV] Add LoopVectorize/VPlan subdirectory for VPlan printing tests. (PR #180611)   Luke Lau via llvm-commits
• [llvm] [LV] Add LoopVectorize/VPlan subdirectory for VPlan printing tests. (PR #180611)   Luke Lau via llvm-commits
• [llvm] [VPlan] Fix convertToPhisToBlends folding non poison blend to poison (PR #180686)   Luke Lau via llvm-commits
• [llvm] [VPlan] Fix convertToPhisToBlends folding non poison blend to poison (PR #180686)   Luke Lau via llvm-commits
• [llvm] [VPlan] Add `-vplan-print-after=` option (PR #178700)   Luke Lau via llvm-commits
• [llvm] [VPlan] Fix convertToPhisToBlends folding non poison blend to poison (PR #180686)   Luke Lau via llvm-commits
• [llvm] [VPlan] Explicitly reassociate header mask in logical and (PR #180898)   Luke Lau via llvm-commits
• [llvm] [VPlan] Simplify the computation of the block entry mask. (PR #173265)   Luke Lau via llvm-commits
• [llvm] [VPlan] Simplify the computation of the block entry mask. (PR #173265)   Luke Lau via llvm-commits
• [llvm] [VPlan] Simplify the computation of the block entry mask. (PR #173265)   Luke Lau via llvm-commits
• [llvm] [VPlan] Simplify the computation of the block entry mask. (PR #173265)   Luke Lau via llvm-commits
• [llvm] [VPlan] Simplify the computation of the block entry mask. (PR #173265)   Luke Lau via llvm-commits
• [llvm] [VPlan] Simplify the computation of the block entry mask. (PR #173265)   Luke Lau via llvm-commits
• [llvm] [VPlan] Run more passes through `RUN_VPLAN_PASS[_NO_VERIFY]` (PR #180580)   Luke Lau via llvm-commits
• [llvm] [VPlan] Run more passes through `RUN_VPLAN_PASS[_NO_VERIFY]` (PR #180580)   Luke Lau via llvm-commits
• [llvm] [RISCV] Relax reversed mask's mask requirement in reverse to strided load/store combine (PR #180706)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove vp.reverse mask check in performVP_REVERSECombine (PR #180724)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove vp.reverse mask check in performVP_REVERSECombine (PR #180724)   Luke Lau via llvm-commits
• [llvm] [VPlan] Add VPlan-dump-based test for predication (PR #180794)   Luke Lau via llvm-commits
• [llvm] [VPlan] Add VPlan-dump-based test for predication (PR #180794)   Luke Lau via llvm-commits
• [llvm] [VPlan] Add VPlan-dump-based test for predication (PR #180794)   Luke Lau via llvm-commits
• [llvm] [VPlan] Explicitly reassociate header mask in logical and (PR #180898)   Luke Lau via llvm-commits
• [llvm] [VPlan] Explicitly reassociate header mask in logical and (PR #180898)   Luke Lau via llvm-commits
• [llvm] [VPlan] Explicitly reassociate header mask in logical and (PR #180898)   Luke Lau via llvm-commits
• [llvm] [VPlan] Explicitly reassociate header mask in logical and (PR #180898)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove vp.reverse mask check in performVP_REVERSECombine (PR #180724)   Luke Lau via llvm-commits
• [llvm] [RISCV] Extend vp.reverse vp.load/vp.store combine to non-VP splice + reverse (PR #180907)   Luke Lau via llvm-commits
• [llvm] [VPlan] Explicitly reassociate header mask in logical and (PR #180898)   Luke Lau via llvm-commits
• [llvm] [VPlan] Explicitly reassociate header mask in logical and (PR #180898)   Luke Lau via llvm-commits
• [llvm] [VPlan] Explicitly reassociate header mask in logical and (PR #180898)   Luke Lau via llvm-commits
• [llvm] [VPlan] Explicitly reassociate header mask in logical and (PR #180898)   Luke Lau via llvm-commits
• [llvm] [VPlan] Extract reverse mask from reverse accesses (PR #155579)   Luke Lau via llvm-commits
• [llvm] [VPlan] Extract reverse mask from reverse accesses (PR #155579)   Luke Lau via llvm-commits
• [llvm] [VPlan] Explicitly reassociate header mask in logical and (PR #180898)   Luke Lau via llvm-commits
• [llvm] [VPlan] Explicitly reassociate header mask in logical and (PR #180898)   Luke Lau via llvm-commits
• [llvm] [LV] Simplify recipes after convertToConcreteRecipes (PR #180235)   Luke Lau via llvm-commits
• [clang] [llvm] [Clang][RISCV] Add Zvabd intrinsics (PR #180929)   Luke Lau via llvm-commits
• [clang] [llvm] [Clang][RISCV] Add Zvabd intrinsics (PR #180929)   Luke Lau via llvm-commits
• [clang] [llvm] [Clang][RISCV] Add Zvabd intrinsics (PR #180929)   Luke Lau via llvm-commits
• [llvm] [VPlan] Introduce m_c_Logical(And|Or) (NFC) (PR #180048)   Luke Lau via llvm-commits
• [llvm] [VPlan] Introduce m_c_Logical(And|Or) (NFC) (PR #180048)   Luke Lau via llvm-commits
• [llvm] [VPlan] Introduce m_c_Logical(And|Or) (NFC) (PR #180048)   Luke Lau via llvm-commits
• [llvm] [VPlan] Add the cost of spills when considering register pressure (PR #179646)   Luke Lau via llvm-commits
• [llvm] [VPlan] Add the cost of spills when considering register pressure (PR #179646)   Luke Lau via llvm-commits
• [llvm] [VPlan] Add the cost of spills when considering register pressure (PR #179646)   Luke Lau via llvm-commits
• [llvm] [VPlan] Add the cost of spills when considering register pressure (PR #179646)   Luke Lau via llvm-commits
• [llvm] [VPlan] Add the cost of spills when considering register pressure (PR #179646)   Luke Lau via llvm-commits
• [llvm] [VPlan] Add the cost of spills when considering register pressure (PR #179646)   Luke Lau via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Luke Lau via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Luke Lau via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Luke Lau via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Luke Lau via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Luke Lau via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Luke Lau via llvm-commits
• [llvm] [VPlan] Run more passes through `RUN_VPLAN_PASS[_NO_VERIFY]` (PR #180580)   Luke Lau via llvm-commits
• [llvm] [VPlan] Introduce m_c_Logical(And|Or) (PR #180048)   Luke Lau via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Luke Lau via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Luke Lau via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Luke Lau via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Luke Lau via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Luke Lau via llvm-commits
• [llvm] Define VP_FMINIMUMNUM and VP_FMAXIMUMNUM (PR #181084)   Luke Lau via llvm-commits
• [llvm] Define VP_FMINIMUMNUM and VP_FMAXIMUMNUM (PR #181084)   Luke Lau via llvm-commits
• [llvm] [LV] Simplify recipes after convertToConcreteRecipes (PR #180235)   Luke Lau via llvm-commits
• [llvm] [VPlan] Explicitly reassociate header mask in logical and (PR #180898)   Luke Lau via llvm-commits
• [llvm] [VPlan] Explicitly reassociate header mask in logical and (PR #180898)   Luke Lau via llvm-commits
• [llvm] [LV] Run VPlan licm late in executePlan (PR #181122)   Luke Lau via llvm-commits
• [llvm] [VPlan] Explicitly reassociate header mask in logical and (PR #180898)   Luke Lau via llvm-commits
• [llvm] [VPlan] Explicitly reassociate header mask in logical and (PR #180898)   Luke Lau via llvm-commits
• [llvm] [VPlan] Explicitly reassociate header mask in logical and (PR #180898)   Luke Lau via llvm-commits
• [llvm] [VPlan] Explicitly reassociate header mask in logical and (PR #180898)   Luke Lau via llvm-commits
• [llvm] [VPlan] Explicitly reassociate header mask in logical and (PR #180898)   Luke Lau via llvm-commits
• [llvm] [VPlan] Explicitly reassociate header mask in logical and (PR #180898)   Luke Lau via llvm-commits
• [llvm] [VPlan] Simplify the computation of the block entry mask. (PR #173265)   Luke Lau via llvm-commits
• [llvm] [LangRef] Require that vscale be a power of two (PR #145098)   Luke Lau via llvm-commits
• [llvm] [VPlan] Replace ExtractLastElement with scalar end value in exit blocks (PR #154071)   Luke Lau via llvm-commits
• [llvm] [VPlan] Remove unused VPExpandSCEVRecipe before expansion (PR #181329)   Luke Lau via llvm-commits
• [llvm] [VPlan] Add VPlan-dump-based test for predication (PR #180794)   Luke Lau via llvm-commits
• [llvm] [VPlan] Add VPlan-dump-based test for predication (PR #180794)   Luke Lau via llvm-commits
• [llvm] [VPlan] Add VPlan-dump-based test for predication (PR #180794)   Luke Lau via llvm-commits
• [llvm] [VPlan] Add VPlan-dump-based test for predication (PR #180794)   Luke Lau via llvm-commits
• [llvm] [AArch64] Fix handling of x29/x30 in inline assembly clobbers (PR #167783)   Lukáš Lalinský via llvm-commits
• [llvm] [AArch64] Fix handling of x29/x30 in inline assembly clobbers (PR #167783)   Lukáš Lalinský via llvm-commits
• [llvm] [FastISel] Lower call instruction with illegal type returned (PR #180322)   Luo Yuanke via llvm-commits
• [llvm] [InferAS] Infer the address space of inttoptr (PR #173244)   Luo Yuanke via llvm-commits
• [llvm] [InferAS] Infer the address space of inttoptr (PR #173244)   Luo Yuanke via llvm-commits
• [llvm] [InferAS] Infer the address space of inttoptr (PR #173244)   Luo Yuanke via llvm-commits
• [llvm] [InferAS] Infer the address space of inttoptr (PR #173244)   Luo Yuanke via llvm-commits
• [llvm] [InferAS] Infer the address space of inttoptr (PR #173244)   Luo Yuanke via llvm-commits
• [llvm] [InferAS] Infer the address space of inttoptr (PR #173244)   Luo Yuanke via llvm-commits
• [llvm] [InferAS] Infer the address space of inttoptr (PR #173244)   Luo Yuanke via llvm-commits
• [llvm] [InferAS] Infer the address space of inttoptr (PR #173244)   Luo Yuanke via llvm-commits
• [llvm] [SelectionDAG] Optimize 32-bit udiv with 33-bit magic constants on 64-bit targets (PR #181288)   MITSUNARI Shigeo via llvm-commits
• [llvm] [SelectionDAG] Optimize 32-bit udiv with 33-bit magic constants on 64-bit targets (PR #181288)   MITSUNARI Shigeo via llvm-commits
• [llvm] [SelectionDAG] Optimize 32-bit udiv with 33-bit magic constants on 64-bit targets (PR #181288)   MITSUNARI Shigeo via llvm-commits
• [llvm] [SelectionDAG] Optimize 32-bit udiv with 33-bit magic constants on 64-bit targets (PR #181288)   MITSUNARI Shigeo via llvm-commits
• [llvm] [SelectionDAG] Optimize 32-bit udiv with 33-bit magic constants on 64-bit targets (PR #181288)   MITSUNARI Shigeo via llvm-commits
• [llvm] [SelectionDAG] Optimize 32-bit udiv with 33-bit magic constants on 64-bit targets (PR #181288)   MITSUNARI Shigeo via llvm-commits
• [llvm] [GVN] Support rnflow pattern matching and transform (PR #162259)   Madhur Amilkanthwar via llvm-commits
• [llvm] [instcombine][x86]: simplifyx86fpmaxmin - allow negzero for single operand (PR #180418)   Madhur Kumar via llvm-commits
• [llvm] [instcombine][x86]: simplifyx86fpmaxmin - allow negzero for single operand (PR #180418)   Madhur Kumar via llvm-commits
• [llvm] [instcombine][x86]: simplifyx86fpmaxmin - allow negzero for single operand (PR #180418)   Madhur Kumar via llvm-commits
• [compiler-rt] Allow building the profiler runtime on tvOS and watchOS (PR #180704)   Mads Marquart via llvm-commits
• [compiler-rt] Allow building the profiler runtime on tvOS and watchOS (PR #180704)   Mads Marquart via llvm-commits
• [llvm] [BOLT] Add --clone-at-origin option (PR #181003)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT] Add --clone-at-origin option (PR #181003)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT] Add --clone-at-origin option (PR #181003)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT] Add --clone-at-origin option (PR #181003)   Maksim Panchenko via llvm-commits
• [llvm] [ConstraintElim] Infer linear constraints from udiv and urem (PR #180689)   Manasij Mukherjee via llvm-commits
• [llvm] [ConstraintElim] Use ConstantRange information for ConstraintElimination (PR #180862)   Manasij Mukherjee via llvm-commits
• [llvm] [ConstraintElim] Use ConstantRange information for ConstraintElimination (PR #180862)   Manasij Mukherjee via llvm-commits
• [llvm] [ConstraintElim] Use ConstantRange information for ConstraintElimination (PR #180862)   Manasij Mukherjee via llvm-commits
• [llvm] [ConstraintElim] Use ConstantRange information for ConstraintElimination (PR #180862)   Manasij Mukherjee via llvm-commits
• [clang] [llvm] Make OpenCL an OSType rather than an EnvironmentType. (PR #170297)   Marcos Maronas via llvm-commits
• [llvm] [SPIRV] Fix constant materialization for width > 64bit (PR #180182)   Marcos Maronas via llvm-commits
• [clang] [llvm] Make OpenCL an OSType rather than an EnvironmentType. (PR #170297)   Marcos Maronas via llvm-commits
• [llvm] [SPIR-V] Emit ceil(Bitwidth / 32) words during OpConstant creation (PR #180218)   Marcos Maronas via llvm-commits
• [llvm] [SPIR-V] Emit ceil(Bitwidth / 32) words during OpConstant creation (PR #180218)   Marcos Maronas via llvm-commits
• [llvm] [SPIRV] Add a `SPIRVTypeInst` type with some guardrails (PR #179947)   Marcos Maronas via llvm-commits
• [llvm] [AMDGPU] Handle vector types for reqd_work_group_size constant folding. (PR #179551)   Marcos Maronas via llvm-commits
• [llvm] [AMDGPU] Handle vector types for reqd_work_group_size constant folding. (PR #179551)   Marcos Maronas via llvm-commits
• [clang] [llvm] Make OpenCL an OSType rather than an EnvironmentType. (PR #170297)   Marcos Maronas via llvm-commits
• [clang] [llvm] Make OpenCL an OSType rather than an EnvironmentType. (PR #170297)   Marcos Maronas via llvm-commits
• [llvm] [AMDGPU] Handle vector types for reqd_work_group_size constant folding. (PR #179551)   Marcos Maronas via llvm-commits
• [compiler-rt] [llvm] [Profile] Enable binary profile correlation for Mach-O binaries (PR #179937)   Marina Taylor via llvm-commits
• [compiler-rt] [llvm] [Profile] Enable binary profile correlation for Mach-O binaries (PR #179937)   Marina Taylor via llvm-commits
• [compiler-rt] [llvm] [Profile] Enable binary profile correlation for Mach-O binaries (PR #179937)   Marina Taylor via llvm-commits
• [compiler-rt] [llvm] [Profile] Enable binary profile correlation for Mach-O binaries (PR #179937)   Marina Taylor via llvm-commits
• [clang] [llvm] [RISCV] Add SpacemiT A100 processor definition (PR #174052)   Mark Zhuang via llvm-commits
• [llvm] [ADT] Allow member pointers in map_range and map_to_vector (PR #181154)   Markus Böck via llvm-commits
• [llvm] [ADT] Allow member pointers in map_range and map_to_vector (PR #181154)   Markus Böck via llvm-commits
• [llvm] [ADT] Allow member pointers in map_range and map_to_vector (PR #181154)   Markus Böck via llvm-commits
• [clang] [llvm] [Clang][Lexer] Reland "Detect SSE4.2 availability at runtime in fastParseASCIIIdentifier" (PR #180631)   Martin Storsjö via llvm-commits
• [llvm] [SLP]Support for zext i1 %x modeling as select %x, 1, 0 (PR #180635)   Martin Storsjö via llvm-commits
• [llvm] [SLP]Support for zext i1 %x modeling as select %x, 1, 0 (PR #180635)   Martin Storsjö via llvm-commits
• [lld] [llvm] [LIT][LLD] Fix Windows test failures due to path separator mismatches (PR #179865)   Martin Storsjö via llvm-commits
• [llvm] [X86] Correctly call 16 byte atomic helpers on x86_64 Windows (PR #181356)   Martin Storsjö via llvm-commits
• [llvm] [X86] Correctly call 16 byte atomic helpers on x86_64 Windows (PR #181356)   Martin Storsjö via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Marvin Häuser via llvm-commits
• [clang] [llvm] Add AMO load with Compare and Swap Not Equal (PR #178061)   Maryam Moghadas via llvm-commits
• [llvm] [PowerPC] Implement v256i1 BUILD_VECTOR custom lowering (PR #181233)   Maryam Moghadas via llvm-commits
• [llvm] [PowerPC] Implement v256i1 BUILD_VECTOR custom lowering (PR #181233)   Maryam Moghadas via llvm-commits
• [libc] [llvm] [libc][math] Refactor llogbl to be header-only and constexpr (PR #175376)   Mathew Joseph via llvm-commits
• [libc] [llvm] [libc][math] Refactor llogbl to be header-only and constexpr (PR #175376)   Mathew Joseph via llvm-commits
• [libc] [llvm] [libc][math] Refactor llogbl to be header-only and constexpr (PR #175376)   Mathew Joseph via llvm-commits
• [libc] [llvm] [libc][math] Refactor llogbl to be header-only and constexpr (PR #175376)   Mathew Joseph via llvm-commits
• [libc] [llvm] [libc][math] Refactor llogbl to be header-only and constexpr (PR #175376)   Mathew Joseph via llvm-commits
• [libc] [llvm] [libc][math] Refactor llogbl to be header-only and constexpr (PR #175376)   Mathew Joseph via llvm-commits
• [libc] [llvm] [libc][math] Refactor llogbl to be header-only and constexpr (PR #175376)   Mathew Joseph via llvm-commits
• [llvm] AMDGPU: Add syntax for s_wait_event values (PR #180272)   Matt Arsenault via llvm-commits
• [llvm] [ARM] Precommit tests: strictfp rounding vector intrinsics (PR #180479)   Matt Arsenault via llvm-commits
• [llvm] [ARM] Precommit tests: strictfp rounding vector intrinsics (PR #180479)   Matt Arsenault via llvm-commits
• [llvm] [ARM] Precommit tests: strictfp rounding vector intrinsics (PR #180479)   Matt Arsenault via llvm-commits
• [llvm] [ARM] Precommit tests: strictfp rounding vector intrinsics (PR #180479)   Matt Arsenault via llvm-commits
• [llvm] [GISel] computeKnownBits - add CTLS handling (PR #178063)   Matt Arsenault via llvm-commits
• [llvm] [GISel] computeKnownBits - add CTLS handling (PR #178063)   Matt Arsenault via llvm-commits
• [llvm] [GISel] computeKnownBits - add CTLS handling (PR #178063)   Matt Arsenault via llvm-commits
• [llvm] [GISel] computeKnownBits - add CTLS handling (PR #178063)   Matt Arsenault via llvm-commits
• [llvm] [MIParser] - Add support for MMRAs (PR #180320)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Use promotion to f32 path for log/log10 for f16 by default (PR #180240)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add a test for libcall simplify pow handling (PR #180491)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add a test for libcall simplify pow handling (PR #180491)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add a test for libcall simplify pow handling (PR #180491)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add a test for libcall simplify pow handling (PR #180491)   Matt Arsenault via llvm-commits
• [llvm] [GISel] computeKnownBits - add CTLS handling (PR #178063)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Use named constant for impossible repair cost (PR #180490)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Use named constant for impossible repair cost (PR #180490)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add a test for libcall simplify pow handling (PR #180491)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Use named constant for impossible repair cost (PR #180490)   Matt Arsenault via llvm-commits
• [llvm] [ValueTracking] Treat fmul NaN sign bit as unknown to prevent incorrect fabs folding (PR #180339)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Improve documentation for SUBREG_TO_REG (PR #180504)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Support minimumnum/maximumnum (PR #180529)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Support minimumnum/maximumnum (PR #180529)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Support minimumnum/maximumnum (PR #180529)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Support minimumnum/maximumnum (PR #180529)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Support minimumnum/maximumnum (PR #180529)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen][NFC] Update a comment. (PR #180531)   Matt Arsenault via llvm-commits
• [llvm] [MIParser] - Add support for MMRAs (PR #180320)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Libcall expand fast pow/powr/pown/rootn for float case (PR #180553)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Libcall expand fast pow/powr/pown/rootn for float case (PR #180553)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Libcall expand fast pow/powr/pown/rootn for float case (PR #180553)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][GlobalISel] Fix incorrect codegen for FPR16/FPR8 to GPR copies (PR #171499)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add intrinsic exposing s_alloc_vgpr (PR #163951)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Add dot4 fp8/bf8 instructions for gfx1170 (PR #180516)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Improve AMDGPU sqrt and inverse sqrt handling for bf16 (PR #180291)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Improve AMDGPU sqrt and inverse sqrt handling for bf16 (PR #180291)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Improve AMDGPU sqrt and inverse sqrt handling for bf16 (PR #180291)   Matt Arsenault via llvm-commits
• [llvm] [MIParser] - Add support for MMRAs (PR #180320)   Matt Arsenault via llvm-commits
• [llvm] [MIParser] - Add support for MMRAs (PR #180320)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][True16] add true16 pattern for cvt_pk_fp32_f8 (PR #180096)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Cgscc amdgpu attributor (PR #179719)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Cgscc amdgpu attributor (PR #179719)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] [GlobalIsel] Enabling lit tests for G_FRAME_INDEX opcode (PR #180680)   Matt Arsenault via llvm-commits
• [llvm] [FastISel] Lower call instruction with illegal type returned (PR #180322)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Drop `AMDGPU::` (PR #180663)   Matt Arsenault via llvm-commits
• [llvm] LangRef: Clarify behaviors of nsz in fast math flag (PR #137567)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Libcall expand fast pow/powr/pown/rootn for float case (PR #180553)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Add baseline SimplifyDemandedFPClass ldexp tests (PR #180702)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Add baseline SimplifyDemandedFPClass ldexp tests (PR #180702)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Add baseline SimplifyDemandedFPClass ldexp tests (PR #180702)   Matt Arsenault via llvm-commits
• [clang] [llvm] InstCombine: Use SimplifyDemandedFPClass on fmul (PR #177490)   Matt Arsenault via llvm-commits
• [clang] [llvm] InstCombine: Use SimplifyDemandedFPClass on fmul (PR #177490)   Matt Arsenault via llvm-commits
• [clang] [llvm] InstCombine: Use SimplifyDemandedFPClass on fmul (PR #177490)   Matt Arsenault via llvm-commits
• [llvm] [MIRParser] Accept sub-register for implicit operand verification (PR #180707)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Clean up VOP3PWMMA_Profile by removing XF32 related stuff (PR #180688)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Clean up VOP3PWMMA_Profile by removing XF32 related stuff (PR #180688)   Matt Arsenault via llvm-commits
• [llvm] [TableGen] Fix potential null pointer dereference in parseInstructionPattern (PR #180767)   Matt Arsenault via llvm-commits
• [llvm] [MIRParser] Accept sub-register for implicit operand verification (PR #180707)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Fix broken insert point for fdiv replacement (PR #180830)   Matt Arsenault via llvm-commits
• [llvm] [SDAG] Do not treat fp x!=0|y!=0 as special case in branch builder. (PR #180895)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Fix insert point for rounding intrinsic -> copysign (PR #180837)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Fix wrong insert point for fdiv->copysign simplify (PR #180839)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Fix wrong insert point for various fmul->copysign simplifies (PR #180840)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Fix wrong insert point for sqrt -> copysign simplify (PR #180838)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Libcall expand fast pow/powr/pown/rootn for float case (PR #180553)   Matt Arsenault via llvm-commits
• [llvm] [CHR] Skip regions containing convergent calls (PR #180882)   Matt Arsenault via llvm-commits
• [llvm] [CHR] Skip regions containing convergent calls (PR #180882)   Matt Arsenault via llvm-commits
• [llvm] [LangRef] Clarify nsz semantics (PR #180906)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Libcall expand fast pow/powr/pown/rootn for float case (PR #180553)   Matt Arsenault via llvm-commits
• [llvm] [ExpandIRInsts] Support saturating fptoi (PR #179710)   Matt Arsenault via llvm-commits
• [llvm] [PowerPC] Legalize i8 for read/write global name registers (PR #180805)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Remove alignment constraint from spill pseudos (PR #177317)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Remove alignment constraint from spill pseudos (PR #177317)   Matt Arsenault via llvm-commits
• [llvm] [PowerPC] Legalize i8 for read/write global name registers (PR #180805)   Matt Arsenault via llvm-commits
• [llvm] [SDAG] Copy flags in convertMask when legalizing vselect/setcc (PR #180979)   Matt Arsenault via llvm-commits
• [llvm] [llvm-reduce] Add a pass to replace unconditinal branches with returns (PR #180993)   Matt Arsenault via llvm-commits
• [llvm] [llvm-reduce] Add a pass to replace unconditinal branches with returns (PR #180993)   Matt Arsenault via llvm-commits
• [llvm] [llvm-reduce] Add a pass to replace unconditinal branches with returns (PR #180993)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Remove alignment constraint from spill pseudos (PR #177317)   Matt Arsenault via llvm-commits
• [llvm] In-class initialize DenseMapBase members. (PR #177168)   Matt Davis via llvm-commits
• [llvm] In-class initialize DenseMapBase members. (PR #177168)   Matt Davis via llvm-commits
• [llvm] [AArch64][ISel] Add clmul to pmullb/t lowering (PR #180568)   Matthew Devereau via llvm-commits
• [llvm] [AArch64][ISel] Add clmul to pmullb/t lowering (PR #180568)   Matthew Devereau via llvm-commits
• [llvm] [AArch64][ISel] Add clmul to pmullb/t lowering (PR #180568)   Matthew Devereau via llvm-commits
• [llvm] [AArch64][ISel] Add clmul to pmullb/t lowering (PR #180568)   Matthew Devereau via llvm-commits
• [llvm] [AArch64][ISel] Add clmul to pmullb/t lowering (PR #180568)   Matthew Devereau via llvm-commits
• [llvm] [AArch64][ISel] Add clmul to pmullb/t lowering (PR #180568)   Matthew Devereau via llvm-commits
• [llvm] [AArch64][ISel] Add clmul to pmullb/t lowering (PR #180568)   Matthew Devereau via llvm-commits
• [llvm] [AArch64][ISel] Add clmul to pmullb/t lowering (PR #180568)   Matthew Devereau via llvm-commits
• [llvm] [AArch64][ISel] Lower fixed-width i64 vector CLMUL intrinsics (PR #178876)   Matthew Devereau via llvm-commits
• [llvm] [AArch64][ISel] Add clmul to pmullb/t lowering (PR #180568)   Matthew Devereau via llvm-commits
• [llvm] [AArch64][ISel] Lower fixed-width i64 vector CLMUL intrinsics (PR #178876)   Matthew Devereau via llvm-commits
• [compiler-rt] [llvm] [TySan] Add skeleton for adding interface functions (PR #170859)   Matthew Nagy via llvm-commits
• [llvm] [IndVars] Use context for proving same sign (PR #181093)   Max Kazantsev via llvm-commits
• [llvm] [IndVars] Use context for proving same sign (PR #181093)   Max Kazantsev via llvm-commits
• [llvm] [IndVars] Use context for proving same sign (PR #181093)   Max Kazantsev via llvm-commits
• [llvm] [IndVars] Use context for proving same sign (PR #181093)   Max Kazantsev via llvm-commits
• [llvm] [IndVars] Use context for proving same sign (PR #181093)   Max Kazantsev via llvm-commits
• [llvm] [IndVars] Use context for proving same sign (PR #181093)   Max Kazantsev via llvm-commits
• [llvm] [IndVars] Use context for proving same sign (PR #181093)   Max Kazantsev via llvm-commits
• [llvm] [IndVars] Use context for proving same sign (PR #181093)   Max Kazantsev via llvm-commits
• [lld] [lld][MachO] Accept prefixed boundary symbol names (PR #181201)   Max T. Kristiansen via llvm-commits
• [llvm] [LV] Convert gather loads with invariant stride into strided loads (PR #147297)   Mel Chen via llvm-commits
• [llvm] [LV] Convert gather loads with invariant stride into strided loads (PR #147297)   Mel Chen via llvm-commits
• [llvm] [LV] Convert gather loads with invariant stride into strided loads (PR #147297)   Mel Chen via llvm-commits
• [llvm] [LV] Convert gather loads with invariant stride into strided loads (PR #147297)   Mel Chen via llvm-commits
• [llvm] [LV] Convert gather loads with invariant stride into strided loads (PR #147297)   Mel Chen via llvm-commits
• [llvm] [LV] Convert gather loads with invariant stride into strided loads (PR #147297)   Mel Chen via llvm-commits
• [llvm] [LV] Convert gather loads with invariant stride into strided loads (PR #147297)   Mel Chen via llvm-commits
• [llvm] [LV] Convert gather loads with constant stride into strided loads (PR #147297)   Mel Chen via llvm-commits
• [llvm] [LV] Convert gather loads with constant stride into strided loads (PR #147297)   Mel Chen via llvm-commits
• [llvm] [VPlan] Simplify true && x -> x (PR #179426)   Mel Chen via llvm-commits
• [llvm] [VPlan] Simplify true && x -> x (PR #179426)   Mel Chen via llvm-commits
• [llvm] [VPlan] Simplify true && x -> x (PR #179426)   Mel Chen via llvm-commits
• [llvm] [VPlan] Simplify the computation of the block entry mask. (PR #173265)   Mel Chen via llvm-commits
• [llvm] [VPlan] Simplify the computation of the block entry mask. (PR #173265)   Mel Chen via llvm-commits
• [llvm] [VPlan] Simplify the computation of the block entry mask. (PR #173265)   Mel Chen via llvm-commits
• [llvm] [VPlan] Extract reverse mask from reverse accesses (PR #155579)   Mel Chen via llvm-commits
• [llvm] [VPlan] Extract reverse mask from reverse accesses (PR #155579)   Mel Chen via llvm-commits
• [llvm] [VPlan] Optimize FindLast of FindIV w/o sentinel. (PR #172569)   Mel Chen via llvm-commits
• [llvm] [VPlan] Optimize FindLast of FindIV w/o sentinel. (PR #172569)   Mel Chen via llvm-commits
• [llvm] [VPlan] Optimize FindLast of FindIV w/o sentinel. (PR #172569)   Mel Chen via llvm-commits
• [llvm] [VPlan] Remove unused VPExpandSCEVRecipe before expansion (PR #181329)   Mel Chen via llvm-commits
• [llvm] [LV] Convert gather loads with constant stride into strided loads (PR #147297)   Mel Chen via llvm-commits
• [llvm] [LV] Convert gather loads with constant stride into strided loads (PR #147297)   Mel Chen via llvm-commits
• [llvm] [LV] Convert gather loads with constant stride into strided loads (PR #147297)   Mel Chen via llvm-commits
• [llvm] [LV] Convert gather loads with constant stride into strided loads (PR #147297)   Mel Chen via llvm-commits
• [llvm] [VPlan] Optimize FindLast of FindIV w/o sentinel. (PR #172569)   Mel Chen via llvm-commits
• [llvm] [VPlan] Optimize FindLast of FindIV w/o sentinel. (PR #172569)   Mel Chen via llvm-commits
• [llvm] [VPlan] Optimize FindLast of FindIV w/o sentinel. (PR #172569)   Mel Chen via llvm-commits
• [llvm] [LSR] Add unequal cost eval for dropping solutions (PR #178039)   Michael Berg via llvm-commits
• [llvm] Allow anonymous basic types (PR #180016)   Michael Buch via llvm-commits
• [llvm] [llvm][DebugInfo] Allow anonymous basic types (PR #180016)   Michael Buch via llvm-commits
• [llvm] Add DW_LNAME_HIP (PR #180999)   Michael Buch via llvm-commits
• [llvm] Add DW_LNAME_HIP (PR #180999)   Michael Buch via llvm-commits
• [llvm] Add DW_LNAME_HIP (PR #180999)   Michael Buch via llvm-commits
• [llvm] Add DW_LNAME_HIP (PR #180999)   Michael Buch via llvm-commits
• [llvm] Add DW_LNAME_HIP (PR #180999)   Michael Buch via llvm-commits
• [lldb] [llvm] [DO-NOT-MERGE] Test github action (PR #181349)   Michael Buch via llvm-commits
• [lldb] [llvm] [DO-NOT-MERGE] Test github action (PR #181349)   Michael Buch via llvm-commits
• [lldb] [llvm] [DO-NOT-MERGE] Test github action (PR #181349)   Michael Buch via llvm-commits
• [lldb] [llvm] [DO-NOT-MERGE] Test github action (PR #181349)   Michael Buch via llvm-commits
• [llvm] [OFFLOAD] Implement excluding filters for debugging (PR #180538)   Michael Klemm via llvm-commits
• [llvm] [OFFLOAD] Implement excluding filters for debugging (PR #180538)   Michael Klemm via llvm-commits
• [llvm] [OFFLOAD] Implement excluding filters for debugging (PR #180538)   Michael Klemm via llvm-commits
• [flang] [llvm] [flang] Implement 'F_C_STRING' library function (Fortran 2023) (PR #174474)   Michael Klemm via llvm-commits
• [llvm] [SPIRV] Legalize extended integers for compare instructions. (PR #180254)   Michal Paszkowski via llvm-commits
• [llvm] [InstCombine] Avoid invalid bitcast across address spaces in foldIntegerTypedPHI (PR #181064)   Michal Paszkowski via llvm-commits
• [llvm] [AsmParserContext] Fix regression after #174566 (PR #180068)   Mikael Holmen via llvm-commits
• [llvm] [CodeGen][NFC] Update a comment. (PR #180531)   Mikhail Gudim via llvm-commits
• [llvm] [CodeGen][NFC] Update a comment. (PR #180531)   Mikhail Gudim via llvm-commits
• [llvm] [X86][utils] Support `-basic-block-sections` in `update_llc_test_checks` (PR #178999)   Mikhail Gudim via llvm-commits
• [llvm] [CodeGen] Add the `ComputeLiveIns` pass. (PR #178037)   Mikhail Gudim via llvm-commits
• [llvm] [ValueTracking] Extend computeConstantRange for add/sub, sext/zext/trunc (PR #181110)   Mikhail Gudim via llvm-commits
• [llvm] [ValueTracking] Extend computeConstantRange for add/sub, sext/zext/trunc (PR #181110)   Mikhail Gudim via llvm-commits
• [llvm] [ValueTracking] Extend computeConstantRange for add/sub, sext/zext/trunc (PR #181110)   Mikhail Gudim via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] AMD Zen 6 Initial enablement (PR #179150)   Mikołaj Piróg via llvm-commits
• [llvm] [CodeGen] Don't merge stack slots accessed with volatile after setjmp (returns twice) calls (PR #181370)   Mikołaj Piróg via llvm-commits
• [llvm] [CodeGen] Don't merge stack slots accessed with volatile after setjmp (returns twice) calls (PR #181370)   Mikołaj Piróg via llvm-commits
• [llvm] [CodeGen] Don't merge stack slots accessed with volatile after setjmp (returns twice) calls (PR #181370)   Mikołaj Piróg via llvm-commits
• [llvm] [RISCV] Stash GPR to FPR if emergency spill slot is not reachable (PR #180685)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Remove vp.reverse mask check in performVP_REVERSECombine (PR #180724)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Update Andes45 vector fixed-point arithmetic scheduling info (PR #180451)   Min-Yih Hsu via llvm-commits
• [llvm] [CodeGenPrepare][NFC] Reland: Update the dominator tree instead of rebuilding it (PR #179040)   Mingjie Xu via llvm-commits
• [llvm] [CodeGenPrepare][NFC] Reland: Update the dominator tree instead of rebuilding it (PR #179040)   Mingjie Xu via llvm-commits
• [llvm] [CodeGenPrepare][NFC] Reland: Update the dominator tree instead of rebuilding it (PR #179040)   Mingjie Xu via llvm-commits
• [llvm] [CodeGenPrepare][NFC] Reland: Update the dominator tree instead of rebuilding it (PR #179040)   Mingjie Xu via llvm-commits
• [llvm] [CodeGenPrepare][NFC] Reland: Update the dominator tree instead of rebuilding it (PR #179040)   Mingjie Xu via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSD] Add riscv64 support (PR #180549)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSD] Add riscv64 support (PR #180549)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add ppc64le support (PR #180669)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add riscv64 support (PR #180670)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add arm support (PR #180674)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSD] Add riscv64 support (PR #180549)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSD] Add riscv64 support (PR #180549)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSD] Add riscv64 support (PR #180549)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSD] Add riscv64 support (PR #180549)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSD] Add riscv64 support (PR #180549)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSD] Add riscv64 support (PR #180549)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSD] Add riscv64 support (PR #180549)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSD] Add riscv64 support (PR #180549)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSD] Add riscv64 support (PR #180549)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add ppc64le support (PR #180669)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add ppc64le support (PR #180669)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add ppc64le support (PR #180669)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add ppc64le support (PR #180669)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add ppc64le support (PR #180669)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add ppc64le support (PR #180669)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSD] Add riscv64 support (PR #180549)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add ppc64le support (PR #180669)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add ppc64le support (PR #180669)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add riscv64 support (PR #180670)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add arm support (PR #180674)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add riscv64 support (PR #180670)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add riscv64 support (PR #180670)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add arm support (PR #180674)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add riscv64 support (PR #180670)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add arm support (PR #180674)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add ppc64le support (PR #180669)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add ppc and ppc64le support (PR #180669)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add ppc and ppc64le support (PR #180669)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add ppc and ppc64le support (PR #180669)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add ppc and ppc64le support (PR #180669)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add ppc and ppc64le support (PR #180669)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add ppc and ppc64le support (PR #180669)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add ppc and ppc64le support (PR #180669)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add ppc64le support (PR #180669)   Minsoo Choo via llvm-commits
• [llvm] [ReleaseNotes] Create subheader for LLDB/FreeBSD (PR #181000)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Show crash info on start (PR #178027)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Show crash info on start (PR #178027)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add arm support (PR #180674)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add arm support (PR #180674)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add arm support (PR #180674)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add arm support (PR #180674)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add arm support (PR #180674)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add arm support (PR #180674)   Minsoo Choo via llvm-commits
• [llvm] [ProfCheck] Exclude passes not in standard pipelines (PR #180814)   Mircea Trofin via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [lld] [llvm] [NFC] Fix tests with invalid RUN directives (PR #179668)   Mircea Trofin via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [lld] [llvm] [NFC] Fix tests with invalid RUN directives (PR #179668)   Mircea Trofin via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [lld] [llvm] [NFC] Fix tests with invalid RUN directives (PR #179668)   Mircea Trofin via llvm-commits
• [llvm] [NFC] `const`-ify argument in `promoteInternals` (PR #181079)   Mircea Trofin via llvm-commits
• [llvm] [NFC] `const`-ify argument in `promoteInternals` (PR #181079)   Mircea Trofin via llvm-commits
• [llvm] [NFC] `const`-ify argument in `promoteInternals` (PR #181079)   Mircea Trofin via llvm-commits
• [llvm] [NFC] `const`-ify argument in `promoteInternals` (readability) (PR #181079)   Mircea Trofin via llvm-commits
• [clang] [llvm] [AMDGPU] Add fp8/bf8 conversion instructions for gfx1170 (PR #180191)   Mirko Brkušanin via llvm-commits
• [clang] [llvm] [AMDGPU] Add dot4 fp8/bf8 instructions for gfx1170 (PR #180516)   Mirko Brkušanin via llvm-commits
• [clang] [llvm] [AMDGPU] Add dot4 fp8/bf8 instructions for gfx1170 (PR #180516)   Mirko Brkušanin via llvm-commits
• [clang] [llvm] [AMDGPU] Add WMMA and SWMMAC instructions for gfx1170 (PR #180731)   Mirko Brkušanin via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for G_FMIN*/MAX* (PR #179778)   Mirko Brkušanin via llvm-commits
• [llvm] [Green Dragon] add green dragon jenkinsfile definitions for multibranch pipelines (PR #180793)   Mishal Shah via llvm-commits
• [libc] [llvm] [libc][math] Refactor sinpif16 to header only. (PR #178503)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor sinpif16 to header only. (PR #178503)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor sinpif16 to header only. (PR #178503)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor sinpif16 to header only. (PR #178503)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf implementation to header-only in src/__support/math folder. (PR #178554)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf implementation to header-only in src/__support/math folder. (PR #178554)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf implementation to header-only in src/__support/math folder. (PR #178554)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf implementation to header-only in src/__support/math folder. (PR #178554)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf implementation to header-only in src/__support/math folder. (PR #178554)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf implementation to header-only in src/__support/math folder. (PR #178554)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf16 implementation to header-only in src/__support/math folder. (PR #178645)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf16 implementation to header-only in src/__support/math folder. (PR #178645)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf16 implementation to header-only in src/__support/math folder. (PR #178645)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf16 implementation to header-only in src/__support/math folder. (PR #178645)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf16 implementation to header-only in src/__support/math folder. (PR #178645)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf16 implementation to header-only in src/__support/math folder. (PR #178645)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf16 implementation to header-only in src/__support/math folder. (PR #178645)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf16 implementation to header-only in src/__support/math folder. (PR #178645)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf16 implementation to header-only in src/__support/math folder. (PR #178645)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf16 implementation to header-only in src/__support/math folder. (PR #178645)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor llogbl to be header-only and constexpr (PR #175376)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor llogbl to be header-only and constexpr (PR #175376)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor `f16sqrtf` to Header Only. (PR #180749)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor `f16sqrtf` to Header Only. (PR #180749)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf implementation to header-only in src/__support/math folder. (PR #178554)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf implementation to header-only in src/__support/math folder. (PR #178554)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf implementation to header-only in src/__support/math folder. (PR #178554)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor `f16sqrtf` to Header Only. (PR #180749)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] Refactor bf16addf128 to header only (PR #181058)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] Refactor bf16addf to header only (PR #181230)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] Refactor bf16addf to header only (PR #181230)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] Refactor bf16addf to header only (PR #181230)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] Refactor bf16addf to header only (PR #181230)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] Refactor bf16addf to header only (PR #181230)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] Refactor bf16addf to header only (PR #181230)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor sqrti to header-only (PR #177960)   Muhammad Bassiouni via llvm-commits
• [llvm] Revert "[MC/DC] Make covmap tolerant of nested Decisions (#125407)" (PR #181069)   NAKAMURA Takumi via llvm-commits
• [llvm] [AMDGPU] Add missing assert requirement to unit test (PR #181102)   NAKAMURA Takumi via llvm-commits
• [llvm] [LAA][LV]Allow recognition of strided pointers with constant stride (PR #171151)   Nashe Mncube via llvm-commits
• [llvm] [LAA][LV]Allow recognition of strided pointers with constant stride (PR #171151)   Nashe Mncube via llvm-commits
• [llvm] [LAA][LV]Allow recognition of strided pointers with constant stride (PR #171151)   Nashe Mncube via llvm-commits
• [llvm] [MachineScheduler] Add option to skip large regions with high pressure (PR #178422)   Nathan Corbyn via llvm-commits
• [llvm] [MachineScheduler] Split regions into chunks of a given maximum size (PR #180519)   Nathan Corbyn via llvm-commits
• [llvm] [MachineScheduler] Add an option to split regions into chunks of a given maximum size (PR #180519)   Nathan Corbyn via llvm-commits
• [llvm] [MachineScheduler] Add an option to split regions into chunks of a given maximum size (PR #180519)   Nathan Corbyn via llvm-commits
• [llvm] [Matrix] Use tiled loops automatically for large kernels. (PR #179325)   Nathan Corbyn via llvm-commits
• [llvm] [Matrix] Use tiled loops automatically for large kernels. (PR #179325)   Nathan Corbyn via llvm-commits
• [llvm] [MachineScheduler] Add an option to split regions into chunks of a given maximum size (PR #180519)   Nathan Corbyn via llvm-commits
• [llvm] [Matrix] Use tiled loops automatically for large kernels. (PR #179325)   Nathan Corbyn via llvm-commits
• [llvm] [SPIR-V] initial support for @llvm.structured.gep (PR #178668)   Nathan Gauër via llvm-commits
• [llvm] [SPIR-V] initial support for @llvm.structured.gep (PR #178668)   Nathan Gauër via llvm-commits
• [llvm] [SPIRV] Implement lowering for HLSL Texture2D sampling intrinsics (PR #179312)   Nathan Gauër via llvm-commits
• [llvm] [SPIR-V] initial support for @llvm.structured.gep (PR #178668)   Nathan Gauër via llvm-commits
• [clang] [llvm] Make OpenCL an OSType rather than an EnvironmentType. (PR #170297)   Nathan Gauër via llvm-commits
• [llvm] [SPIRV] Fix APInt overflow in memset constant array creation (PR #180189)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Fix APInt overflow in memset constant array creation (PR #180189)   Nick Sarnie via llvm-commits
• [llvm] Reapply [Offload][lit] Link against SPIR-V DeviceRTL if present (PR #180231)   Nick Sarnie via llvm-commits
• [llvm] Reapply [Offload][lit] Link against SPIR-V DeviceRTL if present (PR #180231)   Nick Sarnie via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Nick Sarnie via llvm-commits
• [llvm] Reapply [Offload][lit] Link against SPIR-V DeviceRTL if present (PR #180231)   Nick Sarnie via llvm-commits
• [llvm] Revert "Reapply [Offload][lit] Link against SPIR-V DeviceRTL if present" (PR #180743)   Nick Sarnie via llvm-commits
• [llvm] Revert "Reapply [Offload][lit] Link against SPIR-V DeviceRTL if present" (PR #180743)   Nick Sarnie via llvm-commits
• [llvm] [OFFLOAD] Add support to dump device images (PR #180545)   Nick Sarnie via llvm-commits
• [llvm] [OFFLOAD] Add support to dump device images (PR #180545)   Nick Sarnie via llvm-commits
• [llvm] [OFFLOAD] Add support to dump device images (PR #180545)   Nick Sarnie via llvm-commits
• [llvm] [OFFLOAD] Add support to dump device images (PR #180545)   Nick Sarnie via llvm-commits
• [llvm] [OFFLOAD] Add support to dump device images (PR #180545)   Nick Sarnie via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Nick Sarnie via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Nick Sarnie via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Nick Sarnie via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Nick Sarnie via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Nick Sarnie via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Nick Sarnie via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Nick Sarnie via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Nick Sarnie via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Nick Sarnie via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Nick Sarnie via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Nick Sarnie via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Nick Sarnie via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Nick Sarnie via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Nick Sarnie via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Nick Sarnie via llvm-commits
• [clang] [llvm] [Offload][SYCL] Refactoring: get rid of newline separators (PR #180274)   Nick Sarnie via llvm-commits
• [llvm] [OFFOLOAD][L0] Add support to dump embedded spirv files (PR #180715)   Nick Sarnie via llvm-commits
• [llvm] [OFFOLOAD][L0] Add support to dump embedded spirv files (PR #180715)   Nick Sarnie via llvm-commits
• [llvm] Update requirements_formatting.txt.in (PR #180963)   Nick Sarnie via llvm-commits
• [llvm] Update requirements_formatting.txt.in (PR #180963)   Nick Sarnie via llvm-commits
• [llvm] [Github] Update requirements_formatting.txt (PR #181184)   Nick Sarnie via llvm-commits
• [llvm] [Github] Update requirements_formatting.txt (PR #181184)   Nick Sarnie via llvm-commits
• [llvm] [Github] Update requirements_formatting.txt (PR #181184)   Nick Sarnie via llvm-commits
• [llvm] [Github] Update requirements_formatting.txt (PR #181184)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Extend lowering of variadic functions (PR #178980)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Extend lowering of variadic functions (PR #178980)   Nick Sarnie via llvm-commits
• [llvm] [libsycl] Fix for static vars deinit order (libsycl vs liboffload) (PR #181366)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Extend lowering of variadic functions (PR #178980)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Extend lowering of variadic functions (PR #178980)   Nick Sarnie via llvm-commits
• [llvm] [libsycl] Fix for static vars deinit order (libsycl vs liboffload) (PR #181366)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Extend lowering of variadic functions (PR #178980)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Extend lowering of variadic functions (PR #178980)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Extend lowering of variadic functions (PR #178980)   Nick Sarnie via llvm-commits
• [llvm] 22c6b70 - [gn] port a29f0dd09680 (llubi)   Nico Weber via llvm-commits
• [llvm] [DAGCombiner] Fix crash in reassociationCanBreakAddressingModePattern for multi-memop nodes (PR #180268)   Nicolai Hähnle via llvm-commits
• [llvm] Update requirements_formatting.txt.in (PR #180963)   Nikita Kornev via llvm-commits
• [llvm] Update requirements_formatting.txt.in (PR #180963)   Nikita Kornev via llvm-commits
• [llvm] [Github] Update requirements_formatting.txt (PR #181184)   Nikita Kornev via llvm-commits
• [llvm] [InstCombine] Relax one-use check for min/max(fpext x, fpext y) to fpext(min/max(x, y)) fold (PR #180164)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold min/max(fpext x, C) to fpext(min/max(x, fptrunc C)) (PR #179968)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold min/max(fpext x, C) to fpext(min/max(x, fptrunc C)) (PR #179968)   Nikita Popov via llvm-commits
• [llvm] 2ead49f - [PhaseOrdering] Regenerate test checks (NFC)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Drop nonnull assumes if the pointer is already known to be nonnull (PR #180434)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Drop nonnull assumes if the pointer is already known to be nonnull (PR #180434)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Drop nonnull assumes if the pointer is already known to be nonnull (PR #180434)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Drop nonnull assumes if the pointer is already known to be nonnull (PR #180434)   Nikita Popov via llvm-commits
• [llvm] [SPARC] Add TTI implementation for getPopcntSupport (PR #178843)   Nikita Popov via llvm-commits
• [llvm] [SPARC] Add TTI implementation for getPopcntSupport (PR #178843)   Nikita Popov via llvm-commits
• [llvm] [SPARC] Add TTI implementation for getPopcntSupport (PR #178843)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold min/max(fpext x, C) to fpext(min/max(x, fptrunc C)) (PR #179968)   Nikita Popov via llvm-commits
• [llvm] [SimplifyLibCalls] Directly convert fmin/fmax to intrinsics (PR #177988)   Nikita Popov via llvm-commits
• [llvm] [SimplifyLibCalls] Directly convert fmin/fmax to intrinsics (PR #177988)   Nikita Popov via llvm-commits
• [llvm] [SimplifyLibCalls] Directly convert fmin/fmax to intrinsics (PR #177988)   Nikita Popov via llvm-commits
• [llvm] [PowerPC] Require PPC32 for 32-bit addc/adde/subc/sube (PR #179186)   Nikita Popov via llvm-commits
• [llvm] [LLVM] Relax clobbering checks for calls to consider writes only (PR #179721)   Nikita Popov via llvm-commits
• [llvm] [SimplifyLibCalls] Directly convert fmin/fmax to intrinsics (PR #177988)   Nikita Popov via llvm-commits
• [clang] [llvm] Clang: Add nsz to llvm.minnum and llvm.maxnum emitted from fmin and fmax (PR #113133)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Drop nonnull assumes if the pointer is already known to be nonnull (PR #180434)   Nikita Popov via llvm-commits
• [llvm] [LAA] Use SCEVPtrToAddr in tryToCreateDiffChecks. (PR #178861)   Nikita Popov via llvm-commits
• [llvm] [LAA] Use SCEVPtrToAddr in tryToCreateDiffChecks. (PR #178861)   Nikita Popov via llvm-commits
• [llvm] [LAA] Use SCEVPtrToAddr in tryToCreateDiffChecks. (PR #178861)   Nikita Popov via llvm-commits
• [llvm] [LAA] Use SCEVPtrToAddr in tryToCreateDiffChecks. (PR #178861)   Nikita Popov via llvm-commits
• [clang] [llvm] [mlir] [LLVM] Improve IR parsing and printing for target memory locations (PR #176968)   Nikita Popov via llvm-commits
• [clang] [llvm] [mlir] [LLVM] Improve IR parsing and printing for target memory locations (PR #176968)   Nikita Popov via llvm-commits
• [llvm] [IR] Update docstring for stripAndAccumulateConstantOffset (PR #180365)   Nikita Popov via llvm-commits
• [llvm] [WIP][Support] Always scale InstructionCost::Value (PR #178962)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Always fold nonnull assumptions into operand bundles (PR #169923)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Always fold nonnull assumptions into operand bundles (PR #169923)   Nikita Popov via llvm-commits
• [llvm] 0bbf25f - [InstCombine] Regenerate test checks (NFC)   Nikita Popov via llvm-commits
• [llvm] [polly] [SCEV] Use SCEVPtrToAddr instead of SCEVPtrToInt in SCEV. (PR #180244)   Nikita Popov via llvm-commits
• [llvm] [polly] [SCEV] Use SCEVPtrToAddr instead of SCEVPtrToInt in SCEV. (PR #180244)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Support minimumnum/maximumnum (PR #180529)   Nikita Popov via llvm-commits
• [llvm] [OCaml] Remove global_context (PR #180533)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Support minimumnum/maximumnum (PR #180529)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Support minimumnum/maximumnum (PR #180529)   Nikita Popov via llvm-commits
• [llvm] [Hexagon] Update maintainers (PR #177935)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Support minimumnum/maximumnum (PR #180529)   Nikita Popov via llvm-commits
• [llvm] [SimplifyLibCalls] Directly canonicalize fminimum_num to intrinsic (PR #180555)   Nikita Popov via llvm-commits
• [llvm] [OCaml] Remove global_context (PR #180533)   Nikita Popov via llvm-commits
• [llvm] [SimplifyLibCalls] Directly canonicalize fminimum_num to intrinsic (PR #180555)   Nikita Popov via llvm-commits
• [clang] [llvm] Clang: Add nsz to llvm.minnum and llvm.maxnum emitted from fmin and fmax (PR #113133)   Nikita Popov via llvm-commits
• [llvm] [SimplifyLibCalls] Directly canonicalize fminimum_num to intrinsic (PR #180555)   Nikita Popov via llvm-commits
• [clang] [llvm] [mlir] [LLVM] Improve IR parsing and printing for target memory locations (PR #176968)   Nikita Popov via llvm-commits
• [llvm] Add remaining patterns for floating-point flag matches (PR #173912)   Nikita Popov via llvm-commits
• [llvm] Reapply "[MemCpyOpt] support offset slices for performStackMoveOptzn and processMemCpy", with bug fixed (PR #180002)   Nikita Popov via llvm-commits
• [llvm] Reapply "[MemCpyOpt] support offset slices for performStackMoveOptzn and processMemCpy", with bug fixed (PR #180002)   Nikita Popov via llvm-commits
• [llvm] Reapply "[MemCpyOpt] support offset slices for performStackMoveOptzn and processMemCpy", with bug fixed (PR #180002)   Nikita Popov via llvm-commits
• [llvm] Reapply "[MemCpyOpt] support offset slices for performStackMoveOptzn and processMemCpy", with bug fixed (PR #180002)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Don't create SCEVPtrToAddr for unstable pointer representations. (PR #180718)   Nikita Popov via llvm-commits
• [llvm] [SelectionDAG] Make sure demanded lanes for AND-by-zero are frozen (PR #180727)   Nikita Popov via llvm-commits
• [clang] [llvm] InstCombine: Use SimplifyDemandedFPClass on fmul (PR #177490)   Nikita Popov via llvm-commits
• [llvm] [LangRef] Specify semantics for non-byte-sized loads and stores (PR #180739)   Nikita Popov via llvm-commits
• [llvm] [LangRef] Specify semantics for non-byte-sized loads and stores (PR #180739)   Nikita Popov via llvm-commits
• [llvm] Reapply "[MemCpyOpt] support offset slices for performStackMoveOptzn and processMemCpy", with bug fixed (PR #180002)   Nikita Popov via llvm-commits
• [llvm] Reapply "[MemCpyOpt] support offset slices for performStackMoveOptzn and processMemCpy", with bug fixed (PR #180002)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Canonicalize GEP source element types (PR #180745)   Nikita Popov via llvm-commits
• [clang] [flang] [llvm] [InstCombine] Canonicalize GEP source element types (PR #180745)   Nikita Popov via llvm-commits
• [llvm] 067f1c9 - [LoopVectorizer] Generate test checks (NFC)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Only ignore first zero index during GEP canonicalization (PR #180764)   Nikita Popov via llvm-commits
• [llvm] [NFC] Initialize AtomicLoadExtActions array (PR #180752)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold shift of boolean zext to logic sequence (PR #180596)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold shift of boolean zext to logic sequence (PR #180596)   Nikita Popov via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Nikita Popov via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Nikita Popov via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Nikita Popov via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Nikita Popov via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Nikita Popov via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Nikita Popov via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Nikita Popov via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Nikita Popov via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Nikita Popov via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Nikita Popov via llvm-commits
• [llvm] [AsmParserContext] Fix regression after #174566 (PR #180068)   Nikita Popov via llvm-commits
• [llvm] [ConstraintElim] Use ConstantRange information for ConstraintElimination (PR #180862)   Nikita Popov via llvm-commits
• [clang] [lld] [llvm] [LTO][LLD] Prevent invalid LTO libfunc transforms (PR #164916)   Nikita Popov via llvm-commits
• [llvm] [PowerPC] Require PPC32 for 32-bit addc/adde/subc/sube (PR #179186)   Nikita Popov via llvm-commits
• [llvm] [ExpandIRInsts] Support saturating fptoi (PR #179710)   Nikita Popov via llvm-commits
• [llvm] [LangRef] Mention allocation elision (PR #177592)   Nikita Popov via llvm-commits
• [llvm] [LangRef] Mention allocation elision (PR #177592)   Nikita Popov via llvm-commits
• [llvm] [LangRef] Mention allocation elision (PR #177592)   Nikita Popov via llvm-commits
• [llvm] [IndVarSimplify] Add safety check for getTruncateExpr in genLoopLimit (PR #172234)   Nikita Popov via llvm-commits
• [llvm] [IndVarSimplify] Add safety check for getTruncateExpr in genLoopLimit (PR #172234)   Nikita Popov via llvm-commits
• [llvm] [IndVarSimplify] Add safety check for getTruncateExpr in genLoopLimit (PR #172234)   Nikita Popov via llvm-commits
• [llvm] [IndVarSimplify] Add safety check for getTruncateExpr in genLoopLimit (PR #172234)   Nikita Popov via llvm-commits
• [llvm] [WIP][SPARC] Add TTI implementation for getting register numbers and widths (PR #180660)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold ((X + AddC) & Mask) ^ Mask to ((Mask - AddC) - X) & Mask (PR #174278)   Nikita Popov via llvm-commits
• [llvm] [LangRef] Clarify nsz semantics (PR #180906)   Nikita Popov via llvm-commits
• [llvm] [IndVarSimplify] Add safety check for getTruncateExpr in genLoopLimit (PR #172234)   Nikita Popov via llvm-commits
• [llvm] [IndVarSimplify] Add safety check for getTruncateExpr in genLoopLimit (PR #172234)   Nikita Popov via llvm-commits
• [llvm] [AggressiveInstCombine] Match the pattern and generate ctlz function call (PR #177110)   Nikita Popov via llvm-commits
• [llvm] [LangRef] Mention allocation elision (PR #177592)   Nikita Popov via llvm-commits
• [llvm] [LangRef] Mention allocation elision (PR #177592)   Nikita Popov via llvm-commits
• [llvm] [ExpandIRInsts] Support saturating fptoi (PR #179710)   Nikita Popov via llvm-commits
• [llvm] [AggressiveInstCombine] Match the pattern and generate ctlz function call (PR #177110)   Nikita Popov via llvm-commits
• [llvm] [AggressiveInstCombine] Match the pattern and generate ctlz function call (PR #177110)   Nikita Popov via llvm-commits
• [llvm] [LangRef] Clarify nsz semantics (PR #180906)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold ((X + AddC) & Mask) ^ Mask to ((-1 - AddC) - X) & Mask (PR #174278)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold ((X + AddC) & Mask) ^ Mask to ((-1 - AddC) - X) & Mask (PR #174278)   Nikita Popov via llvm-commits
• [llvm] [polly] [SCEV] Use SCEVPtrToAddr instead of SCEVPtrToInt in SCEV. (PR #180244)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold ((X + AddC) & Mask) ^ Mask to (~AddC - X) & Mask (PR #174278)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Avoid invalid bitcast across address spaces in foldIntegerTypedPHI (PR #181064)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold ((X + AddC) & Mask) ^ Mask to (~AddC - X) & Mask (PR #174278)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold ((X + AddC) & Mask) ^ Mask to (~AddC - X) & Mask (PR #174278)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold ((X + AddC) & Mask) ^ Mask to (~AddC - X) & Mask (PR #174278)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold ((X + AddC) & Mask) ^ Mask to (~AddC - X) & Mask (PR #174278)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold ((X + AddC) & Mask) ^ Mask to (~AddC - X) & Mask (PR #174278)   Nikita Popov via llvm-commits
• [llvm] [LangRef] Clarify nsz semantics (PR #180906)   Nikita Popov via llvm-commits
• [llvm] [LangRef] Clarify nsz semantics (PR #180906)   Nikita Popov via llvm-commits
• [llvm] [LangRef] Clarify nsz semantics (PR #180906)   Nikita Popov via llvm-commits
• [llvm] workflows: Use main-branch-only environment when using ISSUE_SUBSCRIBER_TOKEN (PR #179990)   Nikita Popov via llvm-commits
• [llvm] [LLVM] Refine MemoryEffect handling for target-specific intrinsics (PR #155590)   Nikita Popov via llvm-commits
• [llvm] [LLVM] Refine MemoryEffect handling for target-specific intrinsics (PR #155590)   Nikita Popov via llvm-commits
• [llvm] [LLVM] Refine MemoryEffect handling for target-specific intrinsics (PR #155590)   Nikita Popov via llvm-commits
• [llvm] [ValueTracking] Extend computeConstantRange for add/sub, sext/zext/trunc (PR #181110)   Nikita Popov via llvm-commits
• [llvm] [SelectionDAG] Make sure demanded lanes for AND/MUL-by-zero are frozen (PR #180727)   Nikita Popov via llvm-commits
• [llvm] [AggressiveInstCombine] Create zext during store merge (PR #181125)   Nikita Popov via llvm-commits
• [llvm] [Hexagon] Update maintainers (PR #177935)   Nikita Popov via llvm-commits
• [llvm] [Hexagon] Update maintainers (PR #177935)   Nikita Popov via llvm-commits
• [llvm] [LangRef] Specify semantics for non-byte-sized loads and stores (PR #180739)   Nikita Popov via llvm-commits
• [llvm] [SelectionDAG] Make sure demanded lanes for AND/MUL-by-zero are frozen (PR #180727)   Nikita Popov via llvm-commits
• [llvm] [SelectionDAG] Make sure demanded lanes for AND/MUL-by-zero are frozen (PR #180727)   Nikita Popov via llvm-commits
• [llvm] [SelectionDAG] Make sure demanded lanes for AND/MUL-by-zero are frozen (PR #180727)   Nikita Popov via llvm-commits
• [llvm] [AggressiveInstCombine] Create zext during store merge (PR #181125)   Nikita Popov via llvm-commits
• [llvm] 74bd92d - Revert "[IndVarSimplify] Add safety check for getTruncateExpr in genLoopLimit (#172234)"   Nikita Popov via llvm-commits
• [llvm] [IndVarSimplify] Add safety check for getTruncateExpr in genLoopLimit (PR #172234)   Nikita Popov via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Nikita Popov via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Nikita Popov via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Nikita Popov via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Nikita Popov via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Nikita Popov via llvm-commits
• [llvm] [SelectionDAG] Make sure demanded lanes for AND/MUL-by-zero are frozen (PR #180727)   Nikita Popov via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Nikita Popov via llvm-commits
• [llvm] [CodeGen] Expand power-of-2 div/rem at IR level in ExpandIRInsts. (PR #180654)   Nikita Popov via llvm-commits
• [clang] [flang] [llvm] [InstCombine] Canonicalize GEP source element types (PR #180745)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Discard samesign when analyzing loop invariant exits (PR #181171)   Nikita Popov via llvm-commits
• [clang] [llvm] [LoopUnroll] Add flag to enforce loop unroll pragma regardless of expensive trip count (PR #180961)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold shift of boolean zext to logic sequence (PR #180596)   Nikita Popov via llvm-commits
• [llvm] [AsmParserContext] Fix regression after #174566 (PR #180068)   Nikita Popov via llvm-commits
• [llvm] [AsmParserContext] Fix regression after #174566 (PR #180068)   Nikita Popov via llvm-commits
• [llvm] [Codegen] Add missing pointer flag propagation to GetReturnInfo (PR #181031)   Nikita Popov via llvm-commits
• [llvm] [llubi] Add support for integer arithmetic ops (PR #181224)   Nikita Popov via llvm-commits
• [llvm] [llubi] Add support for integer arithmetic ops (PR #181224)   Nikita Popov via llvm-commits
• [llvm] [llubi] Add support for integer arithmetic ops (PR #181224)   Nikita Popov via llvm-commits
• [llvm] [Hexagon] Fix APInt assertion in getBuildVectorConstInts (PR #181202)   Nikita Popov via llvm-commits
• [llvm] [Hexagon] Fix APInt assertion in getBuildVectorConstInts (PR #181202)   Nikita Popov via llvm-commits
• [llvm] [Hexagon] Fix APInt assertion in getBuildVectorConstInts (PR #181202)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold ((X + AddC) & Mask) ^ Mask to (~AddC - X) & Mask (PR #174278)   Nikita Popov via llvm-commits
• [llvm] [polly] [SCEV] Use SCEVPtrToAddr instead of SCEVPtrToInt in SCEV. (PR #180244)   Nikita Popov via llvm-commits
• [clang] [flang] [llvm] [InstCombine] Canonicalize GEP source element types (PR #180745)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold ((X + AddC) & Mask) ^ Mask to (~AddC - X) & Mask (PR #174278)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold ((X + AddC) & Mask) ^ Mask to (~AddC - X) & Mask (PR #174278)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Discard samesign when analyzing loop invariant exits (PR #181171)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Discard samesign when analyzing loop invariant exits (PR #181171)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Discard samesign when analyzing loop invariant exits (PR #181171)   Nikita Popov via llvm-commits
• [llvm] [ValueTracking] Conservative nosync check prevents vectorization (PR #181345)   Nikita Popov via llvm-commits
• [llvm] [ValueTracking] Conservative nosync check prevents vectorization (PR #181345)   Nikita Popov via llvm-commits
• [clang] [flang] [llvm] [InstCombine] Canonicalize GEP source element types (PR #180745)   Nikita Popov via llvm-commits
• [clang] [flang] [llvm] [InstCombine] Canonicalize GEP source element types (PR #180745)   Nikita Popov via llvm-commits
• [llvm] 7f932c2 - [OffloadWrapper] Avoid unnecessary zero-index GEPs   Nikita Popov via llvm-commits
• [llvm] 0d8d421 - [bugpoint] Remove unnecessary zero-index GEP   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold shift of boolean zext to logic sequence (PR #180596)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold shift of boolean zext to logic sequence (PR #180596)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold shift of boolean zext to logic sequence (PR #180596)   Nikita Popov via llvm-commits
• [llvm] 778948f - [BrainF] Remove unnecessary zero-index GEP   Nikita Popov via llvm-commits
• [llvm] a93e04c - [AddressSanitizer] Remove unnecessary zero-index GEP   Nikita Popov via llvm-commits
• [llvm] a17ffaf - [AMDGPU] Avoid unnecessary zero-index GEPs   Nikita Popov via llvm-commits
• [clang] [llvm] [IR] Add ConstantExpr::getPtrAdd() (PR #181365)   Nikita Popov via llvm-commits
• [llvm] 855be5f - [ShadowStackGCLowering] Remove unnecessary zero-index GEP   Nikita Popov via llvm-commits
• [llvm] [llubi] Add basic support for icmp, terminators and function calls (PR #181393)   Nikita Popov via llvm-commits
• [llvm] [PredicateInfo] Fix crash on nonnull assume taking a constant (PR #180440)   Nikolas Klauser via llvm-commits
• [llvm] [InstCombine] Drop nonnull assumes if the pointer is already known to be nonnull (PR #180434)   Nikolas Klauser via llvm-commits
• [llvm] [InstCombine] Drop nonnull assumes if the pointer is already known to be nonnull (PR #180434)   Nikolas Klauser via llvm-commits
• [llvm] [InstCombine] Drop nonnull assumes if the pointer is already known to be nonnull (PR #180434)   Nikolas Klauser via llvm-commits
• [llvm] [InstCombine] Drop nonnull assumes if the pointer is already known to be nonnull (PR #180434)   Nikolas Klauser via llvm-commits
• [llvm] [InstCombine] Always fold nonnull assumptions into operand bundles (PR #169923)   Nikolas Klauser via llvm-commits
• [llvm] [InstCombine] Always fold nonnull assumptions into operand bundles (PR #169923)   Nikolas Klauser via llvm-commits
• [libcxx] [llvm] [XRay] Add bounds check before memcpy in readBinaryFormatHeader (PR #178499)   Nikolas Klauser via llvm-commits
• [llvm] [NFC] Modify the comment of LoopRotate param (PR #180675)   Ningning Shi 史宁宁 via llvm-commits
• [llvm] [llvm-ir2vec] Refactoring the ir2vec python bindings testing (PR #180664)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] Adding BB Embeddings Map API to ir2vec python bindings (PR #180135)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] Adding Inst Embeddings Map API to ir2vec python bindings (PR #180140)   Nishant Sachdeva via llvm-commits
• [llvm] Adding getFuncNames API to ir2vec python bindings (PR #180473)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] Refactoring the ir2vec python bindings testing (PR #180664)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] Adding Inst Embeddings Map API to ir2vec python bindings (PR #180140)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] Adding Inst Embeddings Map API to ir2vec python bindings (PR #180140)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] Adding Inst Embeddings Map API to ir2vec python bindings (PR #180140)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] Adding Inst Embeddings Map API to ir2vec python bindings (PR #180140)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] Adding Inst Embeddings Map API to ir2vec python bindings (PR #180140)   Nishant Sachdeva via llvm-commits
• [llvm] [LangRef] Mention allocation elision (PR #177592)   Nuno Lopes via llvm-commits
• [llvm] [LangRef] Specify semantics for non-byte-sized loads and stores (PR #180739)   Nuno Lopes via llvm-commits
• [llvm] [LangRef] Clarify nsz semantics (PR #180906)   Nuno Lopes via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [lld] [llvm] [NFC] Fix tests with invalid RUN directives (PR #179668)   Orlando Cazalet-Hyams via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [lld] [llvm] [NFC] Fix tests with invalid RUN directives (PR #179668)   Orlando Cazalet-Hyams via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [lld] [llvm] [NFC] Fix tests with invalid RUN directives (PR #179668)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [GlobalISel] Add integer combines from SelectionDAG (PR #181126)   Osman Yasar via llvm-commits
• [llvm] [GlobalISel] Add integer combines from SelectionDAG (PR #181126)   Osman Yasar via llvm-commits
• [llvm] [GlobalISel] Add sub_same_val rewrites from SelectionDAG (PR #181134)   Osman Yasar via llvm-commits
• [llvm] [GlobalISel] Add integer combines from SelectionDAG (PR #181126)   Osman Yasar via llvm-commits
• [llvm] [GlobalISel] Add sub_same_val rewrites from SelectionDAG (PR #181134)   Osman Yasar via llvm-commits
• [llvm] [GlobalISel] Add sub_same_val rewrites from SelectionDAG (PR #181134)   Osman Yasar via llvm-commits
• [llvm] [GlobalISel] Add sub_same_val rewrites from SelectionDAG (PR #181134)   Osman Yasar via llvm-commits
• [llvm] [GlobalISel] Add sub_same_val rewrites from SelectionDAG (PR #181134)   Osman Yasar via llvm-commits
• [llvm] [GlobalISel] Add sub_same_val rewrites from SelectionDAG (PR #181134)   Osman Yasar via llvm-commits
• [llvm] [GlobalISel] Add sub_same_val rewrites from SelectionDAG (PR #181134)   Osman Yasar via llvm-commits
• [llvm] [DemandedBits] Support non-constant shift amounts for funnel shifts (PR #180569)   Panagiotis Karouzakis via llvm-commits
• [llvm] [DemandedBits] Support non-constant shift amounts for funnel shifts (PR #180569)   Panagiotis Karouzakis via llvm-commits
• [llvm] [DemandedBits] Support non-constant shift amounts for funnel shifts (PR #180569)   Panagiotis Karouzakis via llvm-commits
• [llvm] [DemandedBits] Support non-constant shift amounts for funnel shifts (PR #180569)   Panagiotis Karouzakis via llvm-commits
• [llvm] [DemandedBits] Support non-constant shift amounts for funnel shifts (PR #180569)   Panagiotis Karouzakis via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries at IR level (PR #180509)   Pankaj Dwivedi via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries at IR level (PR #180509)   Pankaj Dwivedi via llvm-commits
• [llvm] [AMDGPU] Allow hoisting of V_READFIRSTLANE_B32 for uniform operand (PR #178312)   Pankaj Dwivedi via llvm-commits
• [llvm] [Uniformity] Implement per-output machine uniformity analysis (PR #179275)   Pankaj Dwivedi via llvm-commits
• [llvm] [Uniformity] Implement per-output machine uniformity analysis (PR #179275)   Pankaj Dwivedi via llvm-commits
• [llvm] [Uniformity] Implement per-output machine uniformity analysis (PR #179275)   Pankaj Dwivedi via llvm-commits
• [llvm] [Uniformity] Implement per-output machine uniformity analysis (PR #179275)   Pankaj Dwivedi via llvm-commits
• [llvm] [Uniformity] Implement per-output machine uniformity analysis (PR #179275)   Pankaj Dwivedi via llvm-commits
• [llvm] [bolt] Simplify rodata/literal load for X86_64 & AArch64 (PR #179474)   Paschalis Mpeis via llvm-commits
• [llvm] [bolt] Simplify rodata/literal load for X86_64 & AArch64 (PR #179474)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][Perf2bolt] Add support to generate pre-parsed perf data (PR #171144)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][Perf2bolt] Add support to generate pre-parsed perf data (PR #171144)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][Perf2bolt] Add support to generate pre-parsed perf data (PR #171144)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][Perf2bolt] Add support to generate pre-parsed perf data (PR #171144)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][Perf2bolt] Add support to generate pre-parsed perf data (PR #171144)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][Perf2bolt] Add support to generate pre-parsed perf data (PR #171144)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][Perf2bolt] Add support to generate pre-parsed perf data (PR #171144)   Paschalis Mpeis via llvm-commits
• [llvm] [CodeGen] Teach ReplaceWithVeclib to use correct calling convention (PR #180773)   Paschalis Mpeis via llvm-commits
• [llvm] [CodeGen] Teach ReplaceWithVeclib to use correct calling convention (PR #180773)   Paschalis Mpeis via llvm-commits
• [llvm] [CodeGen] Teach ReplaceWithVeclib to use correct calling convention (PR #180773)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT] Add --clone-at-origin option (PR #181003)   Paschalis Mpeis via llvm-commits
• [compiler-rt] [compiler-rt][common] Only unmap stacks the runtime has actually mapped (PR #179000)   Paul Kirth via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Paul Kirth via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Paul Kirth via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Paul Kirth via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Paul Kirth via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Paul Kirth via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Paul Kirth via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Paul Kirth via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Paul Kirth via llvm-commits
• [llvm] [SimplifyCFG][PGO] Add missing overflow check to ConstantFoldTerminator (PR #178964)   Paul Kirth via llvm-commits
• [llvm] [SimplifyCFG][PGO] Add missing overflow check to ConstantFoldTerminator (PR #178964)   Paul Kirth via llvm-commits
• [llvm] [SimplifyCFG][PGO] Add missing overflow check to ConstantFoldTerminator (PR #178964)   Paul Kirth via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Paul Kirth via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Paul Kirth via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Paul Kirth via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Paul Kirth via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Paul Kirth via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Paul Kirth via llvm-commits
• [llvm] [AArch64][ISel] Add clmul to pmullb/t lowering (PR #180568)   Paul Walker via llvm-commits
• [llvm] [AArch64][ISel] Add clmul to pmullb/t lowering (PR #180568)   Paul Walker via llvm-commits
• [llvm] [AArch64][ISel] Add clmul to pmullb/t lowering (PR #180568)   Paul Walker via llvm-commits
• [llvm] [AArch64][ISel] Add clmul to pmullb/t lowering (PR #180568)   Paul Walker via llvm-commits
• [llvm] [AArch64][ISel] Add clmul to pmullb/t lowering (PR #180568)   Paul Walker via llvm-commits
• [llvm] [AArch64][ISel] Add clmul to pmullb/t lowering (PR #180568)   Paul Walker via llvm-commits
• [llvm] [AArch64] Avoid selecting XAR for reverse operations. (PR #178706)   Paul Walker via llvm-commits
• [llvm] [IR] Add llvm.masked.load.first.fault intrinsic (PR #156470)   Paul Walker via llvm-commits
• [llvm] [AArch64][ISel] Add clmul to pmullb/t lowering (PR #180568)   Paul Walker via llvm-commits
• [llvm] [AArch64][ISel] Add clmul to pmullb/t lowering (PR #180568)   Paul Walker via llvm-commits
• [llvm] [AArch64][ISel] Add clmul to pmullb/t lowering (PR #180568)   Paul Walker via llvm-commits
• [llvm] [AArch64][ISel] Add clmul to pmullb/t lowering (PR #180568)   Paul Walker via llvm-commits
• [llvm] [AArch64][ISel] Add clmul to pmullb/t lowering (PR #180568)   Paul Walker via llvm-commits
• [llvm] [AArch64][ISel] Add clmul to pmullb/t lowering (PR #180568)   Paul Walker via llvm-commits
• [llvm] [AArch64][ISel] Add clmul to pmullb/t lowering (PR #180568)   Paul Walker via llvm-commits
• [llvm] [AArch64][ISel] Add clmul to pmullb/t lowering (PR #180568)   Paul Walker via llvm-commits
• [llvm] [AArch64][ISel] Add clmul to pmullb/t lowering (PR #180568)   Paul Walker via llvm-commits
• [llvm] [LLVM][CodeGen] Add suppport for vector ConstantInt/FP to scalarConstantToHexString. (PR #180978)   Paul Walker via llvm-commits
• [llvm] [LLVM][CodeGen] Add suppport for vector ConstantInt/FP to scalarConstantToHexString. (PR #180978)   Paul Walker via llvm-commits
• [llvm] [AArch64] Prefer SVE for fixed-length [S|U][MIN|MAX] reductions (PR #181161)   Paul Walker via llvm-commits
• [llvm] [AArch64] Prefer SVE for fixed-length [S|U][MIN|MAX] reductions (PR #181161)   Paul Walker via llvm-commits
• [clang] [llvm] [HIPSPV] Add chipStar SPIR-V support for the new offload driver (PR #180903)   Paulius Velesko via llvm-commits
• [clang] [llvm] [HIPSPV] Add chipStar SPIR-V support for the new offload driver (PR #180903)   Paulius Velesko via llvm-commits
• [clang] [llvm] [HIPSPV] Add chipStar SPIR-V support for the new offload driver (PR #180903)   Paulius Velesko via llvm-commits
• [clang] [llvm] [HIPSPV] Add chipStar SPIR-V support for the new offload driver (PR #180903)   Paulius Velesko via llvm-commits
• [clang] [llvm] [OpenASIP] Update the TCE target defs for OpenASIP 2.2 (PR #176698)   Pekka Jääskeläinen via llvm-commits
• [clang] [llvm] [OpenASIP] Update the TCE target defs for OpenASIP 2.2 (PR #176698)   Pekka Jääskeläinen via llvm-commits
• [clang] [llvm] [OpenASIP] Update the TCE target defs for OpenASIP 2.2 (PR #176698)   Pekka Jääskeläinen via llvm-commits
• [clang] [llvm] [OpenASIP] Update the TCE target defs for OpenASIP 2.2 (PR #176698)   Pekka Jääskeläinen via llvm-commits
• [clang] [llvm] [OpenASIP] Update the TCE target defs for OpenASIP 2.2 (PR #176698)   Pekka Jääskeläinen via llvm-commits
• [clang] [llvm] [OpenASIP] Update the TCE target defs for OpenASIP 2.2 (PR #176698)   Pekka Jääskeläinen via llvm-commits
• [clang] [llvm] [RISCV][CodeGen] Lower `abds`/`abdu` to `Zvabd` instructions (PR #180141)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [RISCV][CodeGen] Lower `abds`/`abdu` to `Zvabd` instructions (PR #180141)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Lower (abd[s|u] a, b) to (abs (sub a, b)) for i32/i64 element when `Zvabd` exists. (PR #180494)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Lower (abd[s|u] a, b) to (abs (sub a, b)) for i32/i64 element when `Zvabd` exists (PR #180494)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Enable select optimization by default (PR #178394)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Rename FeatureEnableSelectOptimize to TuneEnableSelectOptimize (PR #180496)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Enable select optimization by default (PR #178394)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Remove redundant czero in multi-word comparisons (PR #180485)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Remove redundant czero in multi-word comparisons (PR #180485)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Remove redundant czero in multi-word comparisons (PR #180485)   Pengcheng Wang via llvm-commits
• [llvm] [DataLayout] Add a specifier for element-aligned vectors (PR #180617)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Stash GPR to FPR if emergency spill slot is not reachable (PR #180685)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Stash GPR to FPR if emergency spill slot is not reachable (PR #180685)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Lower (abd[s|u] a, b) to (abs (sub a, b)) for i32/i64 element when `Zvabd` exists (PR #180494)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Enable select optimization by default (PR #178394)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Enable select optimization by default (PR #178394)   Pengcheng Wang via llvm-commits
• [llvm] [NFC] Modify the comment of LoopRotate param (PR #180675)   Pengcheng Wang via llvm-commits
• [llvm] [NFC] Modify the comment of LoopRotate param (PR #180675)   Pengcheng Wang via llvm-commits
• [llvm] [NFC] Modify the comment of LoopRotate param (PR #180675)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Relax reversed mask's mask requirement in reverse to strided load/store combine (PR #180706)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Remove vp.reverse mask check in performVP_REVERSECombine (PR #180724)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [RISCV] Add precommit test for vwabda(u) combine (PR #180161)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [RISCV] Add precommit test for vwabda(u) combine (PR #180161)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [RISCV][CodeGen] Combine vwaddu+vabd(u) to vwabda(u) (PR #180162)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [RISCV][CodeGen] Combine vwaddu+vabd(u) to vwabda(u) (PR #180162)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [Clang][RISCV] Add Zvabd intrinsics (PR #180929)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [Clang][RISCV] Add Zvabd intrinsics (PR #180929)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [Clang][RISCV] Add Zvabd intrinsics (PR #180929)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [Clang][RISCV] Add Zvabd intrinsics (PR #180929)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [Clang][RISCV] Add Zvabd intrinsics (PR #180929)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [Clang][RISCV] Add Zvabd intrinsics (PR #180929)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Adopt SpacemitX60's scheduling model for `-mtune=generic` (PR #167008)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [Clang][RISCV] Add Zvabd intrinsics (PR #180929)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [Clang][RISCV] Add Zvabd intrinsics (PR #180929)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [Clang][RISCV] Add Zvabd intrinsics (PR #180929)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [Clang][RISCV] Add Zvabd intrinsics (PR #180929)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [RISCV] Add SpacemiT A100 processor definition (PR #174052)   Pengcheng Wang via llvm-commits
• [llvm] [AMDGPU] Add legalization rules for G_ATOMICRMW_FADD (PR #175257)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU] Add legalization rules for G_ATOMICRMW_FADD (PR #175257)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU] Add legalization rules for G_ATOMICRMW_FADD (PR #175257)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU] Add known bits for G_AMDGPU_COPY_SCC_VCC (PR #180560)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU] Add legalization rules for atomicrmw max/min ops (PR #180502)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Update G_TRUNC tests (PR #180647)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Update G_TRUNC tests (PR #180647)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Update G_TRUNC tests (PR #180647)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Update G_TRUNC tests (PR #180647)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Update G_TRUNC tests (PR #180647)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for buffer atomic cmpswap (PR #180666)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU][GISel] Add RegBankLegalize support for G_SI_CALL (PR #165747)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU][GISel] Add RegBankLegalize support for G_SI_CALL (PR #165747)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for G_PHI (PR #179735)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for INTRIN_IMAGE (PR #179810)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU] [GlobalIsel] Enabling lit tests for new regbank select (PR #180680)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU][GISel] Add RegBankLegalize support for G_SI_CALL (PR #165747)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU][GISel] Add RegBankLegalize support for G_SI_CALL (PR #165747)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU][GISel] Add RegBankLegalize support for G_SI_CALL (PR #165747)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize for global atomic ordered add (PR #180829)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Add register bank legalization rules for buffer atomic int min max (PR #180975)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU][GISel] Change the definition of `G_SI_CALL` to return a generic scalar value (PR #181007)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for G_FMIN*/MAX* (PR #179778)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for buffer load lds intrinsics (PR #180998)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU][GISel] Add RegBankLegalize support for G_SI_CALL (PR #165747)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU][GISel] Add RegBankLegalize support for G_SI_CALL (PR #165747)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for G_EXTRACT (PR #181036)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for G_EXTRACT (PR #181036)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU: Add more tests for v_dot2_f32_f16/bf16 (PR #179223)   Petar Avramovic via llvm-commits
• [llvm] 448e494 - gn build: Add missing deps to c-index-test and diagtool.   Peter Collingbourne via llvm-commits
• [flang] [llvm] [flang] Implement 'F_C_STRING' library function (Fortran 2023) (PR #174474)   Peter Klausler via llvm-commits
• [flang] [llvm] [flang][runtime] Improve handling of short DATE_AND_TIME(VALUES=) (PR #180557)   Peter Klausler via llvm-commits
• [flang] [llvm] [flang][runtime] OPEN(STATUS='NEW') should fail on extant file (PR #180605)   Peter Klausler via llvm-commits
• [flang] [llvm] [flang][runtime] Improve handling of short DATE_AND_TIME(VALUES=) (PR #180557)   Peter Klausler via llvm-commits
• [flang] [llvm] [flang][runtime] OPEN(STATUS='NEW') should fail on extant file (PR #180605)   Peter Klausler via llvm-commits
• [flang] [llvm] [flang][runtime] Improve handling of short DATE_AND_TIME(VALUES=) (PR #180557)   Peter Klausler via llvm-commits
• [flang] [llvm] [flang][runtime] OPEN(STATUS='NEW') should fail on extant file (PR #180605)   Peter Klausler via llvm-commits
• [llvm] [DebugInfo] Fix an assertion in DWARFTypePrinter (PR #178986)   Peter Rong via llvm-commits
• [llvm] [DebugInfo] Fix an assertion in DWARFTypePrinter (PR #178986)   Peter Rong via llvm-commits
• [llvm] [DebugInfo] Fix an assertion in DWARFTypePrinter (PR #178986)   Peter Rong via llvm-commits
• [lld] [lld][ELF] Add range extension thunks for x86-64 (PR #180266)   Peter Smith via llvm-commits
• [lld] [lld][ELF] Add range extension thunks for x86-64 (PR #180266)   Peter Smith via llvm-commits
• [lld] [lld][ELF] Add range extension thunks for x86-64 (PR #180266)   Peter Smith via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for x86 (PR #178846)   Peter Smith via llvm-commits
• [lld] [lld][ELF] Add range extension thunks for x86-64 (PR #180266)   Peter Smith via llvm-commits
• [lld] [lld] Fix undefined behavior with misaligned SHT_GROUP section. (PR #180848)   Peter Smith via llvm-commits
• [lld] [lld][ELF] Add range extension thunks for x86-64 (PR #180266)   Peter Smith via llvm-commits
• [lld] [lld][ELF] Add range extension thunks for x86-64 (PR #180266)   Peter Smith via llvm-commits
• [lld] [lld][ELF] Add range extension thunks for x86-64 (PR #180266)   Peter Smith via llvm-commits
• [lld] [lld][ELF] Add range extension thunks for x86-64 (PR #180266)   Peter Smith via llvm-commits
• [lld] [lld][ELF] Add range extension thunks for x86-64 (PR #180266)   Peter Smith via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for AArch64 (PR #181099)   Peter Smith via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for AArch64 (PR #181099)   Peter Smith via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for AArch64 (PR #181099)   Peter Smith via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for AArch64 (PR #181099)   Peter Smith via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for AArch64 (PR #181099)   Peter Smith via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for AArch64 (PR #181099)   Peter Smith via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for AArch64 (PR #181099)   Peter Smith via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for AArch64 (PR #181099)   Peter Smith via llvm-commits
• [llvm] [MC][ARM] Don't set funcs to Thumb as a side effect of .hidden (PR #181156)   Peter Smith via llvm-commits
• [lld] [LLD][COFF] Fix out-of-bounds write when filling gaps with INT3 in code sections (PR #180411)   Petr Beneš via llvm-commits
• [lld] [LLD][COFF] Fix out-of-bounds write when filling gaps with INT3 in code sections (PR #180411)   Petr Beneš via llvm-commits
• [compiler-rt] [libc] [libcxx] [libcxxabi] [libunwind] [llvm] [openmp] [Runtimes] Introduce variables containing resource dir paths (PR #177953)   Petr Hosek via llvm-commits
• [compiler-rt] [libc] [libcxx] [libcxxabi] [libunwind] [llvm] [openmp] [Runtimes] Introduce variables containing resource dir paths (PR #177953)   Petr Hosek via llvm-commits
• [compiler-rt] [llvm] [HWASan][Fuchsia] Have Fuchsia use a dynamic shadow start (PR #180881)   Petr Hosek via llvm-commits
• [compiler-rt] [llvm] [ASan][Fuchsia] Have Fuchsia use a dynamic shadow start (PR #180880)   Petr Hosek via llvm-commits
• [llvm] [Github] Use format-patch instead of diff in prune-unused-branches (PR #181200)   Petr Hosek via llvm-commits
• [llvm] [AMDGPU] Fix V_INDIRECT_REG_READ_GPR_IDX expansion with immediate index (PR #179699)   Petr Kurapov via llvm-commits
• [llvm] [WebAssembly] Replace Reachability with SCCs in Irreducible CFG Fixer (PR #179722)   Petr Penzin via llvm-commits
• [llvm] [WebAssembly] Replace Reachability with SCCs in Irreducible CFG Fixer (PR #179722)   Petr Penzin via llvm-commits
• [llvm] [WebAssembly] Replace Reachability with SCCs in Irreducible CFG Fixer (PR #179722)   Petr Penzin via llvm-commits
• [llvm] [WebAssembly] Replace Reachability with SCCs in Irreducible CFG Fixer (PR #179722)   Petr Penzin via llvm-commits
• [llvm] [WebAssembly] Replace Reachability with SCCs in Irreducible CFG Fixer (PR #179722)   Petr Penzin via llvm-commits
• [llvm] [X86] Allow handling of i128/256/512 SELECT on the FPU (PR #180197)   Phoebe Wang via llvm-commits
• [llvm] [X86] Fold expand(splat,passthrough,mask) -> select(splat,passthrough,mask) (PR #180238)   Phoebe Wang via llvm-commits
• [llvm] [X86] Fold expand(splat,passthrough,mask) -> select(splat,passthrough,mask) (PR #180238)   Phoebe Wang via llvm-commits
• [llvm] [X86] Fold expand(splat,passthrough,mask) -> select(splat,passthrough,mask) (PR #180238)   Phoebe Wang via llvm-commits
• [llvm] [X86] Fixed flags issue of onlyZeroFlagUsed (PR #180405)   Phoebe Wang via llvm-commits
• [llvm] [instcombine][x86]: simplifyx86fpmaxmin - allow negzero for single operand (PR #180418)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86] support reserve r8~r15 on X86_64 (PR #180242)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86] support reserve r8~r15 on X86_64 (PR #180242)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86] support reserve r8~r15 on X86_64 (PR #180242)   Phoebe Wang via llvm-commits
• [llvm] [DAGCombiner] Fix subvector extraction index for big-endian STLF (PR #180795)   Phoebe Wang via llvm-commits
• [clang] [llvm] [AMDGPU][GFX12.5] Reimplement monitor load as an atomic operation (PR #177343)   Pierre van Houtryve via llvm-commits
• [llvm] [MIParser] - Add support for MMRAs (PR #180320)   Pierre van Houtryve via llvm-commits
• [clang] [llvm] [AMDGPU][GFX12.5] Reimplement monitor load as an atomic operation (PR #177343)   Pierre van Houtryve via llvm-commits
• [clang] [llvm] [AMDGPU] Asynchronous loads from global/buffer to LDS on pre-GFX12 (PR #180466)   Pierre van Houtryve via llvm-commits
• [clang] [llvm] [AMDGPU] Asynchronous loads from global/buffer to LDS on pre-GFX12 (PR #180466)   Pierre van Houtryve via llvm-commits
• [llvm] Reland "[llvm-readobj] Dump callgraph section info for ELF" (PR #176260)   Prabhu Rajasekaran via llvm-commits
• [clang] [compiler-rt] [llvm] Migrate llvm-profdata to Opt flag parsing (PR #177868)   Prabhu Rajasekaran via llvm-commits
• [clang] [compiler-rt] [llvm] Migrate llvm-profdata to Opt flag parsing (PR #177868)   Prabhu Rajasekaran via llvm-commits
• [clang] [compiler-rt] [llvm] Migrate llvm-profdata to Opt flag parsing (PR #177868)   Prabhu Rajasekaran via llvm-commits
• [clang] [compiler-rt] [llvm] Migrate llvm-profdata to Opt flag parsing (PR #177868)   Prabhu Rajasekaran via llvm-commits
• [clang] [compiler-rt] [llvm] Migrate llvm-profdata to Opt flag parsing (PR #177868)   Prabhu Rajasekaran via llvm-commits
• [clang] [compiler-rt] [llvm] Migrate llvm-profdata to Opt flag parsing (PR #177868)   Prabhu Rajasekaran via llvm-commits
• [clang] [compiler-rt] [llvm] Migrate llvm-profdata to Opt flag parsing (PR #177868)   Prabhu Rajasekaran via llvm-commits
• [clang] [compiler-rt] [llvm] Migrate llvm-profdata to Opt flag parsing (PR #177868)   Prabhu Rajasekaran via llvm-commits
• [clang] [compiler-rt] [llvm] Migrate llvm-profdata to Opt flag parsing (PR #177868)   Prabhu Rajasekaran via llvm-commits
• [clang] [compiler-rt] [llvm] Migrate llvm-profdata to Opt flag parsing (PR #177868)   Prabhu Rajasekaran via llvm-commits
• [clang] [compiler-rt] [llvm] Migrate llvm-profdata to Opt flag parsing (PR #177868)   Prabhu Rajasekaran via llvm-commits
• [llvm] Reland "[llvm-readobj] Dump callgraph section info for ELF" (PR #176260)   Prabhu Rajasekaran via llvm-commits
• [llvm] Reland "[llvm-readobj] Dump callgraph section info for ELF" (PR #176260)   Prabhu Rajasekaran via llvm-commits
• [llvm] [Analysis] isTriviallyVectorizable - add Intrinsic::clmul along with vectorisation tests (PR #180014)   Pranshu Goyal via llvm-commits
• [llvm] Reapply "[msan] Switch switch() from strict handling to (icmp eq)-style handling" (#180636) (PR #181112)   Qinkun Bao via llvm-commits
• [llvm] Reapply "[msan] Switch switch() from strict handling to (icmp eq)-style handling" (#180636) (PR #181112)   Qinkun Bao via llvm-commits
• [llvm] Reapply "[msan] Switch switch() from strict handling to (icmp eq)-style handling" (#180636) (PR #181112)   Qinkun Bao via llvm-commits
• [llvm] [CodeGen] Introduce MIR-level target-independent rematerialization helper (PR #177080)   Quentin Colombet via llvm-commits
• [llvm] [CodeGen] Introduce MIR-level target-independent rematerialization helper (PR #177080)   Quentin Colombet via llvm-commits
• [llvm] [CodeGen] Introduce MIR-level target-independent rematerialization helper (PR #177080)   Quentin Colombet via llvm-commits
• [llvm] [CodeGen] Introduce MIR-level target-independent rematerialization helper (PR #177080)   Quentin Colombet via llvm-commits
• [llvm] [CodeGen] Introduce MIR-level target-independent rematerialization helper (PR #177080)   Quentin Colombet via llvm-commits
• [llvm] [CodeGen] Introduce MIR-level target-independent rematerialization helper (PR #177080)   Quentin Colombet via llvm-commits
• [llvm] [CodeGen] Introduce MIR-level target-independent rematerialization helper (PR #177080)   Quentin Colombet via llvm-commits
• [llvm] [CodeGen] Introduce MIR-level target-independent rematerialization helper (PR #177080)   Quentin Colombet via llvm-commits
• [llvm] [CodeGen] Introduce MIR-level target-independent rematerialization helper (PR #177080)   Quentin Colombet via llvm-commits
• [llvm] [CodeGen] Introduce MIR-level target-independent rematerialization helper (PR #177080)   Quentin Colombet via llvm-commits
• [llvm] [CodeGen] Introduce MIR-level target-independent rematerialization helper (PR #177080)   Quentin Colombet via llvm-commits
• [llvm] [CodeGen] Introduce MIR-level target-independent rematerialization helper (PR #177080)   Quentin Colombet via llvm-commits
• [llvm] [CodeGen] Introduce MIR-level target-independent rematerialization helper (PR #177080)   Quentin Colombet via llvm-commits
• [llvm] [CodeGen] Introduce MIR-level target-independent rematerialization helper (PR #177080)   Quentin Colombet via llvm-commits
• [llvm] [NFC][LLVM][IPO] Remove pass initialization from pass constructors (PR #180154)   Rahul Joshi via llvm-commits
• [llvm] Revert "[NFC][LLVM][IPO] Remove pass initialization from pass constructors" (PR #180571)   Rahul Joshi via llvm-commits
• [llvm] [NFC][LLVM][IPO] Remove pass initialization from pass constructors (PR #180154)   Rahul Joshi via llvm-commits
• [llvm] Revert "[NFC][LLVM][IPO] Remove pass initialization from pass constructors" (PR #180571)   Rahul Joshi via llvm-commits
• [llvm] [NFC][LLVM][IPO] Remove pass initialization from pass constructors (PR #180584)   Rahul Joshi via llvm-commits
• [llvm] [NFC][LLVM][IPO] Remove pass initialization from pass constructors (PR #180584)   Rahul Joshi via llvm-commits
• [llvm] [NFC][LLVM][IPO] Remove pass initialization from pass constructors (PR #180584)   Rahul Joshi via llvm-commits
• [llvm] [NFC][LLVM][IPO] Remove pass initialization from pass constructors (PR #180584)   Rahul Joshi via llvm-commits
• [llvm] [NFC][TableGen] Adopt CodeGenHelpers in GobalISel emitters (PR #180143)   Rahul Joshi via llvm-commits
• [llvm] [NFC][TableGen] Use convertKnownBitsToInt in CodeGenRegister (PR #180968)   Rahul Joshi via llvm-commits
• [llvm] [llvm/CAS] Add file-based APIs to `ObjectStore` (PR #180657)   Rainer Orth via llvm-commits
• [llvm] [llvm/unittests/CAS] Fix `CASTests` compilation when `LLVM_ENABLE_ONDISK_CAS=OFF` (PR #181403)   Rainer Orth via llvm-commits
• [llvm] [InstCombine] Optimise the expression `(C & A) | (select (C ^ true), B, false)` with `FoldOrOfAndsWithSelectToLogical` (PR #178438)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [InstCombine] Optimise the expression `(C & A) | (select (C ^ true), B, false)` with `FoldOrOfAndsWithSelectToLogical` (PR #178438)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [InstCombine] Optimise the expression `(C & A) | (select (C ^ true), B, false)` with `FoldOrOfAndsWithSelectToLogical` (PR #178438)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [InstCombine] Optimise the expression `(C & A) | (select (C ^ true), B, false)` with `FoldOrOfAndsWithSelectToLogical` (PR #178438)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [InstCombine] Optimise the expression `(C & A) | (select (C ^ true), B, false)` with `FoldOrOfAndsWithSelectToLogical` (PR #178438)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [InstCombine] Optimise the expression `(C & A) | (select (C ^ true), B, false)` with `FoldOrOfAndsWithSelectToLogical` (PR #178438)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [InstCombine] Optimise the expression `(C & A) | (select (C ^ true), B, false)` with `FoldOrOfAndsWithSelectToLogical` (PR #178438)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [InstCombine] Optimise the expression `(C & A) | (select (C ^ true), B, false)` with `FoldOrOfAndsWithSelectToLogical` (PR #178438)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [InstCombine] Optimise the expression `(C & A) | (select (C ^ true), B, false)` with `FoldOrOfAndsWithSelectToLogical` (PR #178438)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [InstCombine] Optimise the expression `(C & A) | (select (C ^ true), B, false)` with `FoldOrOfAndsWithSelectToLogical` (PR #178438)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [InstCombine] Optimise the expression `(C & A) | (select (C ^ true), B, false)` with `FoldOrOfAndsWithSelectToLogical` (PR #178438)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [InstCombine] Optimise the expression `(C & A) | (select (C ^ true), B, false)` with `FoldOrOfAndsWithSelectToLogical` (PR #178438)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [InstCombine] Optimise the expression `(C & A) | (select (C ^ true), B, false)` with `FoldOrOfAndsWithSelectToLogical` (PR #178438)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [InstCombine] Optimise the expression `(C & A) | (select (C ^ true), B, false)` with `FoldOrOfAndsWithSelectToLogical` (PR #178438)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [InstCombine] Optimise the expression `(C && A) | (!C && B)` with `FoldOrOfLogicalAnds` (PR #178438)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [InstCombine] Optimise the expression `(C && A) | (!C && B)` with `FoldOrOfLogicalAnds` (PR #178438)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [InstCombine] Optimise the expression `(C && A) | (!C && B)` with `FoldOrOfLogicalAnds` (PR #178438)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [InstCombine] Optimise the expression `(C && A) || (!C && B)` with `FoldOrOfLogicalAnds` (PR #178438)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [InstCombine] Optimise the expression `(C && A) || (!C && B)` with `FoldOrOfLogicalAnds` (PR #178438)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [LangRef] Mention allocation elision (PR #177592)   Ralf Jung via llvm-commits
• [llvm] [LangRef] Mention allocation elision (PR #177592)   Ralf Jung via llvm-commits
• [llvm] [LangRef] Mention allocation elision (PR #177592)   Ralf Jung via llvm-commits
• [llvm] [LangRef] Mention allocation elision (PR #177592)   Ralf Jung via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Ralf Jung via llvm-commits
• [llvm] [VPlan] Simplify true && x -> x (PR #179426)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Propagate FastMathFlags from phis to blends (PR #180226)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Propagate FastMathFlags from phis to blends (PR #180226)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Propagate FastMathFlags from phis to blends (PR #180226)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Propagate FastMathFlags from phis to blends (PR #180226)   Ramkumar Ramachandra via llvm-commits
• [llvm] [ConstantRange] Expand makeAllowedICmpRegion to use samesign to give tighter range (PR #174355)   Ramkumar Ramachandra via llvm-commits
• [llvm] [ConstantRange] Expand makeAllowedICmpRegion to use samesign to give tighter range (PR #174355)   Ramkumar Ramachandra via llvm-commits
• [llvm] [ConstantRange] Expand makeAllowedICmpRegion to use samesign to give tighter range (PR #174355)   Ramkumar Ramachandra via llvm-commits
• [llvm] [ConstantRange] Expand makeAllowedICmpRegion to use samesign to give tighter range (PR #174355)   Ramkumar Ramachandra via llvm-commits
• [llvm] [ConstantRange] Expand makeAllowedICmpRegion to use samesign to give tighter range (PR #174355)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Add `-vplan-print-after=` option (PR #178700)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Add `-vplan-print-after=` option (PR #178700)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Add `-vplan-print-after=` option (PR #178700)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Add `-vplan-print-after=` option (PR #178700)   Ramkumar Ramachandra via llvm-commits
• [llvm] [UTC][VPlan] Use `-vplan-print-after` for VPlan-dump-based tests (PR #178736)   Ramkumar Ramachandra via llvm-commits
• [llvm] [DominanceFrontier] Support post-dominators on graphs with single root (PR #179336)   Ramkumar Ramachandra via llvm-commits
• [llvm] [DominanceFrontier] Support post-dominators on graphs with single root (PR #179336)   Ramkumar Ramachandra via llvm-commits
• [llvm] [DominanceFrontier] Support post-dominators on graphs with single root (PR #179336)   Ramkumar Ramachandra via llvm-commits
• [llvm] [DominanceFrontier] Support post-dominators on graphs with single root (PR #179336)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Directly unroll VectorEndPointerRecipe (PR #172372)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Fix alias logic in canHoistOrSinkWithNoAliasCheck (PR #179504)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Fix alias logic in canHoistOrSinkWithNoAliasCheck (PR #179504)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Fix alias logic in canHoistOrSinkWithNoAliasCheck (PR #179504)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Directly unroll VectorEndPointerRecipe (PR #172372)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Directly unroll VectorEndPointerRecipe (PR #172372)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Run more passes through `RUN_VPLAN_PASS[_NO_VERIFY]` (PR #180580)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Run more passes through `RUN_VPLAN_PASS[_NO_VERIFY]` (PR #180580)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Explicitly reassociate header mask in logical and (PR #180898)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Explicitly reassociate header mask in logical and (PR #180898)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Explicitly reassociate header mask in logical and (PR #180898)   Ramkumar Ramachandra via llvm-commits
• [llvm] [UTC][VPlan] Use `-vplan-print-after` for VPlan-dump-based tests (PR #178736)   Ramkumar Ramachandra via llvm-commits
• [llvm] [UTC][VPlan] Use `-vplan-print-after` for VPlan-dump-based tests (PR #178736)   Ramkumar Ramachandra via llvm-commits
• [llvm] [UTC][VPlan] Use `-vplan-print-after` for VPlan-dump-based tests (PR #178736)   Ramkumar Ramachandra via llvm-commits
• [llvm] [UTC][VPlan] Use `-vplan-print-after` for VPlan-dump-based tests (PR #178736)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Explicitly reassociate header mask in logical and (PR #180898)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Run initial recipe simplification on VPlan0. (PR #176828)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Run initial recipe simplification on VPlan0. (PR #176828)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Run initial recipe simplification on VPlan0. (PR #176828)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Run initial recipe simplification on VPlan0. (PR #176828)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Run initial recipe simplification on VPlan0. (PR #176828)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Fix alias logic in canHoistOrSinkWithNoAliasCheck (PR #179504)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Fix alias logic in canHoistOrSinkWithNoAliasCheck (PR #179504)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Fix alias logic in canHoistOrSinkWithNoAliasCheck (PR #179504)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Fix alias logic in canHoistOrSinkWithNoAliasCheck (PR #179504)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Fix alias logic in canHoistOrSinkWithNoAliasCheck (PR #179504)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Fix alias logic in canHoistOrSinkWithNoAliasCheck (PR #179504)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Fix alias logic in canHoistOrSinkWithNoAliasCheck (PR #179504)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Introduce m_c_Logical(And|Or), simplify x && true -> x (PR #180048)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Introduce m_c_Logical(And|Or) (NFC) (PR #180048)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Introduce m_c_Logical(And|Or) (NFC) (PR #180048)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Introduce m_c_Logical(And|Or) (NFC) (PR #180048)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Run initial recipe simplification on VPlan0. (PR #176828)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Run initial recipe simplification on VPlan0. (PR #176828)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Introduce m_c_Logical(And|Or) (NFC) (PR #180048)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Simplify recipes after convertToConcreteRecipes (PR #180235)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Factor collectGroupedMemOps for hoistInvariantLoads (NFCI) (PR #179506)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Factor collectGroupedMemOps for hoistInvariantLoads (NFCI) (PR #179506)   Ramkumar Ramachandra via llvm-commits
• [llvm] [UTC][VPlan] Use `-vplan-print-after` for VPlan-dump-based tests (PR #178736)   Ramkumar Ramachandra via llvm-commits
• [llvm] [UTC][VPlan] Use `-vplan-print-after` for VPlan-dump-based tests (PR #178736)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Run initial recipe simplification on VPlan0. (PR #176828)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Directly unroll VectorEndPointerRecipe (PR #172372)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Directly unroll VectorEndPointerRecipe (PR #172372)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Simplify recipes after convertToConcreteRecipes (PR #180235)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Simplify recipes before cse (PR #180235)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Simplify recipes before cse as well (PR #180235)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Simplify recipes before cse as well (PR #180235)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Simplify recipes before cse as well (PR #180235)   Ramkumar Ramachandra via llvm-commits
• [llvm] [ConstraintElim] Use ConstantRange information for ConstraintElimination (PR #180862)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Run VPlan licm late in executePlan (PR #181122)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Run VPlan licm late in executePlan (PR #181122)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Run VPlan licm late in executePlan (PR #181122)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Run VPlan licm late in executePlan (PR #181122)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Run VPlan licm late in executePlan (PR #181122)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Introduce m_c_Logical(And|Or) (PR #180048)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Introduce m_c_Logical(And|Or) (PR #180048)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Introduce m_c_Logical(And|Or) (PR #180048)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Run VPlan licm late in executePlan (PR #181122)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Run VPlan licm late in executePlan (PR #181122)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Run VPlan licm late in executePlan (PR #181122)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Avoid VectorPointer bail in narrowInterleaveGroups (PR #172286)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Reuse allowed-users logic in narrowToSingleScalars (PR #174444)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Recursively match operands of interleave group (PR #164839)   Ramkumar Ramachandra via llvm-commits
• [llvm] [SCEV] Discard samesign when analyzing loop invariant exits (PR #181171)   Ramkumar Ramachandra via llvm-commits
• [llvm] [SCEV] Discard samesign when analyzing loop invariant exits (PR #181171)   Ramkumar Ramachandra via llvm-commits
• [llvm] [SCEV] Discard samesign when analyzing loop invariant exits (PR #181171)   Ramkumar Ramachandra via llvm-commits
• [llvm] [SCEV] Discard samesign when analyzing loop invariant exits (PR #181171)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Remove unused VPExpandSCEVRecipe before expansion (PR #181329)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Reuse introduces-broadcast logic in narrowToSingleScalars (PR #174444)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Reuse introduces-broadcast logic in narrowToSingleScalars (PR #174444)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Reuse introduces-broadcast logic in narrowToSingleScalars (PR #174444)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Reuse introduces-broadcast logic in narrowToSingleScalars (PR #174444)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Recursively match operands of interleave group (PR #164839)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Directly unroll VectorEndPointerRecipe (PR #172372)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Recursively match operands of interleave group (PR #164839)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Recursively match operands of interleave group (PR #164839)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Reuse introduces-broadcast logic in narrowToSingleScalars (PR #174444)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Reuse introduces-broadcast logic in narrowToSingleScalars (PR #174444)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Reuse introduces-broadcast logic in narrowToSingleScalars (PR #174444)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Add simple driver option to run some individual transforms. (PR #178522)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Add simple driver option to run some individual transforms. (PR #178522)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Add simple driver option to run some individual transforms. (PR #178522)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Add simple driver option to run some individual transforms. (PR #178522)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Recursively match operands of interleave group (PR #164839)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LAA] Get conflicts in loop-invariant addresses (PR #180945)   Raphael Moreira Zinsly via llvm-commits
• [clang] [llvm] [docs] Convert Maintainers.rst to Markdown (.md) (PR #180652)   Reid Kleckner via llvm-commits
• [clang] [llvm] [docs] Convert Maintainers.rst to Markdown (.md) (PR #180652)   Reid Kleckner via llvm-commits
• [llvm] [AArch64] Avoid selecting XAR for reverse operations. (PR #178706)   Ricardo Jesus via llvm-commits
• [llvm] [AArch64] Avoid selecting XAR for reverse operations. (PR #178706)   Ricardo Jesus via llvm-commits
• [llvm] [AArch64] Avoid selecting XAR for reverse operations. (PR #178706)   Ricardo Jesus via llvm-commits
• [llvm] [AArch64] Test all needles when vectorising find_first_of loops. (PR #179298)   Ricardo Jesus via llvm-commits
• [llvm] [AArch64] Test all needles when vectorising find_first_of loops. (PR #179298)   Ricardo Jesus via llvm-commits
• [llvm] [AArch64] Avoid selecting XAR for reverse operations. (PR #178706)   Ricardo Jesus via llvm-commits
• [llvm] [LoopIdiomVectorize] Test all needles when vectorising find_first_of loops. (PR #179298)   Ricardo Jesus via llvm-commits
• [llvm] [LoopIdiomVectorize] Test all needles when vectorising find_first_of loops. (PR #179298)   Ricardo Jesus via llvm-commits
• [llvm] [LoopIdiomVectorize] Test all needles when vectorising find_first_of loops. (PR #179298)   Ricardo Jesus via llvm-commits
• [llvm] [AArch64] Avoid selecting XAR for reverse operations. (PR #178706)   Ricardo Jesus via llvm-commits
• [llvm] [AArch64] Avoid selecting XAR for reverse operations. (PR #178706)   Ricardo Jesus via llvm-commits
• [llvm] [Mips] Add r5900 (PlayStation 2 Emotion Engine) FPU Support (PR #178942)   Rick Gaiser via llvm-commits
• [llvm] [offload] Adapt tests to new PluginInterface quoting [NFC] (PR #180505)   Robert Imschweiler via llvm-commits
• [llvm] [OFFLOAD] Fix TARGET_NAME in plugins common code (PR #180151)   Robert Imschweiler via llvm-commits
• [llvm] [offload] Adapt tests to new PluginInterface quoting [NFC] (PR #180505)   Robert Imschweiler via llvm-commits
• [llvm] [offload][flang-rt] Fix NVPTX runtime build (PR #180530)   Robert Imschweiler via llvm-commits
• [llvm] [offload][flang-rt] Fix NVPTX runtime build (PR #180530)   Robert Imschweiler via llvm-commits
• [llvm] [offload][flang-rt] Fix NVPTX runtime build (PR #180530)   Robert Imschweiler via llvm-commits
• [llvm] [AMDGPU] IGLP: Fix static variables (PR #137549)   Robert Imschweiler via llvm-commits
• [llvm] [OpenMP][Offload] Handle `present/to/from` when a different entry did `alloc/delete`. (PR #165494)   Robert Imschweiler via llvm-commits
• [llvm] [OpenMP][Offload] Handle `present/to/from` when a different entry did `alloc/delete`. (PR #165494)   Robert Imschweiler via llvm-commits
• [llvm] [OpenMP][Offload] Handle `present/to/from` when a different entry did `alloc/delete`. (PR #165494)   Robert Imschweiler via llvm-commits
• [llvm] [OpenMP][Offload] Handle `present/to/from` when a different entry did `alloc/delete`. (PR #165494)   Robert Imschweiler via llvm-commits
• [lld] [RISCV][LLD] Zcmt RISC-V extension in lld (PR #163142)   Robin Kastberg via llvm-commits
• [llvm] [LIBM][AMDLIBM] - Add new vector call support for fveclib=AMDLIBM (PR #180896)   Rohit Aggarwal via llvm-commits
• [llvm] [LIBM][AMDLIBM] - Add new vector call support for fveclib=AMDLIBM (PR #180896)   Rohit Aggarwal via llvm-commits
• [llvm] [AggressiveInstCombine] POPCNT generation for bit-count pattern (PR #177109)   Rohit Aggarwal via llvm-commits
• [llvm] [AggressiveInstCombine] POPCNT generation for bit-count pattern (PR #180917)   Rohit Aggarwal via llvm-commits
• [llvm] [AggressiveInstCombine] POPCNT generation for bit-count pattern (PR #180917)   Rohit Aggarwal via llvm-commits
• [llvm] [AggressiveInstCombine] Match the pattern and generate ctlz function call (PR #177110)   Rohit Aggarwal via llvm-commits
• [compiler-rt] [hwasan][Fuchsia] Use GetCurrentThread (PR #180602)   Roland McGrath via llvm-commits
• [compiler-rt] [hwasan][Fuchsia] Use GetCurrentThread (PR #180602)   Roland McGrath via llvm-commits
• [compiler-rt] [hwasan][Fuchsia] Use GetCurrentThread (PR #180602)   Roland McGrath via llvm-commits
• [compiler-rt] [llvm] [HWASan][Fuchsia] Have Fuchsia use a dynamic shadow start (PR #180881)   Roland McGrath via llvm-commits
• [compiler-rt] [llvm] [HWASan][Fuchsia] Have Fuchsia use a dynamic shadow start (PR #180881)   Roland McGrath via llvm-commits
• [compiler-rt] [ASan] Fix crash in __asan_region_is_poisoned at application memory boundaries (PR #180223)   Roman Vinogradov via llvm-commits
• [llvm] [llvm-objdump][AVR] Detect AVR architecture from ELF flags for disassembling (PR #180468)   Ruoyu Qiu via llvm-commits
• [llvm] [llvm-objdump][AVR] Detect AVR architecture from ELF flags for disassembling (PR #180468)   Ruoyu Qiu via llvm-commits
• [llvm] [llvm-objdump][AVR] Detect AVR architecture from ELF flags for disassembling (PR #180468)   Ruoyu Qiu via llvm-commits
• [llvm] [llvm-objdump][AVR] Detect AVR architecture from ELF flags for disassembling (PR #180468)   Ruoyu Qiu via llvm-commits
• [llvm] [SLP] Use the correct identity when combining binary opcodes with AND/MUL (PR #180457)   Ryan Buchner via llvm-commits
• [llvm] [RISCV] Lower disjoint shuffle of shuffles to MERGE-GATHER sequence (PR #178095)   Ryan Buchner via llvm-commits
• [llvm] [Support] Always scale InstructionCost::Value (PR #178962)   Ryan Buchner via llvm-commits
• [llvm] [SLP] Use static_assert() rather than assert() where possible (PR #180867)   Ryan Buchner via llvm-commits
• [llvm] [SLP] Use static_assert() rather than assert() where possible (PR #180867)   Ryan Buchner via llvm-commits
• [llvm] [SLP] Use static_assert() rather than assert() where possible (PR #180867)   Ryan Buchner via llvm-commits
• [llvm] [ADT] Use static_assert() rather than assert() where possible (PR #180867)   Ryan Buchner via llvm-commits
• [llvm] [ADT] Use static_assert() rather than assert() where possible (PR #180867)   Ryan Buchner via llvm-commits
• [llvm] [ADT] Add is_sorted_constexpr, equivalent to C++20 std::is_sorted (PR #180867)   Ryan Buchner via llvm-commits
• [llvm] [ADT] Add is_sorted_constexpr, equivalent to C++20 std::is_sorted (PR #180867)   Ryan Buchner via llvm-commits
• [llvm] [SLP] Use the correct identity when combining binary opcodes with AND/MUL (PR #180457)   Ryan Buchner via llvm-commits
• [llvm] [SLP]Initial compatibility support for shl v, 1 and add v, v (PR #181168)   Ryan Buchner via llvm-commits
• [llvm] [ADT] Add is_sorted_constexpr, equivalent to C++20 std::is_sorted (PR #180867)   Ryan Buchner via llvm-commits
• [llvm] [SLP][NFC] Use static_assert to confirm SupportedOps is sorted (PR #181397)   Ryan Buchner via llvm-commits
• [llvm] [SLP][NFC] Use static_assert to confirm SupportedOps is sorted (PR #181397)   Ryan Buchner via llvm-commits
• [llvm] [AArch64][GlobalISel] Reassociate add sub mul. (PR #180753)   Ryan Cowan via llvm-commits
• [llvm] [AArch64][GlobalISel] Reassociate add sub mul. (PR #180753)   Ryan Cowan via llvm-commits
• [llvm] [llvm-otool] Fix error messages to use -p instead of --dis-symname (PR #181225)   Ryan Mansfield via llvm-commits
• [llvm] [MIParser] - Add support for MMRAs (PR #180320)   Ryan Mitchell via llvm-commits
• [llvm] [MIParser] - Add support for MMRAs (PR #180320)   Ryan Mitchell via llvm-commits
• [llvm] [MIParser] - Add support for MMRAs (PR #180320)   Ryan Mitchell via llvm-commits
• [llvm] [MIParser] - Add support for MMRAs (PR #180320)   Ryan Mitchell via llvm-commits
• [llvm] [MIParser] - Add support for MMRAs (PR #180320)   Ryan Mitchell via llvm-commits
• [llvm] [AMDGPU][NFC] Use RegisterOperand instead of RegisterClass (PR #180574)   Ryan Mitchell via llvm-commits
• [llvm] [AMDGPU][NFC] Use RegisterOperand instead of RegisterClass (PR #180574)   Ryan Mitchell via llvm-commits
• [llvm] [AMDGPU][NFC] Use RegisterOperand instead of RegisterClass (PR #180574)   Ryan Mitchell via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Move instr events code into separate function (PR #180864)   Ryan Mitchell via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Move instr events code into separate function (PR #180864)   Ryan Mitchell via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Move instr events code into separate function (PR #180864)   Ryan Mitchell via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Move instr events code into separate function (PR #180864)   Ryan Mitchell via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Drop IsExpertMode and MaxCounter member variables (PR #181092)   Ryan Mitchell via llvm-commits
• [llvm] [Tablegen] Patch RegUnitIntervals Initialization (PR #181173)   Ryan Mitchell via llvm-commits
• [llvm] [Tablegen] Patch RegUnitIntervals Initialization (PR #181173)   Ryan Mitchell via llvm-commits
• [llvm] [Tablegen] Patch RegUnitIntervals Initialization (PR #181173)   Ryan Mitchell via llvm-commits
• [llvm] [Tablegen] Patch RegUnitIntervals Initialization (PR #181173)   Ryan Mitchell via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Drop MaxCounter member variable (PR #181092)   Ryan Mitchell via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Drop MaxCounter member variable (PR #181092)   Ryan Mitchell via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Drop MaxCounter member variable (PR #181092)   Ryan Mitchell via llvm-commits
• [llvm] [AMDGPU][NFC] Enable RegistersAreIntervals (PR #181398)   Ryan Mitchell via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts] Enable RegistersAreIntervals for AMDGPU (PR #174888)   Ryan Mitchell via llvm-commits
• [llvm] [DA] Rewrite the formula in the Strong SIV test (PR #179665)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Rewrite the formula in the Strong SIV test (PR #179665)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Rewrite the formula in the Strong SIV test (PR #179665)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Rewrite the formula in the Strong SIV test (PR #179665)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Ensure nsw flag is checked for StrongSIV addrecs (PR #178047)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Ensure nsw flag is checked for StrongSIV addrecs (PR #178047)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Ensure nsw flag is checked for StrongSIV addrecs (PR #178047)   Ryotaro Kasuga via llvm-commits
• [llvm] [llvm-ir2vec] Adding BB Embeddings Map API to ir2vec python bindings (PR #180135)   S. VenkataKeerthy via llvm-commits
• [llvm] [llvm-ir2vec] Adding BB Embeddings Map API to ir2vec python bindings (PR #180135)   S. VenkataKeerthy via llvm-commits
• [llvm] [llvm-ir2vec] Adding Inst Embeddings Map API to ir2vec python bindings (PR #180140)   S. VenkataKeerthy via llvm-commits
• [libc] [llvm] [libc][math] Refactor f16sqrtf128 to Header Only. (PR #178750)   Sai Hemanth Bheemreddy via llvm-commits
• [clang] [llvm] [WebAssembly] Change to 64-bit table indices on Wasm64 (PR #180649)   Sam Clegg via llvm-commits
• [clang] [llvm] [WebAssembly] Change to 64-bit table indices on Wasm64 (PR #180649)   Sam Clegg via llvm-commits
• [lld] [lld][Webassembly] Avoid a signed overflow on large sections (PR #178287)   Sam Clegg via llvm-commits
• [llvm] [WebAssembly] Add a WASM table to `llvm/test/MC/WebAssembly/wasm64.s`. NFC (PR #180861)   Sam Clegg via llvm-commits
• [llvm] [RISCV] Remove explicitly adding spilled registers as liveins. (PR #180483)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Combine ADDD+WMULSU to WMACCSU (PR #180454)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Rename FeatureEnableSelectOptimize to TuneEnableSelectOptimize (PR #180496)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Remove explicitly adding spilled registers as liveins. (PR #180483)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Add sp register as implicit/implicit-def register to save/restore call (PR #180667)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Use ADDD for GPR Pair Move with P (PR #180671)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Use ADDD for GPR Pair Move with P (PR #180671)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Use ADDD for GPR Pair Move with P (PR #180671)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Remove redundant czero in multi-word comparisons (PR #180485)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Stash GPR to FPR if emergency spill slot is not reachable (PR #180685)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Add (BSETI x0, 11) to isLoadImm for optimizeCondBranch (PR #180820)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Remove non-alias tests from rv32zbb-aliases-valid.s and rv64zbb-aliases-valid.s. NFC (PR #180317)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Remove non-alias tests from rv32zbb-aliases-valid.s and rv64zbb-aliases-valid.s. NFC (PR #180317)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Use ADDD for GPR Pair Move with P (PR #180671)   Sam Elliott via llvm-commits
• [llvm] [IROutliner] Add TTI Hook for Propagating Attributes (PR #153985)   Sam Elliott via llvm-commits
• [clang] [llvm] [outliners] Turn nooutline into an Enum Attribute (PR #163665)   Sam Elliott via llvm-commits
• [llvm] [outliners] Turn nooutline into an Enum Attribute (PR #163665)   Sam Elliott via llvm-commits
• [llvm] [outliners] Turn nooutline into an Enum Attribute (PR #163665)   Sam Elliott via llvm-commits
• [llvm] [outliners] Turn nooutline into an Enum Attribute (PR #163665)   Sam Elliott via llvm-commits
• [llvm] [NFC][TableGen] Use std::move to avoid copy (PR #180775)   Sam Elliott via llvm-commits
• [llvm] [Docs] Describe Tablegen Selection Structures (PR #178518)   Sam Elliott via llvm-commits
• [llvm] [Docs] Improve Target TableGen Docs (PR #178518)   Sam Elliott via llvm-commits
• [llvm] [Docs] Improve Target TableGen Docs (PR #178518)   Sam Elliott via llvm-commits
• [llvm] [Docs] Improve Target TableGen Docs (PR #178518)   Sam Elliott via llvm-commits
• [llvm] [Docs] Improve Target TableGen Docs (PR #178518)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Improve 2*XLEN SHL legalization with P extension. (PR #181056)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Combine Xqci Extensions in Arch Strings (PR #181033)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Combine Xqci Extensions in Arch Strings (PR #181033)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Use NSRL/NSRA for legalizing i64 shifts with P extension on RV32. (PR #181040)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Move NSRL/NSRA isel to tablegen. NFC (PR #181096)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Combine Xqci Extensions in Arch Strings (PR #181033)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Remove RISCVISD::WMACC*. Match during isel. NFC (PR #181197)   Sam Elliott via llvm-commits
• [llvm] [RISCV] In tryWideningMulAcc, check multiple users before checking operand 1. (PR #181321)   Sam Elliott via llvm-commits
• [llvm] [RISCV] In tryWideningMulAcc, check multiple users before checking operand 1. (PR #181321)   Sam Elliott via llvm-commits
• [llvm] [RISCV] In tryWideningMulAcc, check multiple users before checking operand 1. (PR #181321)   Sam Elliott via llvm-commits
• [llvm] [TwoAddressInstruction] Iterate through tied regs when analyzing revcopy (PR #179940)   Sam Elliott via llvm-commits
• [llvm] [TwoAddressInstruction] Iterate through tied regs when analyzing revcopy (PR #179940)   Sam Elliott via llvm-commits
• [llvm] [RISCV] In tryWideningMulAcc, check multiple users before checking operand 1. (PR #181321)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Combine ADDD(lo, hi, x, 0) -> WADDAU(lo, hi, x, 0). Combine WADDAU (WADDAU lo, hi, x, 0), y, 0 -> WADDAU lo, hi, x, y (PR #181396)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Combine ADDD(lo, hi, x, 0) -> WADDAU(lo, hi, x, 0). Combine WADDAU (WADDAU lo, hi, x, 0), y, 0 -> WADDAU lo, hi, x, y (PR #181396)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Combine ADDD(lo, hi, x, 0) -> WADDAU(lo, hi, x, 0). Combine WADDAU (WADDAU lo, hi, x, 0), y, 0 -> WADDAU lo, hi, x, y (PR #181396)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Simplify Extension Predicates, Compatibility (PR #181255)   Sam Elliott via llvm-commits
• [clang] [llvm] [AMDGPU] Asynchronous loads from global/buffer to LDS on pre-GFX12 (PR #180466)   Sameer Sahasrabuddhe via llvm-commits
• [clang] [llvm] [AMDGPU] Asynchronous loads from global/buffer to LDS on pre-GFX12 (PR #180466)   Sameer Sahasrabuddhe via llvm-commits
• [clang] [llvm] [AMDGPU] Asynchronous loads from global/buffer to LDS on pre-GFX12 (PR #180466)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [AMDGPU] Non convergent instruction does not depend on EXEC. NFCI. (PR #179821)   Sameer Sahasrabuddhe via llvm-commits
• [clang] [llvm] [AMDGPU] Asynchronous loads from global/buffer to LDS on pre-GFX12 (PR #180466)   Sameer Sahasrabuddhe via llvm-commits
• [clang] [llvm] [AMDGPU] Asynchronous loads from global/buffer to LDS on pre-GFX12 (PR #180466)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [Uniformity] Implement per-output machine uniformity analysis (PR #179275)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [AMDGPU] BackOffBarrier feature added to gfx1250; Removed incorrect "DS Store drain" check. (PR #179818)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [AMDGPU] BackOffBarrier feature added to gfx1250; Removed incorrect "DS Store drain" check. (PR #179818)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [AMDGPU] Allow hoisting of V_READFIRSTLANE_B32 for uniform operand (PR #178312)   Sameer Sahasrabuddhe via llvm-commits
• [clang] [llvm] [AMDGPU] Asynchronous loads from global/buffer to LDS on pre-GFX12 (PR #180466)   Sameer Sahasrabuddhe via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #180467)   Sameer Sahasrabuddhe via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #180467)   Sameer Sahasrabuddhe via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #180467)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [AMDGPU] Allow hoisting of V_READFIRSTLANE_B32 for uniform operand (PR #178312)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [AMDGPU] Allow hoisting of V_READFIRSTLANE_B32 for uniform operand (PR #178312)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [AMDGPU] Allow hoisting of V_READFIRSTLANE_B32 for uniform operand (PR #178312)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnt][NFC] Access Waitcnt elements using InstCounterType (PR #178345)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [AMDGPU][NFC] Minor source cleanups in SIInsertWaitcnts (PR #181095)   Sameer Sahasrabuddhe via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #180467)   Sameer Sahasrabuddhe via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #180467)   Sameer Sahasrabuddhe via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #180467)   Sameer Sahasrabuddhe via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #180467)   Sameer Sahasrabuddhe via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #180467)   Sameer Sahasrabuddhe via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #180467)   Sameer Sahasrabuddhe via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #180467)   Sameer Sahasrabuddhe via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #180467)   Sameer Sahasrabuddhe via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #180467)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [AMDGPU][NFC] Minor source cleanups in SIInsertWaitcnts (PR #181095)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [AMDGPU][NFC] Minor source cleanups in SIInsertWaitcnts (PR #181095)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [AMDGPU][NFC] Minor source cleanups in SIInsertWaitcnts (PR #181095)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [AMDGPU][NFC] Minor source cleanups in SIInsertWaitcnts (PR #181095)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [AMDGPU][NFC] Minor source cleanups in SIInsertWaitcnts (PR #181095)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [AMDGPU][NFC] Minor source cleanups in SIInsertWaitcnts (PR #181095)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [AMDGPU][NFC] Minor source cleanups in SIInsertWaitcnts (PR #181095)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [VPlan] Reject partial reductions with invalid costs in getScaledReds. (PR #180438)   Sander de Smalen via llvm-commits
• [llvm] [VPlan] Reject partial reductions with invalid costs in getScaledReds. (PR #180438)   Sander de Smalen via llvm-commits
• [llvm] [VPlan] Reject partial reductions with invalid costs in getScaledReds. (PR #180438)   Sander de Smalen via llvm-commits
• [llvm] [VPlan] Reject partial reductions with invalid costs in getScaledReds. (PR #180438)   Sander de Smalen via llvm-commits
• [llvm] [VPlan] Reject partial reductions with invalid costs in getScaledReds. (PR #180438)   Sander de Smalen via llvm-commits
• [llvm] [VPlan] Reject partial reductions with invalid costs in getScaledReds. (PR #180438)   Sander de Smalen via llvm-commits
• [llvm] [SDAG] Implement SplitVecOp for `ISD::VECTOR_FIND_LAST_ACTIVE` (PR #180290)   Sander de Smalen via llvm-commits
• [llvm] [LV] Handle partial sub-reductions with sub in middle block. (PR #178919)   Sander de Smalen via llvm-commits
• [llvm] [LV] Handle partial sub-reductions with sub in middle block. (PR #178919)   Sander de Smalen via llvm-commits
• [llvm] [LV] Handle partial sub-reductions with sub in middle block. (PR #178919)   Sander de Smalen via llvm-commits
• [llvm] [SDAG] Implement missing legalization for `ISD::VECTOR_FIND_LAST_ACTIVE` (PR #180290)   Sander de Smalen via llvm-commits
• [llvm] [SDAG] Implement missing legalization for `ISD::VECTOR_FIND_LAST_ACTIVE` (PR #180290)   Sander de Smalen via llvm-commits
• [llvm] [LV] Handle partial sub-reductions with sub in middle block. (PR #178919)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][ISel] Add clmul to pmullb/t lowering (PR #180568)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][ISel] Add clmul to pmullb/t lowering (PR #180568)   Sander de Smalen via llvm-commits
• [llvm] [LV] Pass symbolic VF to CalculateTripCountMinusVF and CanonicalIVIncrementForPart (NFC) (PR #180542)   Sander de Smalen via llvm-commits
• [llvm] [LV] Pass symbolic VF to CalculateTripCountMinusVF and CanonicalIVIncrementForPart (NFC) (PR #180542)   Sander de Smalen via llvm-commits
• [llvm] [LV] Handle partial sub-reductions with sub in middle block. (PR #178919)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][ISel] Add clmul to pmullb/t lowering (PR #180568)   Sander de Smalen via llvm-commits
• [llvm] [VPlan] Reject partial reductions with invalid costs in getScaledReds. (PR #180438)   Sander de Smalen via llvm-commits
• [llvm] [LV] Pass symbolic VF to CalculateTripCountMinusVF and CanonicalIVIncrementForPart (NFC) (PR #180542)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Fix active.lane.mask(0, cttz.elts(x)) -> 'brkb' transform (PR #180177)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Fix active.lane.mask(0, cttz.elts(x)) -> 'brkb' transform (PR #180177)   Sander de Smalen via llvm-commits
• [llvm] [AIX] Sort relocations in XCOFF object writer. (PR #180807)   Sean Fertile via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Sean Perry via llvm-commits
• [llvm] [ARM] Precommit tests: strictfp rounding vector intrinsics (PR #180479)   Serge Pavlov via llvm-commits
• [llvm] [ARM] Precommit tests: strictfp rounding vector intrinsics (PR #180479)   Serge Pavlov via llvm-commits
• [llvm] [ARM] Precommit tests: strictfp rounding vector intrinsics (PR #180479)   Serge Pavlov via llvm-commits
• [llvm] [ARM] Precommit tests: strictfp rounding vector intrinsics (PR #180479)   Serge Pavlov via llvm-commits
• [lldb] [llvm] [lldb-dap] Add unknown request handler (PR #181109)   Sergei Druzhkov via llvm-commits
• [lldb] [llvm] [lldb-dap] Add unknown request handler (PR #181109)   Sergei Druzhkov via llvm-commits
• [lldb] [llvm] [lldb-dap] Add unknown request handler (PR #181109)   Sergei Druzhkov via llvm-commits
• [lldb] [llvm] [lldb-dap] Add unknown request handler (PR #181109)   Sergei Druzhkov via llvm-commits
• [lldb] [llvm] [lldb-dap] Add unknown request handler (PR #181109)   Sergei Druzhkov via llvm-commits
• [lldb] [llvm] [lldb-dap] Add unknown request handler (PR #181109)   Sergei Druzhkov via llvm-commits
• [lldb] [llvm] [lldb-dap] Add unknown request handler (PR #181109)   Sergei Druzhkov via llvm-commits
• [lldb] [llvm] [lldb-dap] Add unknown request handler (PR #181109)   Sergei Druzhkov via llvm-commits
• [llvm] [MLIR] [Python] Added plumbing to run stubgen on the mlir._mlir package (PR #179211)   Sergei Lebedev via llvm-commits
• [llvm] [mlir] [MLIR] [Bazel] Moved stubgen_runner.py out of llvm-project-overlay (PR #181029)   Sergei Lebedev via llvm-commits
• [llvm] [NFC][AMDGPU] Add a test to show the impact of wrong `s_mov_b64` instruction size (PR #180386)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU] Add a test to show the impact of wrong `s_mov_b64` instruction size (PR #180386)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix instruction size for 64-bit literal constant operands (PR #180387)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix instruction size for 64-bit literal constant operands (PR #180387)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix instruction size for 64-bit literal constant operands (PR #180387)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix instruction size for 64-bit literal constant operands (PR #180387)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Clean up VOP3PWMMA_Profile by removing XF32 related stuff (PR #180688)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Clean up VOP3PWMMA_Profile by removing XF32 related stuff (PR #180688)   Shilei Tian via llvm-commits
• [libc] [llvm] [libc] Add RPC helpers for dispatching functions to the host (PR #179085)   Shilei Tian via llvm-commits
• [libc] [llvm] [libc] Add RPC helpers for dispatching functions to the host (PR #179085)   Shilei Tian via llvm-commits
• [libc] [llvm] [libc] Add RPC helpers for dispatching functions to the host (PR #179085)   Shilei Tian via llvm-commits
• [llvm] AMDGPU: Add more attributes to wait event intrinsics (PR #180825)   Shilei Tian via llvm-commits
• [llvm] AMDGPU: Add more attributes to wait event intrinsics (PR #180825)   Shilei Tian via llvm-commits
• [llvm] [InferAS] Infer the address space of inttoptr (PR #173244)   Shilei Tian via llvm-commits
• [llvm] Fix for issue #177696 (PR #181047)   Shilei Tian via llvm-commits
• [llvm] Fix for issue #177696 (PR #181047)   Shilei Tian via llvm-commits
• [clang] [llvm] [LoopUnroll] Add flag to enforce loop unroll pragma regardless of expensive trip count (PR #180961)   Shilei Tian via llvm-commits
• [llvm] [InferAS] Infer the address space of inttoptr (PR #173244)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix handling of setting register classes in MFMA scheduler rewrite stage (PR #181047)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix handling of setting register classes in MFMA scheduler rewrite stage (PR #181047)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix handling of setting register classes in MFMA scheduler rewrite stage (PR #181047)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix handling of setting register classes in MFMA scheduler rewrite stage (PR #181047)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix handling of setting register classes in MFMA scheduler rewrite stage (PR #181047)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Cgscc amdgpu attributor (PR #179719)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Cgscc amdgpu attributor (PR #179719)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Don't cluster DS-instrs together (PR #180908)   Shilei Tian via llvm-commits
• [llvm] [OCaml] Adding back OCaml Kaleidoscope tutorial (PR #181394)   Shivam Gupta via llvm-commits
• [llvm] [DebugInfo] Fix incorrect debug attribution for inlined allocas (PR #144345)   Shivam Kunwar via llvm-commits
• [llvm] [DebugInfo/DWARF] Fix data race in DWARFUnit DIE extraction (PR #180470)   Shivam Kunwar via llvm-commits
• [llvm] [X86] Optimized ADD + ADC to ADC (PR #173543)   Simi Pallipurath via llvm-commits
• [llvm] [X86] Allow handling of i128/256/512 SELECT on the FPU (PR #180197)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Allow handling of i128/256/512 SELECT on the FPU (PR #180197)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Fix lower1BitShuffle blend-with-zero shuffles to AND mask (PR #180472)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Fix lower1BitShuffle blend-with-zero shuffles to AND mask (PR #180472)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Fix lower1BitShuffle blend-with-zero shuffles to AND mask (PR #180472)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Fix lower1BitShuffle blend-with-zero shuffles to AND mask (PR #180472)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Fix lower1BitShuffle blend-with-zero shuffles to AND mask (PR #180472)   Simon Pilgrim via llvm-commits
• [llvm] [CAS] getInternalFileBackedObjectData - fix MSVC not all control paths return a value warning. NFC. (PR #180499)   Simon Pilgrim via llvm-commits
• [llvm] [CAS] getInternalFileBackedObjectData - fix MSVC not all control paths return a value warning. NFC. (PR #180499)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Allow handling of i128/256/512 SELECT on the FPU (PR #180197)   Simon Pilgrim via llvm-commits
• [llvm] [SLP] Use the correct identity when combining binary opcodes with AND/MUL (PR #180457)   Simon Pilgrim via llvm-commits
• [llvm] [CAS] getInternalFileBackedObjectData - fix MSVC not all control paths return a value warning. NFC. (PR #180499)   Simon Pilgrim via llvm-commits
• [llvm] [X86] i512 shift expansion on AVX512 targets (PR #180432)   Simon Pilgrim via llvm-commits
• [llvm] [X86] i512 shift expansion on AVX512 targets (PR #180432)   Simon Pilgrim via llvm-commits
• [llvm] [X86] i512 shift expansion on AVX512 targets (PR #180432)   Simon Pilgrim via llvm-commits
• [llvm] [X86] i512 shift expansion on AVX512 targets (PR #180432)   Simon Pilgrim via llvm-commits
• [llvm] [CodeGen] Improve documentation for SUBREG_TO_REG (PR #180504)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine][X86] Add test coverage for #161980 (PR #180508)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine][X86] Add test coverage for #161980 (PR #180508)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine][X86] Add test coverage for #161980 (PR #180508)   Simon Pilgrim via llvm-commits
• [llvm] sketch idea of getConstantBuildVector (PR #180074)   Simon Pilgrim via llvm-commits
• [llvm] sketch idea of getConstantBuildVector (PR #180074)   Simon Pilgrim via llvm-commits
• [llvm] [CostModel][X86] getShuffleCost - SK_Transpose v4f64/v4i64 matches UNPCK - don't generalise to SK_PermuteTwoSrc (PR #180514)   Simon Pilgrim via llvm-commits
• [llvm] [CostModel][X86] getShuffleCost - SK_Transpose v4f64/v4i64 matches UNPCK - don't generalise to SK_PermuteTwoSrc (PR #180514)   Simon Pilgrim via llvm-commits
• [llvm] [CostModel][X86] getShuffleCost - SK_Transpose v4f64/v4i64 matches UNPCK - don't generalise to SK_PermuteTwoSrc (PR #180514)   Simon Pilgrim via llvm-commits
• [llvm] [CostModel][X86] getShuffleCost - SK_Transpose v4f64/v4i64 matches UNPCK - don't generalise to SK_PermuteTwoSrc (PR #180514)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Fold expand(splat,passthrough,mask) -> select(splat,passthrough,mask) (PR #180238)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Fold expand(splat,passthrough,mask) -> select(splat,passthrough,mask) (PR #180238)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Fold expand(splat,passthrough,mask) -> select(splat,passthrough,mask) (PR #180238)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Fold expand(splat,passthrough,mask) -> select(splat,passthrough,mask) (PR #180238)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Fold expand(splat,passthrough,mask) -> select(splat,passthrough,mask) (PR #180238)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] SelectionDAGBuilder::visitShuffleVector - split shuffle(concat(x,y),undef,mask) -> shuffle(x,y,mask) patterns (PR #180573)   Simon Pilgrim via llvm-commits
• [llvm] [X86] i512 shift expansion on AVX512 targets (PR #180432)   Simon Pilgrim via llvm-commits
• [llvm] [X86] i512 shift expansion on AVX512 targets (PR #180432)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Fix lower1BitShuffle blend-with-zero shuffles to AND mask (PR #180472)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Fix lower1BitShuffle blend-with-zero shuffles to AND mask (PR #180472)   Simon Pilgrim via llvm-commits
• [llvm] [SLP]Support for zext i1 %x modeling as select %x, 1, 0 (PR #180635)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Fixed flags issue of onlyZeroFlagUsed (PR #180405)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add tests showing failure to reduce the vector width of vpmaddwd/vpmaddubsw nodes (PR #180728)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add tests showing failure to reduce the vector width of vpmaddwd/vpmaddubsw nodes (PR #180728)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add tests showing failure to reduce the vector width of vpmaddwd/vpmaddubsw nodes (PR #180728)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add tests showing failure to reduce the vector width of vpmaddwd/vpmaddubsw/pmulhrsw nodes (PR #180728)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add tests showing failure to reduce the vector width of vpmaddwd/vpmaddubsw/pmulhrsw nodes (PR #180728)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add tests showing failure to reduce the vector width of vpmaddwd/vpmaddubsw/pmulhrsw nodes (PR #180728)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add tests showing failure to reduce the vector width of vpmaddwd/vpmaddubsw/pmulhrsw nodes (PR #180728)   Simon Pilgrim via llvm-commits
• [llvm] [Thumb2] mve-shuffle.ll - add missing check prefix coverage for some fullfp16 cases (PR #180567)   Simon Pilgrim via llvm-commits
• [llvm] [Thumb2] mve-shuffle.ll - add missing check prefix coverage for some fullfp16 cases (PR #180567)   Simon Pilgrim via llvm-commits
• [llvm] [Thumb2] mve-shuffle.ll - add missing check prefix coverage for some fullfp16 cases (PR #180567)   Simon Pilgrim via llvm-commits
• [llvm] [X86] SimplifyDemandedVectorEltsForTargetNode - add handling for vpmaddwd/vpmaddubsw/vpmulhrsw vector width reduction (PR #180738)   Simon Pilgrim via llvm-commits
• [llvm] [X86] SimplifyDemandedVectorEltsForTargetNode - add handling for vpmaddwd/vpmaddubsw/vpmulhrsw vector width reduction (PR #180738)   Simon Pilgrim via llvm-commits
• [llvm] [X86] SimplifyDemandedVectorEltsForTargetNode - add handling for vpmaddwd/vpmaddubsw/vpmulhrsw vector width reduction (PR #180738)   Simon Pilgrim via llvm-commits
• [llvm] [instcombine][x86]: simplifyx86fpmaxmin - allow negzero for single operand (PR #180418)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Fix lower1BitShuffle blend-with-zero shuffles to AND mask (PR #180472)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Make sure demanded lanes for AND/MUL-by-zero are frozen (PR #180727)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Make sure demanded lanes for AND/MUL-by-zero are frozen (PR #180727)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Make sure demanded lanes for AND/MUL-by-zero are frozen (PR #180727)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Make sure demanded lanes for AND/MUL-by-zero are frozen (PR #180727)   Simon Pilgrim via llvm-commits
• [llvm] [Mips] Fix cttz.i32 fails to lower on mips16 (PR #179633)   Simon Pilgrim via llvm-commits
• [llvm] [Mips] Fix cttz.i32 fails to lower on mips16 (PR #179633)   Simon Pilgrim via llvm-commits
• [llvm] [Mips] Fix cttz.i32 fails to lower on mips16 (PR #179633)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Optimized ADD + ADC to ADC (PR #173543)   Simon Pilgrim via llvm-commits
• [llvm] [DAGCombiner] Fold trunc(build_vector(ext(x), ext(x)) -> build_vector(x,x) (PR #179857)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] SelectionDAGBuilder::visitShuffleVector - split shuffle(concat(x,y),undef,mask) -> shuffle(x,y,mask) patterns (PR #180573)   Simon Pilgrim via llvm-commits
• [llvm] [DAGCombiner] Fix subvector extraction index for big-endian STLF (PR #180795)   Simon Pilgrim via llvm-commits
• [llvm] [DAGCombiner] Fix subvector extraction index for big-endian STLF (PR #180795)   Simon Pilgrim via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Simon Pilgrim via llvm-commits
• [llvm] [NewPM] Port x86-issue-vzero-upper (PR #180886)   Simon Pilgrim via llvm-commits
• [llvm] [SLP]Support for zext i1 %x modeling as select %x, 1, 0 (PR #180635)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Make sure demanded lanes for AND/MUL-by-zero are frozen (PR #180727)   Simon Pilgrim via llvm-commits
• [llvm] [SLP] Use static_assert() rather than assert() where possible (PR #180867)   Simon Pilgrim via llvm-commits
• [llvm] sketch idea of getConstantBuildVector (PR #180074)   Simon Pilgrim via llvm-commits
• [llvm] sketch idea of getConstantBuildVector (PR #180074)   Simon Pilgrim via llvm-commits
• [llvm] sketch idea of getConstantBuildVector (PR #180074)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] SelectionDAGBuilder::visitShuffleVector - split shuffle(concat(x,y),undef,mask) -> shuffle(x,y,mask) patterns (PR #180573)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Move getTargetVShift helpers earlier in the source file. NFC. (PR #180972)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Move getTargetVShift helpers earlier in the source file. NFC. (PR #180972)   Simon Pilgrim via llvm-commits
• [llvm] [SDAG] SetCC: remove spurious extensions (PR #173110)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Move getTargetVShift helpers earlier in the source file. NFC. (PR #180972)   Simon Pilgrim via llvm-commits
• [llvm] [DAGCombiner] Fix subvector extraction index for big-endian STLF (PR #180795)   Simon Pilgrim via llvm-commits
• [llvm] [DAGCombiner] Fix subvector extraction index for big-endian STLF (PR #180795)   Simon Pilgrim via llvm-commits
• [llvm] [InstCombine] SimplifyDemandedBits: add basic bitcast handling, Fixes #173780 (PR #173865)   Simon Pilgrim via llvm-commits
• [llvm] [InstCombine] SimplifyDemandedBits: add basic bitcast handling, Fixes #173780 (PR #173865)   Simon Pilgrim via llvm-commits
• [llvm] [DAGCombiner] Fix subvector extraction index for big-endian STLF (PR #180795)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Make sure demanded lanes for AND/MUL-by-zero are frozen (PR #180727)   Simon Pilgrim via llvm-commits
• [llvm] [DAGCombiner] Fix subvector extraction index for big-endian STLF (PR #180795)   Simon Pilgrim via llvm-commits
• [llvm] [SLP] Use the correct identity when combining binary opcodes with AND/MUL (PR #180457)   Simon Pilgrim via llvm-commits
• [llvm] [DAGCombiner] Fix crash caused by illegal InterVT in ForwardStoreValueToDirectLoad (PR #181175)   Simon Pilgrim via llvm-commits
• [llvm] [DAGCombiner] Fix crash caused by illegal InterVT in ForwardStoreValueToDirectLoad (PR #181175)   Simon Pilgrim via llvm-commits
• [llvm] [SLP]Initial compatibility support for shl v, 1 and add v, v (PR #181168)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Avoid lowering `llrint` via x87 on non-x87 targets (PR #181339)   Simon Pilgrim via llvm-commits
• [llvm] [X86] i512 shift expansion on AVX512 targets (PR #180432)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Avoid custom lowering `llrint` on non-x87 targets (PR #181339)   Simon Pilgrim via llvm-commits
• [llvm] [X86] i512 shift expansion on AVX512 targets (PR #180432)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Avoid custom lowering `llrint` on non-x87 targets (PR #181339)   Simon Pilgrim via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] Sync multiversion cpu subtypes and vendors with libgcc and refactor internal cpu type tables (PR #171172)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Avoid custom lowering `llrint` on non-x87 targets (PR #181339)   Simon Pilgrim via llvm-commits
• [llvm] [WIP][X86] combineX86ShufflesRecursively - attempt to combine shuffles with larger types from EXTRACT_SUBVECTOR nodes (PR #133947)   Simon Pilgrim via llvm-commits
• [llvm] [ARM] support `r14` as an alias for `lr` (PR #179740)   Simon Tatham via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Simon Tatham via llvm-commits
• [llvm] [MC][ARM] Don't set funcs to Thumb as a side effect of .hidden (PR #181156)   Simon Tatham via llvm-commits
• [llvm] [InstCombine] fold `gepi _, (srem x, y)` to `gepi _, (urem x, y)` if `y` is power-of-2 (PR #180148)   Simonas Kazlauskas via llvm-commits
• [llvm] [InstCombine] fold `gepi _, (srem x, y)` to `gepi _, (urem x, y)` if `y` is power-of-2 (PR #180148)   Simonas Kazlauskas via llvm-commits
• [flang] [llvm] [flang-rt] Implement basic support for I/O from OpenMP GPU Offloading (PR #181039)   Slava Zakharin via llvm-commits
• [llvm] [LTO] Refactor LTO link optimization remarks handling using RAII (NFC) (PR #181269)   Snehasish Kumar via llvm-commits
• [llvm] [AMDGPU] Non convergent readfirstlane does not depend on EXEC. NFCI. (PR #179821)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Non convergent readfirstlane does not depend on EXEC. NFCI. (PR #179821)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Non convergent instruction does not depend on EXEC. NFCI. (PR #179821)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Allow hoisting of V_READFIRSTLANE_B32 for uniform operand (PR #178312)   Stanislav Mekhanoshin via llvm-commits
• [llvm] Add "noconvergent" flag to MachineInstr::print() (PR #180818)   Stanislav Mekhanoshin via llvm-commits
• [llvm] Add "noconvergent" flag to MachineInstr::print() (PR #180818)   Stanislav Mekhanoshin via llvm-commits
• [llvm] Add "noconvergent" flag to MachineInstr::print() (PR #180818)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Allow hoisting of V_READFIRSTLANE_B32 for uniform operand (PR #178312)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Allow hoisting of V_READFIRSTLANE_B32 for uniform operand (PR #178312)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Disable VALU sinking and hoisting with WWM (PR #180028)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Disable VALU sinking and hoisting with WWM (PR #180028)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Allow allocation of lo128 registers from all banks (PR #172614)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Allow allocation of lo128 registers from all banks (PR #172614)   Stanislav Mekhanoshin via llvm-commits
• [clang] [llvm] [AMDGPU] Change 9 SWMMAC builtins to use 64-bit index (PR #181246)   Stanislav Mekhanoshin via llvm-commits
• [llvm] AMDGPU: Libcall expand fast pow/powr/pown/rootn for float case (PR #180553)   Steffen Larsen via llvm-commits
• [llvm] AMDGPU: Libcall expand fast pow/powr/pown/rootn for float case (PR #180553)   Steffen Larsen via llvm-commits
• [llvm] AMDGPU: Libcall expand fast pow/powr/pown/rootn for float case (PR #180553)   Steffen Larsen via llvm-commits
• [llvm] AMDGPU: Libcall expand fast pow/powr/pown/rootn for float case (PR #180553)   Steffen Larsen via llvm-commits
• [llvm] AMDGPU: Libcall expand fast pow/powr/pown/rootn for float case (PR #180553)   Steffen Larsen via llvm-commits
• [llvm] AMDGPU: Libcall expand fast pow/powr/pown/rootn for float case (PR #180553)   Steffen Larsen via llvm-commits
• [llvm] [Verifier] Make verifier fail when global variable size exceeds address space size (PR #179625)   Steffen Larsen via llvm-commits
• [llvm] [AMDGPU] Add half vector support for table-driven libcall optimization (PR #178638)   Steffen Larsen via llvm-commits
• [llvm] [AMDGPU] Add half vector support for table-driven libcall optimization (PR #178638)   Steffen Larsen via llvm-commits
• [llvm] [AMDGPU] Add half vector support for table-driven libcall optimization (PR #178638)   Steffen Larsen via llvm-commits
• [llvm] [AMDGPU] Add half vector support for table-driven libcall optimization (PR #178638)   Steffen Larsen via llvm-commits
• [llvm] AMDGPU: Libcall expand fast pow/powr/pown/rootn for float case (PR #180553)   Steffen Larsen via llvm-commits
• [llvm] [DAGCombiner] Combine (fshl A, B, S) | (fshr C, D, BW-S) --> (fshl (A|C), (B|D), S) (PR #180889)   Steffen Larsen via llvm-commits
• [llvm] [SPIRV] Scalarize single-element vectors in type creation (PR #180735)   Steven Perron via llvm-commits
• [llvm] [IROutliner] Add TTI Hook for Propagating Attributes (PR #153985)   Sudharsan Veeravalli via llvm-commits
• [llvm] [IROutliner] Add TTI Hook for Propagating Attributes (PR #153985)   Sudharsan Veeravalli via llvm-commits
• [llvm] [IROutliner] Add TTI Hook for Propagating Attributes (PR #153985)   Sudharsan Veeravalli via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Add register bank legalization rules for buffer atomic min max (PR #180975)   Syadus Sefat via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Add register bank legalization rules for buffer atomic int min max (PR #180975)   Syadus Sefat via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Add register bank legalization rules for buffer atomic int min max (PR #180975)   Syadus Sefat via llvm-commits
• [llvm] [DTLTO][Windows] Expand short 8.3 form paths in ThinLTO module IDs (PR #178303)   Teresa Johnson via llvm-commits
• [llvm] [DTLTO][Windows] Expand short 8.3 form paths in ThinLTO module IDs (PR #178303)   Teresa Johnson via llvm-commits
• [llvm] [DTLTO][Windows] Expand short 8.3 form paths in ThinLTO module IDs (PR #178303)   Teresa Johnson via llvm-commits
• [clang] [lld] [llvm] [LTO][LLD] Prevent invalid LTO libfunc transforms (PR #164916)   Teresa Johnson via llvm-commits
• [clang] [lld] [llvm] [LTO][LLD] Prevent invalid LTO libfunc transforms (PR #164916)   Teresa Johnson via llvm-commits
• [clang] [lld] [llvm] [LTO][LLD] Prevent invalid LTO libfunc transforms (PR #164916)   Teresa Johnson via llvm-commits
• [clang] [lld] [llvm] [LTO][LLD] Prevent invalid LTO libfunc transforms (PR #164916)   Teresa Johnson via llvm-commits
• [clang] [lld] [llvm] [LTO][LLD] Prevent invalid LTO libfunc transforms (PR #164916)   Teresa Johnson via llvm-commits
• [clang] [lld] [llvm] [LTO][LLD] Prevent invalid LTO libfunc transforms (PR #164916)   Teresa Johnson via llvm-commits
• [llvm] [DTLTO][Windows] Expand short 8.3 form paths in ThinLTO module IDs (PR #178303)   Teresa Johnson via llvm-commits
• [llvm] [DTLTO][Windows] Expand short 8.3 form paths in ThinLTO module IDs (PR #178303)   Teresa Johnson via llvm-commits
• [llvm] [DTLTO][Windows] Expand short 8.3 form paths in ThinLTO module IDs (PR #178303)   Teresa Johnson via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Teresa Johnson via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Teresa Johnson via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Teresa Johnson via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Teresa Johnson via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Teresa Johnson via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Teresa Johnson via llvm-commits
• [llvm] [NFC] `const`-ify argument in `promoteInternals` (readability) (PR #181079)   Teresa Johnson via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   Teresa Johnson via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   Teresa Johnson via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   Teresa Johnson via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   Teresa Johnson via llvm-commits
• [llvm] [MemProf] Emit richer optimization remarks for single-type allocations (PR #181089)   Teresa Johnson via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Teresa Johnson via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Teresa Johnson via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   Teresa Johnson via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   Teresa Johnson via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   Teresa Johnson via llvm-commits
• [llvm] [LTO] Refactor LTO link optimization remarks handling using RAII (NFC) (PR #181269)   Teresa Johnson via llvm-commits
• [clang] [llvm] [Clang][Lexer] Reland "Detect SSE4.2 availability at runtime in fastParseASCIIIdentifier" (PR #180631)   Thibault Monnier via llvm-commits
• [clang] [llvm] [Clang][Lexer] Reland "Detect SSE4.2 availability at runtime in fastParseASCIIIdentifier" (PR #180631)   Thibault Monnier via llvm-commits
• [clang] [llvm] [Clang][Lexer] Reland "Detect SSE4.2 availability at runtime in fastParseASCIIIdentifier" (PR #180631)   Thibault Monnier via llvm-commits
• [clang] [llvm] [Clang][Lexer] Reland "Detect SSE4.2 availability at runtime in fastParseASCIIIdentifier" (PR #180631)   Thibault Monnier via llvm-commits
• [clang] [llvm] [Clang][Lexer] Reland "Detect SSE4.2 availability at runtime in fastParseASCIIIdentifier" (PR #180631)   Thibault Monnier via llvm-commits
• [llvm] [ADT][NFC] Remove `else` after `return` in APSInt.h (PR #180790)   Thibault Monnier via llvm-commits
• [clang] [llvm] [Clang][Lexer] Reland "Detect SSE4.2 availability at runtime in fastParseASCIIIdentifier" (PR #180631)   Thibault Monnier via llvm-commits
• [clang] [clang-tools-extra] [llvm] [clang-tidy] New check `misc-header-guard` (PR #177315)   Thorsten Klein via llvm-commits
• [llvm] [msan] Switch switch() from strict handling to (icmp eq)-style handling (PR #179851)   Thurston Dang via llvm-commits
• [llvm] Reapply "[msan] Switch switch() from strict handling to (icmp eq)-style handling" (#180636) (PR #181112)   Thurston Dang via llvm-commits
• [llvm] Reapply "[msan] Switch switch() from strict handling to (icmp eq)-style handling" (#180636) (PR #181112)   Thurston Dang via llvm-commits
• [llvm] Reapply "[msan] Switch switch() from strict handling to (icmp eq)-style handling" (#180636) (PR #181112)   Thurston Dang via llvm-commits
• [llvm] Reapply "[msan] Switch switch() from strict handling to (icmp eq)-style handling" (#180636) (PR #181112)   Thurston Dang via llvm-commits
• [llvm] Reapply "[msan] Switch switch() from strict handling to (icmp eq)-style handling" (#180636) (PR #181112)   Thurston Dang via llvm-commits
• [llvm] Reapply "[msan] Switch switch() from strict handling to (icmp eq)-style handling" (#180636) (PR #181112)   Thurston Dang via llvm-commits
• [llvm] Reapply "[msan] Switch switch() from strict handling to (icmp eq)-style handling" (#180636) (PR #181112)   Thurston Dang via llvm-commits
• [llvm] Reapply "[msan] Switch switch() from strict handling to (icmp eq)-style handling" (#180636) (PR #181112)   Thurston Dang via llvm-commits
• [llvm] [Option] Fix param name mismatch & coding style (NFC) (PR #180746)   Tim Gymnich via llvm-commits
• [llvm] [GlobalISel] Fix type mismatch in LegalizerHelper ternary (PR #180865)   Tim Gymnich via llvm-commits
• [llvm] [Option] Fix param name mismatch & coding style (NFC) (PR #180746)   Tim Gymnich via llvm-commits
• [llvm] [ADT] Add is_sorted_constexpr, equivalent to C++20 std::is_sorted (PR #180867)   Tim Gymnich via llvm-commits
• [llvm] [AMDGPU][Scheduler] Fix inconsistent MI slots after rematerialization revert (PR #180646)   Timm Baeder via llvm-commits
• [llvm] [AMDGPU] Add missing assert requirement to unit test (PR #181102)   Timm Baeder via llvm-commits
• [llvm] workflows/release-task: Use less privileged token for uploading release notes (#180299) (PR #180650)   Tom Stellard via llvm-commits
• [llvm] workflows/release-task: Use less privileged token for uploading release notes (#180299) (PR #180650)   Tom Stellard via llvm-commits
• [llvm] workflows/release-binaries: Pass missing release-version input to upload-release-artifact (PR #180879)   Tom Stellard via llvm-commits
• [llvm] Update requirements_formatting.txt.in (PR #180963)   Tom Stellard via llvm-commits
• [llvm] workflows/release-documentation: Add release environment (PR #181063)   Tom Stellard via llvm-commits
• [llvm] workflows: Use main-branch-only environment when using ISSUE_SUBSCRIBER_TOKEN (PR #179990)   Tom Stellard via llvm-commits
• [llvm] workflows/commit-access-reivew: Use concurrency to speed up script (PR #181204)   Tom Stellard via llvm-commits
• [llvm] workflows/commit-access-review: Use a GitHub App access token instead of llvmbot (PR #179364)   Tom Stellard via llvm-commits
• [llvm] workflows/commit-access-reivew: Use concurrency to speed up script (PR #181204)   Tom Stellard via llvm-commits
• [llvm] workflows/release-documentation: Add release environment (PR #181063)   Tom Stellard via llvm-commits
• [llvm] workflows/release-documentation: Add release environment (PR #181063)   Tom Stellard via llvm-commits
• [llvm] [Github] Update requirements_formatting.txt (PR #181184)   Tom Stellard via llvm-commits
• [llvm] Revert "workflows: Use main-branch-only environment when using ISSUE_SUBSCRIBER_TOKEN (#179990)" (PR #181352)   Tom Stellard via llvm-commits
• [llvm] Revert "workflows: Use main-branch-only environment when using ISSUE_SUBSCRIBER_TOKEN (#179990)" (PR #181352)   Tom Stellard via llvm-commits
• [llvm] Revert "workflows: Use main-branch-only environment when using ISSUE_SUBSCRIBER_TOKEN (#179990)" (PR #181352)   Tom Stellard via llvm-commits
• [llvm] workflows/commit-access-review: Use a GitHub App access token instead of llvmbot (PR #179364)   Tom Stellard via llvm-commits
• [llvm] Allow DWARF expressions to refer to variable values (PR #181028)   Tom Tromey via llvm-commits
• [llvm] [llvm][DebugInfo] Allow anonymous basic types (PR #180016)   Tom Tromey via llvm-commits
• [llvm] [llvm][DebugInfo] Allow anonymous basic types (PR #180016)   Tom Tromey via llvm-commits
• [llvm] [TLI] Add isLegalNTStore/Load hook (PR #177936)   Tomer Shafir via llvm-commits
• [llvm] [TLI] Add isLegalNTStore/Load hook (PR #177936)   Tomer Shafir via llvm-commits
• [llvm] [AArch64] Lower factor-of-2 interleaved stores to STNP (PR #177938)   Tomer Shafir via llvm-commits
• [llvm] [AArch64] Lower factor-of-2 interleaved stores to STNP (PR #177938)   Tomer Shafir via llvm-commits
• [llvm] [AArch64] Lower factor-of-2 interleaved stores to STNP (PR #177938)   Tomer Shafir via llvm-commits
• [llvm] [AArch64] Lower factor-of-2 interleaved stores to STNP (PR #177938)   Tomer Shafir via llvm-commits
• [llvm] [AArch64] Lower factor-of-2 interleaved stores to STNP (PR #177938)   Tomer Shafir via llvm-commits
• [llvm] [AArch64] Lower factor-of-2 interleaved stores to STNP (PR #177938)   Tomer Shafir via llvm-commits
• [llvm] [AArch64] Lower factor-of-2 interleaved stores to STNP (PR #177938)   Tomer Shafir via llvm-commits
• [llvm] [AArch64] Lower factor-of-2 interleaved stores to STNP (PR #177938)   Tomer Shafir via llvm-commits
• [llvm] [AArch64] Lower factor-of-2 interleaved stores to STNP (PR #177938)   Tomer Shafir via llvm-commits
• [llvm] [AArch64] Lower factor-of-2 interleaved stores to STNP (PR #177938)   Tomer Shafir via llvm-commits
• [llvm] [llvm-mc-assemble-fuzzer] Fix Triple passing (PR #181135)   Tomer Shafir via llvm-commits
• [llvm] [llvm-mc-assemble-fuzzer] Fix Triple passing (PR #181135)   Tomer Shafir via llvm-commits
• [llvm] [llvm-mc-assemble-fuzzer] Fix Triple passing (PR #181135)   Tomer Shafir via llvm-commits
• [llvm] [llvm-mc-assemble-fuzzer] Fix Triple passing (PR #181135)   Tomer Shafir via llvm-commits
• [llvm] [X86] Correctly call 16 byte atomic helpers on x86_64 Windows (PR #181356)   Tomohiro Kashiwada via llvm-commits
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• [llvm] Fix for issue #177696 (PR #181047)   Tony Linthicum via llvm-commits
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• [llvm] Fix for issue #177696 (PR #181047)   Tony Linthicum via llvm-commits
• [llvm] Fix for issue #177696 (PR #181047)   Tony Linthicum via llvm-commits
• [llvm] Fix for issue #177696 (PR #181047)   Tony Linthicum via llvm-commits
• [llvm] Fix for issue #177696 (PR #181047)   Tony Linthicum via llvm-commits
• [llvm] Fix for issue #177696 (PR #181047)   Tony Linthicum via llvm-commits
• [llvm] Fix for issue #177696 (PR #181047)   Tony Linthicum via llvm-commits
• [llvm] Reenable sched mfma rewrite (PR #180751)   Tony Linthicum via llvm-commits
• [llvm] Reenable sched mfma rewrite (PR #180751)   Tony Linthicum via llvm-commits
• [llvm] Reenable sched mfma rewrite (PR #180751)   Tony Linthicum via llvm-commits
• [llvm] [AMDGPU] Fix handling of setting register classes in MFMA scheduler rewrite stage (PR #181047)   Tony Linthicum via llvm-commits
• [llvm] [AMDGPU] Fix handling of setting register classes in MFMA scheduler rewrite stage (PR #181047)   Tony Linthicum via llvm-commits
• [llvm] [AMDGPU] Fix handling of setting register classes in MFMA scheduler rewrite stage (PR #181047)   Tony Linthicum via llvm-commits
• [llvm] [SystemZ] Handle indirect symbols (PR #180815)   Tony Tao via llvm-commits
• [llvm] [SystemZ] Handle indirect symbols (PR #180815)   Tony Tao via llvm-commits
• [llvm] [SystemZ] Handle indirect symbols (PR #180815)   Tony Tao via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Tony Varghese via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Tony Varghese via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Tony Varghese via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Tony Varghese via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Tony Varghese via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Tony Varghese via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Tony Varghese via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Tony Varghese via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Tony Varghese via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Tony Varghese via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Tony Varghese via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Tony Varghese via llvm-commits
• [compiler-rt] [sanitizer_common] Implement address sanitizer on AIX: platform specific support (PR #131866)   Tony Varghese via llvm-commits
• [compiler-rt] [sanitizer_common] Implement address sanitizer on AIX: platform specific support (PR #131866)   Tony Varghese via llvm-commits
• [compiler-rt] [sanitizer_common] Implement address sanitizer on AIX: platform specific support (PR #131866)   Tony Varghese via llvm-commits
• [compiler-rt] [sanitizer_common] Implement address sanitizer on AIX: platform specific support (PR #131866)   Tony Varghese via llvm-commits
• [llvm] [PowerPC] Add support for MSGSNDP instruction (PR #180974)   Tony Varghese via llvm-commits
• [llvm] [PowerPC] Add support for MSGSNDP instruction (PR #180974)   Tony Varghese via llvm-commits
• [llvm] [PowerPC] Add support for MSGSNDP instruction (PR #180974)   Tony Varghese via llvm-commits
• [llvm] [SystemZ] Handle indirect symbols (PR #180815)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Handle indirect symbols (PR #180815)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Handle indirect symbols (PR #180815)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Handle indirect symbols (PR #180815)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Handle indirect symbols (PR #180815)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Handle indirect symbols (PR #180815)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Handle indirect symbols (PR #180815)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Handle indirect symbols (PR #180815)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Handle indirect symbols (PR #180815)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Handle indirect symbols (PR #180815)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Handle indirect symbols (PR #180815)   Ulrich Weigand via llvm-commits
• [clang] [llvm] [SystemZ][z/OS] Migrate most test case to use HLASM syntax (PR #181222)   Ulrich Weigand via llvm-commits
• [clang] [llvm] [SystemZ][z/OS] Migrate most test case to use HLASM syntax (PR #181222)   Ulrich Weigand via llvm-commits
• [clang] [llvm] [SystemZ][z/OS] Migrate most test case to use HLASM syntax (PR #181222)   Ulrich Weigand via llvm-commits
• [flang] [llvm] [flang][cuda] Add CUFSetAssociatedStream entry point (PR #181313)   Valentin Clement バレンタイン クレメン via llvm-commits
• [flang] [llvm] [flang][cuda] Add CUFSetAssociatedStream entry point (PR #181313)   Valentin Clement バレンタイン クレメン via llvm-commits
• [flang] [llvm] [flang][cuda] Add CUFSetAssociatedStream entry point (PR #181313)   Valentin Clement バレンタイン クレメン via llvm-commits
• [flang] [llvm] [flang][cuda] Add CUFSetAssociatedStream entry point (PR #181313)   Valentin Clement バレンタイン クレメン via llvm-commits
• [flang] [llvm] [flang][cuda] Add CUFSetAssociatedStream entry point (PR #181313)   Valentin Clement バレンタイン クレメン via llvm-commits
• [llvm] [VectorCombine] Fold (icmp eq/ne (reduce.add X), 0) to reduce.umax (PR #180001)   Valeriy Savchenko via llvm-commits
• [llvm] [AMDGPU] Use V_FMAC_F64 in "if (cond) a -= c" (PR #168710)   Valery Pykhtin via llvm-commits
• [llvm] [AArch64] Codegen for AArch64 Return Address Signing Hardening (PR #176187)   Victor Campos via llvm-commits
• [llvm] [AArch64] Codegen for AArch64 Return Address Signing Hardening (PR #176187)   Victor Campos via llvm-commits
• [llvm] [AArch64] Codegen for AArch64 Return Address Signing Hardening (PR #176187)   Victor Campos via llvm-commits
• [llvm] [AArch64] Codegen for AArch64 Return Address Signing Hardening (PR #176187)   Victor Campos via llvm-commits
• [llvm] Remove reference to catapult's github repository (PR #181368)   Victor Vianna via llvm-commits
• [llvm] [AMDGPU] Fix VGPR to SGPR copy for inline asm with SGPR constraint (PR #176330)   Vigneshwar Jayakumar via llvm-commits
• [libc] [llvm] Refactor bf16addf to header only (PR #181230)   Viktor Moros via llvm-commits
• [libc] [llvm] Refactor bf16addf to header only (PR #181230)   Viktor Moros via llvm-commits
• [libc] [llvm] Refactor bf16addf to header only (PR #181230)   Viktor Moros via llvm-commits
• [libc] [llvm] Refactor bf16addf to header only (PR #181230)   Viktor Moros via llvm-commits
• [libc] [llvm] Refactor bf16addf to header only (PR #181230)   Viktor Moros via llvm-commits
• [libc] [llvm] Refactor bf16addf to header only (PR #181230)   Viktor Moros via llvm-commits
• [libc] [llvm] Refactor bf16addf to header only (PR #181230)   Viktor Moros via llvm-commits
• [compiler-rt] [ASan/sanitizers] Make stack unwinding better on Windows. (PR #180205)   Vitaly Buka via llvm-commits
• [compiler-rt] [ASan] Fix crash in __asan_region_is_poisoned at application memory boundaries (PR #180223)   Vitaly Buka via llvm-commits
• [compiler-rt] [compiler-rt][common] Only unmap stacks the runtime has actually mapped (PR #179000)   Vitaly Buka via llvm-commits
• [lld] Revert "[ELF] Add target-specific relocation scanning for x86" (PR #181274)   Vitaly Buka via llvm-commits
• [lld] Revert "[ELF] Add target-specific relocation scanning for x86" (PR #181274)   Vitaly Buka via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for x86 (PR #178846)   Vitaly Buka via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Vlad Serebrennikov via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Vlad Serebrennikov via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [lld] [llvm] [NFC] Fix tests with invalid RUN directives (PR #179668)   Vladimir Vuksanovic via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [lld] [llvm] [NFC] Fix tests with invalid RUN directives (PR #179668)   Vladimir Vuksanovic via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [lld] [llvm] [NFC] Fix tests with invalid RUN directives (PR #179668)   Vladimir Vuksanovic via llvm-commits
• [clang] [llvm] [llvm][DebugInfo] Avoid attaching retained nodes to unrelated subprograms in DIBuilder (PR #180294)   Vladislav Dzhidzhoev via llvm-commits
• [clang] [llvm] [llvm][DebugInfo] Avoid attaching retained nodes to unrelated subprograms in DIBuilder (PR #180294)   Vladislav Dzhidzhoev via llvm-commits
• [clang] [llvm] [llvm][DebugInfo] Avoid attaching retained nodes to unrelated subprograms in DIBuilder (PR #180294)   Vladislav Dzhidzhoev via llvm-commits
• [clang] [llvm] [llvm][DebugInfo] Avoid attaching retained nodes to unrelated subprograms in DIBuilder (PR #180294)   Vladislav Dzhidzhoev via llvm-commits
• [llvm] Fix Bazel build for b20d7d0 (PR #181157)   Walter Lee via llvm-commits
• [llvm] [NFC] Fix typos 'bicast' -> 'bitcast' (PR #180890)   Wang Yaduo via llvm-commits
• [llvm] [NFC] Fix typos 'bicast' -> 'bitcast' (PR #180890)   Wang Yaduo via llvm-commits
• [llvm] [NFC] Fix typos 'bicast' -> 'bitcast' (PR #180890)   Wang Yaduo via llvm-commits
• [llvm] [NFCI][Coroutines] update tests to autogenerated formatting (PR #178358)   Weibo He via llvm-commits
• [llvm] [NFCI][Coroutines] update tests to autogenerated formatting (PR #178358)   Weibo He via llvm-commits
• [llvm] [NFCI][Coroutines] update tests to autogenerated formatting (PR #178358)   Weibo He via llvm-commits
• [llvm] [NFCI][Coroutines] update tests to autogenerated formatting (PR #178358)   Weibo He via llvm-commits
• [llvm] [NFCI][Coroutines] update tests to autogenerated formatting (PR #178358)   Weibo He via llvm-commits
• [llvm] [NFC] Fix typos 'bicast' -> 'bitcast' (PR #180890)   Wenju He via llvm-commits
• [clang] [clang-tools-extra] [llvm] [LLVM][CLANG] Update signal-handling behavior to comply with POSIX (PR #169340)   Xing Xue via llvm-commits
• [clang] [clang-tools-extra] [llvm] [LLVM][CLANG] Update signal-handling behavior to comply with POSIX (PR #169340)   Xing Xue via llvm-commits
• [clang] [clang-tools-extra] [llvm] [LLVM][CLANG] Update signal-handling behavior to comply with POSIX (PR #169340)   Xing Xue via llvm-commits
• [clang] [clang-tools-extra] [llvm] [LLVM][CLANG] Update signal-handling behavior to comply with POSIX (PR #169340)   Xing Xue via llvm-commits
• [clang] [clang-tools-extra] [llvm] [LLVM][CLANG] Update signal-handling behavior to comply with POSIX (PR #169340)   Xing Xue via llvm-commits
• [clang] [clang-tools-extra] [llvm] [LLVM][CLANG] Update signal-handling behavior to comply with POSIX (PR #169340)   Xing Xue via llvm-commits
• [clang] [clang-tools-extra] [llvm] [LLVM][CLANG] Update signal-handling behavior to comply with POSIX (PR #169340)   Xing Xue via llvm-commits
• [clang] [clang-tools-extra] [llvm] [LLVM][CLANG] Update signal-handling behavior to comply with POSIX (PR #169340)   Xing Xue via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf implementation to header-only in src/__support/math folder. (PR #178554)   Xinlong Chen via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf implementation to header-only in src/__support/math folder. (PR #178554)   Xinlong Chen via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf implementation to header-only in src/__support/math folder. (PR #178554)   Xinlong Chen via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf16 implementation to header-only in src/__support/math folder. (PR #178645)   Xinlong Chen via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf16 implementation to header-only in src/__support/math folder. (PR #178645)   Xinlong Chen via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf16 implementation to header-only in src/__support/math folder. (PR #178645)   Xinlong Chen via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf implementation to header-only in src/__support/math folder. (PR #178554)   Xinlong Chen via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf implementation to header-only in src/__support/math folder. (PR #178554)   Xinlong Chen via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf implementation to header-only in src/__support/math folder. (PR #178554)   Xinlong Chen via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf implementation to header-only in src/__support/math folder. (PR #178554)   Xinlong Chen via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf implementation to header-only in src/__support/math folder. (PR #178554)   Xinlong Chen via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf implementation to header-only in src/__support/math folder. (PR #178554)   Xinlong Chen via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf16 implementation to header-only in src/__support/math folder. (PR #178645)   Xinlong Chen via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf16 implementation to header-only in src/__support/math folder. (PR #178645)   Xinlong Chen via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf16 implementation to header-only in src/__support/math folder. (PR #178645)   Xinlong Chen via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf implementation to header-only in src/__support/math folder. (PR #178554)   Xinlong Chen via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf16 implementation to header-only in src/__support/math folder. (PR #178645)   Xinlong Chen via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf16 implementation to header-only in src/__support/math folder. (PR #178645)   Xinlong Chen via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf16 implementation to header-only in src/__support/math folder. (PR #178645)   Xinlong Chen via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf16 implementation to header-only in src/__support/math folder. (PR #178645)   Xinlong Chen via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf16 implementation to header-only in src/__support/math folder. (PR #178645)   Xinlong Chen via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf16 implementation to header-only in src/__support/math folder. (PR #178645)   Xinlong Chen via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf16 implementation to header-only in src/__support/math folder. (PR #178645)   Xinlong Chen via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf16 implementation to header-only in src/__support/math folder. (PR #178645)   Xinlong Chen via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf16 implementation to header-only in src/__support/math folder. (PR #178645)   Xinlong Chen via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf16 implementation to header-only in src/__support/math folder. (PR #178645)   Xinlong Chen via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf16 implementation to header-only in src/__support/math folder. (PR #178645)   Xinlong Chen via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf16 implementation to header-only in src/__support/math folder. (PR #178645)   Xinlong Chen via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf16 implementation to header-only in src/__support/math folder. (PR #178645)   Xinlong Chen via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf16 implementation to header-only in src/__support/math folder. (PR #178645)   Xinlong Chen via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf implementation to header-only in src/__support/math folder. (PR #178554)   Xinlong Chen via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf implementation to header-only in src/__support/math folder. (PR #178554)   Xinlong Chen via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf implementation to header-only in src/__support/math folder. (PR #178554)   Xinlong Chen via llvm-commits
• [clang] [llvm] [HLSL][DXIL] InterlockedOr and InterlockedOr64 builtins (PR #180804)   Yanzuo Liu via llvm-commits
• [llvm] [CHR] Skip regions containing convergent calls (PR #180882)   Yanzuo Liu via llvm-commits
• [llvm] [Hexagon] Support partial reduction intrinsics (PR #179797)   Yashas Andaluri via llvm-commits
• [llvm] [CHR] Skip regions containing convergent calls (PR #180882)   Yaxun Liu via llvm-commits
• [llvm] [AMDGPU] Split struct kernel arguments (PR #133786)   Yaxun Liu via llvm-commits
• [llvm] AMDGPU: share LDS budget logic and add experimental LDS buffering pass (PR #166388)   Yaxun Liu via llvm-commits
• [clang] [llvm] [AMDGPU] Extend __builtin_amdgcn_ds_bpermute argument types (PR #153501)   Yaxun Liu via llvm-commits
• [clang] [llvm] [AMDGPU] Extend __builtin_amdgcn_ds_bpermute argument types (PR #153501)   Yaxun Liu via llvm-commits
• [clang] [llvm] [AMDGPU] Extend __builtin_amdgcn_ds_bpermute argument types (PR #153501)   Yaxun Liu via llvm-commits
• [clang] [llvm] [AMDGPU] Extend __builtin_amdgcn_ds_bpermute argument types (PR #153501)   Yaxun Liu via llvm-commits
• [clang] [llvm] [AMDGPU] Extend __builtin_amdgcn_ds_bpermute argument types (PR #153501)   Yaxun Liu via llvm-commits
• [clang] [llvm] [AMDGPU] Extend __builtin_amdgcn_ds_bpermute argument types (PR #153501)   Yaxun Liu via llvm-commits
• [llvm] [InstCombine] Avoid overflow in `foldVecExtTruncToExtElt` (PR #180414)   Yingwei Zheng via llvm-commits
• [llvm] [ConstantRange] Expand makeAllowedICmpRegion to use samesign to give tighter range (PR #174355)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] fold `gepi _, (srem x, y)` to `gepi _, (urem x, y)` if `y` is power-of-2 (PR #180148)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] fold `gepi _, (srem x, y)` to `gepi _, (urem x, y)` if `y` is power-of-2 (PR #180148)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] fold `gepi _, (srem x, y)` to `gepi _, (urem x, y)` if `y` is power-of-2 (PR #180148)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold ((X + AddC) & Mask) ^ Mask to ((Mask - AddC) - X) & Mask (PR #174278)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Support minimumnum/maximumnum (PR #180529)   Yingwei Zheng via llvm-commits
• [llvm] [ValueLattice][SCCP] Consider provenance for predicate-derived pointer constants (PR #160083)   Yingwei Zheng via llvm-commits
• [llvm] [ValueLattice][SCCP] Consider provenance for predicate-derived pointer constants (PR #160083)   Yingwei Zheng via llvm-commits
• [llvm] [ValueLattice][SCCP] Consider provenance for predicate-derived pointer constants (PR #160083)   Yingwei Zheng via llvm-commits
• [llvm] [ValueLattice][SCCP] Consider provenance for predicate-derived pointer constants (PR #160083)   Yingwei Zheng via llvm-commits
• [llvm] [llubi] Add initial support for llubi (PR #180022)   Yingwei Zheng via llvm-commits
• [llvm] Issue 180492 (PR #180596)   Yingwei Zheng via llvm-commits
• [llvm] Issue 180492 (PR #180596)   Yingwei Zheng via llvm-commits
• [llvm] Issue 180492 (PR #180596)   Yingwei Zheng via llvm-commits
• [llvm] Issue 180492 (PR #180596)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fix #163110: Fold icmp (shl X, L), (add (shl Y, L), 1<<L) to icmp X, (Y + 1) (PR #165975)   Yingwei Zheng via llvm-commits
• [llvm] Issue 180492 (PR #180596)   Yingwei Zheng via llvm-commits
• [llvm] [ConstraintElim] Infer linear constraints from udiv and urem (PR #180689)   Yingwei Zheng via llvm-commits
• [llvm] [ConstraintElim] Infer linear constraints from udiv and urem (PR #180689)   Yingwei Zheng via llvm-commits
• [llvm] [InstSimplify] Discard unnecessary `select` when the conditions are `ICmps` with EQ (PR #179183)   Yingwei Zheng via llvm-commits
• [llvm] [InstSimplify] Discard unnecessary `select` when the conditions are `ICmps` with EQ (PR #179183)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold shift of boolean zext to logic sequence (PR #180596)   Yingwei Zheng via llvm-commits
• [llvm] [llubi] Add UTC helper (PR #180603)   Yingwei Zheng via llvm-commits
• [llvm] [llubi] Add UTC helper (PR #180603)   Yingwei Zheng via llvm-commits
• [llvm] [llubi] Add UTC helper (PR #180603)   Yingwei Zheng via llvm-commits
• [llvm] InstCombine: Fix broken insert point for fdiv replacement (PR #180830)   Yingwei Zheng via llvm-commits
• [llvm] InstCombine: Fix wrong insert point for fdiv->copysign simplify (PR #180839)   Yingwei Zheng via llvm-commits
• [llvm] InstCombine: Fix wrong insert point for various fmul->copysign simplifies (PR #180840)   Yingwei Zheng via llvm-commits
• [llvm] InstCombine: Fix wrong insert point for sqrt -> copysign simplify (PR #180838)   Yingwei Zheng via llvm-commits
• [llvm] InstCombine: Fix insert point for rounding intrinsic -> copysign (PR #180837)   Yingwei Zheng via llvm-commits
• [llvm] [llubi] Add UTC helper (PR #180603)   Yingwei Zheng via llvm-commits
• [llvm] [LangRef] Clarify nsz semantics (PR #180906)   Yingwei Zheng via llvm-commits
• [llvm] [llubi] Add support for integer arithmetic ops (PR #181224)   Yingwei Zheng via llvm-commits
• [llvm] [llubi] Add support for integer arithmetic ops (PR #181224)   Yingwei Zheng via llvm-commits
• [llvm] [llubi] Add support for integer arithmetic ops (PR #181224)   Yingwei Zheng via llvm-commits
• [llvm] [llubi] Add basic support for terminators (PR #181393)   Yingwei Zheng via llvm-commits
• [llvm] [llubi] Add basic support for terminators (PR #181393)   Yingwei Zheng via llvm-commits
• [llvm] [llubi] Add basic support for icmp, terminators and function calls (PR #181393)   Yingwei Zheng via llvm-commits
• [llvm] [bolt][aarch64] Change indirect call instrumentation snippet (PR #180229)   YongKang Zhu via llvm-commits
• [llvm] [bolt][aarch64] Change indirect call instrumentation snippet (PR #180229)   YongKang Zhu via llvm-commits
• [llvm] [bolt][aarch64] Change indirect call instrumentation snippet (PR #180229)   YongKang Zhu via llvm-commits
• [llvm] [bolt][aarch64] Change indirect call instrumentation snippet (PR #180229)   YongKang Zhu via llvm-commits
• [llvm] [BOLT] Add --clone-at-origin option (PR #181003)   YongKang Zhu via llvm-commits
• [llvm] [bolt][aarch64] Change indirect call instrumentation snippet (PR #180229)   YongKang Zhu via llvm-commits
• [llvm] [bolt][aarch64] Change indirect call instrumentation snippet (PR #180229)   YongKang Zhu via llvm-commits
• [llvm] [AMDGPU] Cgscc amdgpu attributor (PR #179719)   Yoonseo Choi via llvm-commits
• [llvm] [AMDGPU] Cgscc amdgpu attributor (PR #179719)   Yoonseo Choi via llvm-commits
• [llvm] SelectionDAG: Improve expandFMINIMUM_FMAXIMUM (PR #137367)   YunQiang Su via llvm-commits
• [llvm] SelectionDAG: Improve expandFMINIMUM_FMAXIMUM (PR #137367)   YunQiang Su via llvm-commits
• [llvm] expandFMINIMUM_FMAXIMUM: Use FMINIMUMNUM and FMAXIMUMNUM if possible (PR #180487)   YunQiang Su via llvm-commits
• [llvm] SelectionDAG: Improve expandFMINIMUM_FMAXIMUM (PR #137367)   YunQiang Su via llvm-commits
• [llvm] expandFMINIMUM_FMAXIMUM: Use FMINIMUMNUM and FMAXIMUMNUM if possible (PR #180487)   YunQiang Su via llvm-commits
• [llvm] expandFMINIMUM_FMAXIMUM: Use FMINIMUMNUM and FMAXIMUMNUM if possible (PR #180487)   YunQiang Su via llvm-commits
• [llvm] SelectionDAG: Improve expandFMINIMUM_FMAXIMUM (PR #137367)   YunQiang Su via llvm-commits
• [llvm] SelectionDAG: Improve expandFMINIMUM_FMAXIMUM (PR #137367)   YunQiang Su via llvm-commits
• [llvm] SelectionDAG: Improve expandFMINIMUM_FMAXIMUM (PR #137367)   YunQiang Su via llvm-commits
• [llvm] SelectionDAG: Improve expandFMINIMUM_FMAXIMUM (PR #137367)   YunQiang Su via llvm-commits
• [llvm] SelectionDAG: Improve expandFMINIMUM_FMAXIMUM (PR #137367)   YunQiang Su via llvm-commits
• [llvm] [MIPS] Fix argument size in Fast ISel (PR #180336)   YunQiang Su via llvm-commits
• [clang] [llvm] Clang: Add nsz to llvm.minnum and llvm.maxnum emitted from fmin and fmax (PR #113133)   YunQiang Su via llvm-commits
• [clang] [llvm] Clang: Add nsz to llvm.minnum and llvm.maxnum emitted from fmin and fmax (PR #113133)   YunQiang Su via llvm-commits
• [llvm] expandFMINNUM_FMAXNUM: Improve for backend with FMINIMUMNUM and FMINN… (PR #181083)   YunQiang Su via llvm-commits
• [llvm] expandFMINNUM_FMAXNUM: Improve for backends with FMINIMUMNUM and FMINNUM_IEEE (PR #181083)   YunQiang Su via llvm-commits
• [llvm] expandFMINNUM_FMAXNUM: Improve for backends with FMINIMUMNUM and FMINNUM_IEEE (PR #181083)   YunQiang Su via llvm-commits
• [clang] [llvm] Define VP_FMINIMUMNUM and VP_FMAXIMUMNUM (PR #181084)   YunQiang Su via llvm-commits
• [llvm] Define VP_FMINIMUMNUM and VP_FMAXIMUMNUM (PR #181084)   YunQiang Su via llvm-commits
• [llvm] Define VP_FMINIMUMNUM and VP_FMAXIMUMNUM (PR #181084)   YunQiang Su via llvm-commits
• [llvm] expandFMINNUM_FMAXNUM: Improve for backends with FMINIMUMNUM and FMINNUM_IEEE (PR #181083)   YunQiang Su via llvm-commits
• [llvm] expandFMINNUM_FMAXNUM: Improve for backends with FMINIMUMNUM and FMINNUM_IEEE (PR #181083)   YunQiang Su via llvm-commits
• [llvm] expandFMINNUM_FMAXNUM: Improve for backends with FMINIMUMNUM and FMINNUM_IEEE (PR #181083)   YunQiang Su via llvm-commits
• [llvm] expandFMINNUM_FMAXNUM: Improve for backends with FMINIMUMNUM and FMINNUM_IEEE (PR #181083)   YunQiang Su via llvm-commits
• [llvm] Define VP_FMINIMUMNUM and VP_FMAXIMUMNUM (PR #181084)   YunQiang Su via llvm-commits
• [clang] [llvm] [Offload][SYCL] Refactoring: get rid of newline separators (PR #180274)   Yury Plyakhin via llvm-commits
• [clang] [llvm] [Offload][SYCL] Refactoring: get rid of newline separators (PR #180274)   Yury Plyakhin via llvm-commits
• [clang] [llvm] [clang-sycl-linker][offload] Set TheImageKind based on IsAOTCompileNeeded flag (PR #180269)   Yury Plyakhin via llvm-commits
• [compiler-rt] [ASan][Windows] Fix false positive for zero sized rtl allocations (PR #181015)   Zack Johnson via llvm-commits
• [compiler-rt] [ASan][Windows] Fix false positive for zero sized rtl allocations (PR #181015)   Zack Johnson via llvm-commits
• [compiler-rt] [ASan][Windows] Fix false positive for zero sized rtl allocations (PR #181015)   Zack Johnson via llvm-commits
• [compiler-rt] [ASan][Windows] Fix false positive for zero sized rtl allocations (PR #181015)   Zack Johnson via llvm-commits
• [compiler-rt] [ASan][Windows] Fix false positive for zero sized rtl allocations (PR #181015)   Zack Johnson via llvm-commits
• [compiler-rt] [ASan][Windows] Fix false positive for zero sized rtl allocations (PR #181015)   Zack Johnson via llvm-commits
• [compiler-rt] [ASan][Windows] Fix false positive for zero sized rtl allocations (PR #181015)   Zack Johnson via llvm-commits
• [flang] [llvm] [flang][cuda] Add CUFSetAssociatedStream entry point (PR #181313)   Zhen Wang via llvm-commits
• [llvm] [BOLT][Perf2bolt] Add support to generate pre-parsed perf data (PR #171144)   Ádám Kallai via llvm-commits
• [llvm] [BOLT][Perf2bolt] Add support to generate pre-parsed perf data (PR #171144)   Ádám Kallai via llvm-commits
• [llvm] [BOLT] Add pre-parsed perf script support (PR #163785)   Ádám Kallai via llvm-commits
• [llvm] [BOLT] Add pre-parsed perf script support (PR #163785)   Ádám Kallai via llvm-commits
• [llvm] [BOLT] Add pre-parsed perf script support (PR #163785)   Ádám Kallai via llvm-commits
• [llvm] [ARM] Precommit tests: strictfp rounding vector intrinsics (PR #180479)   via llvm-commits
• [llvm] f2d5b39 - [RISCV] Add cost for @llvm.vector.splice.{left,right} (#179219)   via llvm-commits
• [llvm] [VectorCombine] Optimize vector combine in fold binop of reduction (PR #179416)   via llvm-commits
• [llvm] [VectorCombine] Optimize vector combine in fold binop of reduction (PR #179416)   via llvm-commits
• [llvm] 6c31bf0 - [PredicateInfo] Fix crash on nonnull assume taking a constant (#180440)   via llvm-commits
• [llvm] [LoopReduceMotion] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [RISCV] Remove explicitly adding spilled registers as liveins. (PR #180483)   via llvm-commits
• [llvm] [RISCV] Remove redundant czero in multi-word comparisons (PR #180485)   via llvm-commits
• [llvm] 8554ed7 - AMDGPU: Add syntax for s_wait_event values (#180272)   via llvm-commits
• [llvm] 531430b - [InstCombine] Relax one-use check for min/max(fpext x, fpext y) to fpext(min/max(x, y)) fold (#180164)   via llvm-commits
• [llvm] [LoopReduceMotion] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [llvm/CAS] Handle switch default to fix missing return warning (PR #180481)   via llvm-commits
• [llvm] b79ba02 - [AMDGPU][GFX12.5] Reimplement monitor load as an atomic operation (#177343)   via llvm-commits
• [llvm] expandFMINIMUM_FMAXIMUM: Use FMINIMUMNUM and FMAXIMUMNUM if possible (PR #180487)   via llvm-commits
• [llvm] [CodeGen][AMDGPU] TwoAddress: Only skip undef COPY at REG_SEQUENCE lowering when there is Live info or no uses for subreg (PR #175598)   via llvm-commits
• [llvm] [CodeGen][AMDGPU] TwoAddress: Only skip undef COPY at REG_SEQUENCE lowering when there is Live info or no uses for subreg (PR #175598)   via llvm-commits
• [llvm] [GlobalISel] Use named constant for impossible repair cost (PR #180490)   via llvm-commits
• [llvm] a654a27 - [InstCombine] Fold min/max(fpext x, C) to fpext(min/max(x, fptrunc C)) (#179968)   via llvm-commits
• [llvm] [GlobalISel] Use named constant for impossible repair cost (PR #180490)   via llvm-commits
• [llvm] AMDGPU: Add a test for libcall simplify pow handling (PR #180491)   via llvm-commits
• [llvm] 25315f2 - [AMDGPU] Remove `NoNaNsFPMath` uses (#180469)   via llvm-commits
• [llvm] [AMDGPU] Remove `NoNaNsFPMath` uses (PR #180469)   via llvm-commits
• [llvm] 2298b86 - [GISel] computeKnownBits - add CTLS handling (#178063)   via llvm-commits
• [llvm] expandFMINIMUM_FMAXIMUM: Use FMINIMUMNUM and FMAXIMUMNUM if possible (PR #180487)   via llvm-commits
• [llvm] expandFMINIMUM_FMAXIMUM: Use FMINIMUMNUM and FMAXIMUMNUM if possible (PR #180487)   via llvm-commits
• [clang] [llvm] [AMDGPU] Add `wave_id` and `wave_shuffle` Clang builtins. (PR #179492)   via llvm-commits
• [clang] [llvm] [AMDGPU] Add `wave_id` and `wave_shuffle` Clang builtins. (PR #179492)   via llvm-commits
• [clang] [llvm] [AMDGPU] Add `wave_id` and `wave_shuffle` Clang builtins. (PR #179492)   via llvm-commits
• [flang] [llvm] [flang] Implement 'F_C_STRING' library function (Fortran 2023) (PR #174474)   via llvm-commits
• [flang] [llvm] [flang] Implement 'F_C_STRING' library function (Fortran 2023) (PR #174474)   via llvm-commits
• [flang] [llvm] [flang] Implement 'F_C_STRING' library function (Fortran 2023) (PR #174474)   via llvm-commits
• [flang] [llvm] [flang] Implement 'F_C_STRING' library function (Fortran 2023) (PR #174474)   via llvm-commits
• [llvm] [LLVM] Relax clobbering checks for calls to consider writes only (PR #179721)   via llvm-commits
• [llvm] 233a991 - [AArch64] Tweak fixed-length loop.dependence.mask costs (#175538)   via llvm-commits
• [llvm] [LLVM] Relax clobbering checks for calls to consider writes only (PR #179721)   via llvm-commits
• [llvm] 2ffb543 - AMDGPU: Add a test for libcall simplify pow handling (#180491)   via llvm-commits
• [llvm] [RISCV] Lower (abd[s|u] a, b) to (abs (sub a, b)) for i32/i64 element when `Zvabd` exists. (PR #180494)   via llvm-commits
• [llvm] 4ef7be9 - [SimplifyLibCalls] Directly convert fmin/fmax to intrinsics (#177988)   via llvm-commits
• [llvm] [RISCV] Rename FeatureEnableSelectOptimize to TuneEnableSelectOptimize (PR #180496)   via llvm-commits
• [llvm] 3862a4f - [GlobalISel] Use named constant for impossible repair cost (#180490)   via llvm-commits
• [llvm] [GlobalISel] Use named constant for impossible repair cost (PR #180490)   via llvm-commits
• [llvm] [DebugInfo] DWARFFormValue use formatv instead of format (PR #180498)   via llvm-commits
• [llvm] 27a8ab0 - [AMDGPU] Fix V_INDIRECT_REG_READ_GPR_IDX expansion with immediate index (#179699)   via llvm-commits
• [llvm] 964651a - [X86] Allow handling of i128/256/512 SELECT on the FPU (#180197)   via llvm-commits
• [llvm] [AMDGPU] Add legalization rules for atomicrmw max/min ops (PR #180502)   via llvm-commits
• [llvm] 2eb8112 - [CAS] getInternalFileBackedObjectData - fix MSVC not all control paths return a value warning. NFC. (#180499)   via llvm-commits
• [llvm] [RISCV] Enable select optimization by default (PR #178394)   via llvm-commits
• [llvm] [CodeGen] Improve documentation for SUBREG_TO_REG (PR #180504)   via llvm-commits
• [llvm] [offload] Adapt tests to new PluginInterface quoting [NFC] (PR #180505)   via llvm-commits
• [llvm] [offload] Adapt tests to new PluginInterface quoting [NFC] (PR #180505)   via llvm-commits
• [lld] [lld] Add explicit std::move(...) to avoid a few vector copies (PR #180474)   via llvm-commits
• [lld] [lld] Add explicit std::move(...) to avoid a few vector copies (PR #180474)   via llvm-commits
• [lld] [lld] Add explicit std::move(...) to avoid a few vector copies (PR #180474)   via llvm-commits
• [llvm] 8cd86ff - [VPlan] Propagate FastMathFlags from phis to blends (#180226)   via llvm-commits
• [lld] [lld] Add explicit std::move(...) to avoid a few vector copies (PR #180474)   via llvm-commits
• [lld] [lld] Add explicit std::move(...) to avoid a few vector copies (PR #180474)   via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries at IR level (PR #180509)   via llvm-commits
• [clang] [llvm] [mlir] [LLVM] Improve IR parsing and printing for target memory locations (PR #176968)   via llvm-commits
• [clang] [llvm] [mlir] [LLVM] Improve IR parsing and printing for target memory locations (PR #176968)   via llvm-commits
• [clang] [llvm] [mlir] [LLVM] Improve IR parsing and printing for target memory locations (PR #176968)   via llvm-commits
• [lld] 0cd8fd9 - [lld] Add explicit std::move(...) to avoid a few vector copies (#180474)   via llvm-commits
• [lld] [lld] Add explicit std::move(...) to avoid a few vector copies (PR #180474)   via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries at IR level (PR #180509)   via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries at IR level (PR #180509)   via llvm-commits
• [llvm] bf13405 - [CodeGen] Improve documentation for SUBREG_TO_REG (#180504)   via llvm-commits
• [llvm] 4bb16b1 - [VectorCombine][X86] Add test coverage for #161980 (#180508)   via llvm-commits
• [llvm] 6dbdfd8 - [InstCombine] Drop nonnull assumes if the pointer is already known to be nonnull (#180434)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor hypotf16 to Header Only. (PR #180511)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor hypotf16 to Header Only. (PR #180511)   via llvm-commits
• [llvm] [CostModel][X86] getShuffleCost - SK_Transpose v4f64/v4i64 matches UNPCK - don't generalise to SK_PermuteTwoSrc (PR #180514)   via llvm-commits
• [llvm] 45b037c - [AMDGPU] Add fp8/bf8 conversion instructions for gfx1170 (#180191)   via llvm-commits
• [clang] [llvm] [AMDGPU] Add dot4 fp8/bf8 instructions for gfx1170 (PR #180516)   via llvm-commits
• [llvm] d1b402b - [InstCombine] Avoid overflow in `foldVecExtTruncToExtElt` (#180414)   via llvm-commits
• [llvm] da0ad39 - [llvm-objdump][AVR] Detect AVR architecture from ELF flags for disassembling (#180468)   via llvm-commits
• [llvm] [RegisterCoalescer] The COPY with the implicit-def of super register is not coalescable. (PR #169997)   via llvm-commits
• [llvm] [MachineScheduler] Add an option to split regions into chunks of a given maximum size (PR #180519)   via llvm-commits
• [llvm] [RegisterCoalescer] The COPY with the implicit-def of super register is not coalescable. (PR #169997)   via llvm-commits
• [llvm] [RegisterCoalescer] The COPY with the implicit-def of super register is not coalescable. (PR #169997)   via llvm-commits
• [llvm] [RegisterCoalescer] The COPY with the implicit-def of super register is not coalescable. (PR #169997)   via llvm-commits
• [llvm] 7defb0a - [VPlan] Skip applying InstsToScalarize with forced instr costs. (#168269)   via llvm-commits
• [llvm] b2e6b98 - [MIPS] Fix argument size in Fast ISel (#180336)   via llvm-commits
• [llvm] 44031ae - [LV] Fix issue in VPFirstOrderRecurrencePHIRecipe::usesFirstLaneOnly (#179977)   via llvm-commits
• [llvm] [RegisterCoalescer] The COPY with the implicit-def of super register is not coalescable. (PR #169997)   via llvm-commits
• [llvm] [LV][NFC] Add "REQUIRES: assert" to new test file (PR #180522)   via llvm-commits
• [llvm] 041ce9f - [LV][NFC] Add "REQUIRES: assert" to new test file (#180522)   via llvm-commits
• [llvm] 392f0c9 - [NFC][AMDGPU] Add a test to show the impact of wrong `s_mov_b64` instruction size (#180386)   via llvm-commits
• [lld] [lld][Hexagon] Fix R_HEX_TPREL_11_X relocation on duplex instructions (PR #179860)   via llvm-commits
• [llvm] f6ee5bd - [SPIRV] Fix constant materialization for width > 64bit (#180182)   via llvm-commits
• [llvm] [CoroSplit][DebugInfo] Fix scope of continuation funclets (PR #180523)   via llvm-commits
• [llvm] [SPIR-V] Emit ceil(Bitwidth / 32) words during OpConstant creation (PR #180218)   via llvm-commits
• [llvm] d8e679c - [CostModel][X86] getShuffleCost - SK_Transpose v4f64/v4i64 matches UNPCK - don't generalise to SK_PermuteTwoSrc (#180514)   via llvm-commits
• [llvm] [IVDesc] Check loop-preheader for loop-legality when pass-remarks enabled (PR #166310)   via llvm-commits
• [llvm] [AArch64] Avoid selecting XAR for reverse operations. (PR #178706)   via llvm-commits
• [llvm] Reland "[LoopVectorize] Support vectorization of overflow intrinsics" (#179819) (PR #180526)   via llvm-commits
• [llvm] Reland "[LoopVectorize] Support vectorization of overflow intrinsics" (#179819) (PR #180526)   via llvm-commits
• [llvm] [InstCombine] Support minimumnum/maximumnum (PR #180529)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor logb implementation to header-only (PR #175719)   via llvm-commits
• [llvm] 03ab85c - [InstCombine] fold `gepi _, (srem x, y)` to `gepi _, (urem x, y)` if `y` is power-of-2 (#180148)   via llvm-commits
• [llvm] 65b4099 - [AMDGPU] Fix instruction size for 64-bit literal constant operands (#180387)   via llvm-commits
• [llvm] [InstCombine] fold `gepi _, (srem x, y)` to `gepi _, (urem x, y)` if `y` is power-of-2 (PR #180148)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf16 implementation to header-only in src/__support/math folder. (PR #178645)   via llvm-commits
• [llvm] [CodeGen][NFC] Update a comment. (PR #180531)   via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   via llvm-commits
• [llvm] [AArch64] Add support for B and H loads/stores in LoadStoreOptimizer (PR #180535)   via llvm-commits
• [clang] [llvm] [mlir] [LLVM] Improve IR parsing and printing for target memory locations (PR #176968)   via llvm-commits
• [llvm] 77ccd85 - [IVDesc] Check loop-preheader for loop-legality when pass-remarks enabled (#166310)   via llvm-commits
• [llvm] [IVDesc] Check loop-preheader for loop-legality when pass-remarks enabled (PR #166310)   via llvm-commits
• [llvm] 12ec215 - [IR] Update docstring for stripAndAccumulateConstantOffset (#180365)   via llvm-commits
• [llvm] [OFFLOAD] Implement excluding filters for debugging (PR #180538)   via llvm-commits
• [llvm] [OFFLOAD] Implement excluding filters for debugging (PR #180538)   via llvm-commits
• [llvm] [SPARC] Add TTI implementation for getPopcntSupport (PR #178843)   via llvm-commits
• [llvm] 2e21673 - [OpenMP][flang] Enabling support for Allocate clause in DO construct (#180172)   via llvm-commits
• [lld] [NFC][ELF] Remove redundant and unused file argument from deleteFallThruJmpInsn (PR #180540)   via llvm-commits
• [llvm] 9069164 - [llvm][DebugInfo] Avoid attaching retained nodes to unrelated subprograms in DIBuilder (#180294)   via llvm-commits
• [lld] [NFC][ELF] Remove redundant and unused file argument from deleteFallThruJmpInsn (PR #180540)   via llvm-commits
• [llvm] [LV] Pass symbolic VF to CalculateTripCountMinusVF and CanonicalIVIncrementForPart (NFC) (PR #180542)   via llvm-commits
• [llvm] [OFFLOAD] Add support to dump device images (PR #180545)   via llvm-commits
• [llvm] 94971b7 - [CodeGen][NFC] Update a comment. (#180531)   via llvm-commits
• [llvm] [SPARC] Add TTI implementation for getPopcntSupport (PR #178843)   via llvm-commits
• [llvm] [RFC][ThinLTO] Reduce the number of function name promotions (PR #178587)   via llvm-commits
• [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   via llvm-commits
• [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   via llvm-commits
• [llvm] ab2e10d - [AMDGPU] Add legalization rules for G_ATOMICRMW_FADD (#175257)   via llvm-commits
• [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   via llvm-commits
• [llvm] [OFFLOAD] Add support to dump device images (PR #180545)   via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSD] Add riscv64 support (PR #180549)   via llvm-commits
• [llvm] 091972c - [SPIR-V] initial support for @llvm.structured.gep (#178668)   via llvm-commits
• [llvm] [LoopInfo] Don't recognize loop as parallel if it stores to out-of-loop alloca (PR #180551)   via llvm-commits
• [clang] [llvm] [mlir] [LLVM] Improve IR parsing and printing for target memory locations (PR #176968)   via llvm-commits
• [llvm] 0a74066 - [InstCombine] Support minimumnum/maximumnum (#180529)   via llvm-commits
• [llvm] AMDGPU: Libcall expand fast pow/powr/pown/rootn for float case (PR #180553)   via llvm-commits
• [libcxx] [llvm] [XRay] Add bounds check before memcpy in readBinaryFormatHeader (PR #178499)   via llvm-commits
• [llvm] a911fc1 - [X86] Fold expand(splat,passthrough,mask) -> select(splat,passthrough,mask) (#180238)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Fix incorrect codegen for FPR16/FPR8 to GPR copies (PR #171499)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Fix incorrect codegen for FPR16/FPR8 to GPR copies (PR #171499)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Fix incorrect codegen for FPR16/FPR8 to GPR copies (PR #171499)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Fix incorrect codegen for FPR16/FPR8 to GPR copies (PR #171499)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Fix incorrect codegen for FPR16/FPR8 to GPR copies (PR #171499)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Fix incorrect codegen for FPR16/FPR8 to GPR copies (PR #171499)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Fix incorrect codegen for FPR16/FPR8 to GPR copies (PR #171499)   via llvm-commits
• [llvm] [InstCombine] Fold ((X + AddC) & Mask) ^ Mask to ((Mask - AddC) - X) & Mask (PR #174278)   via llvm-commits
• [llvm] [InstCombine] Fold ((X + AddC) & Mask) ^ Mask to ((Mask - AddC) - X) & Mask (PR #174278)   via llvm-commits
• [llvm] [InstCombine] Fold ((X + AddC) & Mask) ^ Mask to ((Mask - AddC) - X) & Mask (PR #174278)   via llvm-commits
• [llvm] [SimplifyLibCalls] Directly canonicalize fminimum_num to intrinsic (PR #180555)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnt][NFC] Access Waitcnt elements using InstCounterType (PR #178345)   via llvm-commits
• [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   via llvm-commits
• [llvm] e6a72a1 - [RISCV] Combine ADDD+WMULSU to WMACCSU (#180454)   via llvm-commits
• [llvm] d62bc3a - [NFC][LLVM][IPO] Remove pass initialization from pass constructors (#180154)   via llvm-commits
• [llvm] 8bbdac9 - [MIParser] - Add support for MMRAs (#180320)   via llvm-commits
• [llvm] [AMDGPU] Add known bits for G_AMDGPU_COPY_SCC_VCC (PR #180560)   via llvm-commits
• [llvm] [LLVM][AArch64] Add target-aware printing for target memory locations (PR #178689)   via llvm-commits
• [llvm] [AMDGPU] Add more cases to the "this is a wave ID" recognizer (PR #177713)   via llvm-commits
• [llvm] [AMDGPU] Add more cases to the "this is a wave ID" recognizer (PR #177713)   via llvm-commits
• [llvm] 77cb666 - [AArch64] Add support for B and H loads/stores in LoadStoreOptimizer (#180535)   via llvm-commits
• [llvm] Revert "[NFC][LLVM][IPO] Remove pass initialization from pass constructors" (PR #180571)   via llvm-commits
• [llvm] [AMDGPU][NFC] Use RegisterOperand instead of RegisterClass (PR #180574)   via llvm-commits
• [llvm] a29f0dd - [llubi] Add initial support for llubi (#180022)   via llvm-commits
• [llvm] Reapply: [lit] Avoid multiprocessing for -j1 runs (PR #179824)   via llvm-commits
• [llvm] [DWARFLinker] Fix DW_AT_LLVM_stmt_sequence attributes patched to wrong offsets (PR #178486)   via llvm-commits
• [llvm] [Bazel] NFC refactor out redundant is_x86_64_non_windows config (PR #180296)   via llvm-commits
• [llvm] 754fc78 - [ForceFunctionAttrs] Fix handling of `alwaysinline` and `noinline` attributes. (#180026)   via llvm-commits
• [llvm] 87d73f7 - [Hexagon] Fix encoding of packets with fixups followed by alignment (#179168)   via llvm-commits
• [llvm] [SPGO] Use std::hash instead of MD5 to avoid run time regression in llvm-profgen (PR #180581)   via llvm-commits
• [llvm] [SPGO] Use std::hash instead of MD5 to avoid run time regression in llvm-profgen (PR #180581)   via llvm-commits
• [llvm] [AMDGPU] BackOffBarrier feature added to gfx1250; Removed incorrect "DS Store drain" check. (PR #179818)   via llvm-commits
• [llvm] [NFC][LLVM][IPO] Remove pass initialization from pass constructors (PR #180584)   via llvm-commits
• [llvm] 2e34fec - [NFC][LLVM][IPO] Remove pass initialization from pass constructors (#180584)   via llvm-commits
• [llvm] [LV] Add LoopVectorize/VPlan subdirectory for VPlan printing tests. (PR #180611)   via llvm-commits
• [llvm] d69ccf3 - [RISCV] Combine shuffle of shuffles to a single shuffle (#178095)   via llvm-commits
• [llvm] workflows/release-task: Use less privileged token for uploading release notes (#180299) (PR #180650)   via llvm-commits
• [clang] [llvm] [clang] Add regalloc PBQP for all targets in clang (PR #166645)   via llvm-commits
• [clang] [llvm] [clang] Add regalloc PBQP for all targets in clang (PR #166645)   via llvm-commits
• [llvm] 9898082 - [AMDGPU][SIInsertWaitcnt][NFC] Access Waitcnt elements using InstCounterType (#178345)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnt][NFC] Access Waitcnt elements using InstCounterType (PR #178345)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Drop `AMDGPU::` (PR #180663)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Drop `AMDGPU::` (PR #180663)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Drop `AMDGPU::` (PR #180663)   via llvm-commits
• [llvm] [llvm-ir2vec] Refactoring the ir2vec python bindings testing (PR #180664)   via llvm-commits
• [llvm] [Mips] Fix cttz.i32 fails to lower on mips16 (PR #179633)   via llvm-commits
• [llvm] [X86] Fix lower1BitShuffle blend-with-zero shuffles to AND mask (PR #180472)   via llvm-commits
• [llvm] [X86] Fix lower1BitShuffle blend-with-zero shuffles to AND mask (PR #180472)   via llvm-commits
• [llvm] [X86] Fix lower1BitShuffle blend-with-zero shuffles to AND mask (PR #180472)   via llvm-commits
• [llvm] [X86] Fix lower1BitShuffle blend-with-zero shuffles to AND mask (PR #180472)   via llvm-commits
• [llvm] [RISCV] Enable select optimization by default (PR #178394)   via llvm-commits
• [llvm] [RISCV] Use ADDD for GPR Pair Move with P (PR #180671)   via llvm-commits
• [llvm] [RISCV] Use ADDD for GPR Pair Move with P (PR #180671)   via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add arm support (PR #180674)   via llvm-commits
• [llvm] [RISCV] Add basic scalar support for MERGE, MVM, and MVMN from P extension (PR #180677)   via llvm-commits
• [llvm] f33ea53 - [RISCV] Remove redundant czero in multi-word comparisons (#180485)   via llvm-commits
• [llvm] [NVPTX] Scalarize v2f32 instructions if input operand guarantees need for register coalescing (PR #180113)   via llvm-commits
• [llvm] [RISCV] Add basic scalar support for MERGE, MVM, and MVMN from P extension (PR #180677)   via llvm-commits
• [llvm] [NVPTX] Scalarize v2f32 instructions if input operand guarantees need for register coalescing (PR #180113)   via llvm-commits
• [llvm] [NVPTX] Scalarize v2f32 instructions if input operand guarantees need for register coalescing (PR #180113)   via llvm-commits
• [llvm] [SPGO] Use std::hash instead of MD5 to avoid run time regression in llvm-profgen (PR #180581)   via llvm-commits
• [llvm] [NVPTX] Scalarize v2f32 instructions if input operand guarantees need for register coalescing (PR #180113)   via llvm-commits
• [llvm] [VPlan] Fix convertToPhisToBlends folding non poison blend to poison (PR #180686)   via llvm-commits
• [llvm] [VPlan] Fix convertToPhisToBlends folding non poison blend to poison (PR #180686)   via llvm-commits
• [llvm] [NVPTX] Scalarize v2f32 instructions if input operand guarantees need for register coalescing (PR #180113)   via llvm-commits
• [llvm] [Mips] Fix cttz.i32 fails to lower on mips16 (PR #179633)   via llvm-commits
• [llvm] [NewPM] Port x86-winehstate (PR #180687)   via llvm-commits
• [llvm] a56b877 - [NewPM] Port x86-global-base-reg (#180119)   via llvm-commits
• [llvm] [AMDGPU] Clean up VOP3PWMMA_Profile by removing XF32 related stuff (PR #180688)   via llvm-commits
• [llvm] [RISCV] Stash GPR to FPR if emergency spill slot is not reachable (PR #180685)   via llvm-commits
• [llvm] [Mips] Fix cttz.i32 fails to lower on mips16 (PR #179633)   via llvm-commits
• [llvm] [FastISel] Lower call instruction with illegal type returned (PR #180322)   via llvm-commits
• [llvm] [RISCV] Add basic scalar support for MERGE, MVM, and MVMN from P extension (PR #180677)   via llvm-commits
• [llvm] [ConstraintElim] Infer linear constraints from udiv and urem (PR #180689)   via llvm-commits
• [llvm] [RISCV] Stash GPR to FPR if emergency spill slot is not reachable (PR #180685)   via llvm-commits
• [llvm] [RISCV] Stash GPR to FPR if emergency spill slot is not reachable (PR #180685)   via llvm-commits
• [llvm] [RISCV] Stash GPR to FPR if emergency spill slot is not reachable (PR #180685)   via llvm-commits
• [llvm] [Hexagon] Add support for V128i1/V64i1/V32i1 predicate store/load in HVX (PR #180701)   via llvm-commits
• [llvm] [Hexagon] Add support for V128i1/V64i1/V32i1 predicate store/load in HVX (PR #180701)   via llvm-commits
• [llvm] [Hexagon] Add support for V128i1/V64i1/V32i1 predicate store/load in HVX (PR #180701)   via llvm-commits
• [llvm] 8c5f31b - [RISCV] Enable select optimization by default (#178394)   via llvm-commits
• [llvm] [RISCV] Stash GPR to FPR if emergency spill slot is not reachable (PR #180685)   via llvm-commits
• [llvm] [RISCV] Stash GPR to FPR if emergency spill slot is not reachable (PR #180685)   via llvm-commits
• [llvm] [RISCV] Stash GPR to FPR if emergency spill slot is not reachable (PR #180685)   via llvm-commits
• [flang] [llvm] [flang][runtime] Improve handling of short DATE_AND_TIME(VALUES=) (PR #180557)   via llvm-commits
• [llvm] 24405f0 - [AMDGPU] Add intrinsic exposing s_alloc_vgpr (#163951)   via llvm-commits
• [llvm] [RISCV] Stash GPR to FPR if emergency spill slot is not reachable (PR #180685)   via llvm-commits
• [llvm] InstCombine: Add baseline SimplifyDemandedFPClass ldexp tests (PR #180702)   via llvm-commits
• [llvm] 7e5d918 - [VPlan] Simplify true && x -> x (#179426)   via llvm-commits
• [compiler-rt] Allow building the profiler runtime on tvOS and watchOS (PR #180704)   via llvm-commits
• [llvm] [RISCV] Relax reversed mask's mask requirement in reverse to strided load/store combine (PR #180706)   via llvm-commits
• [llvm] b91eb9b - [SDAG] Implement missing legalization for `ISD::VECTOR_FIND_LAST_ACTIVE` (#180290)   via llvm-commits
• [llvm] [MIRParser] Accept sub-register for implicit operand verification (PR #180707)   via llvm-commits
• [llvm] [MIRParser] Accept sub-register for implicit operand verification (PR #180707)   via llvm-commits
• [llvm] [MIRParser] Accept sub-register for implicit operand verification (PR #180707)   via llvm-commits
• [llvm] [MIRParser] Accept sub-register for implicit operand verification (PR #180707)   via llvm-commits
• [libc] [llvm] [libc][math] Implement C23 half precision erf function (PR #179251)   via llvm-commits
• [llvm] [MIRParser] Accept sub-register for implicit operand verification (PR #180707)   via llvm-commits
• [libc] [llvm] [libc][math] Implement C23 half precision erf function (PR #179251)   via llvm-commits
• [llvm] e145b0e - [OCaml] Remove global_context (#180533)   via llvm-commits
• [llvm] 59a8bd0 - [SimplifyLibCalls] Directly canonicalize fminimum_num to intrinsic (#180555)   via llvm-commits
• [llvm] [MIRParser] Accept sub-register for implicit operand verification (PR #180707)   via llvm-commits
• [llvm] Reland "[LV] Support conditional scalar assignments of masked operations" (PR #180708)   via llvm-commits
• [llvm] Reland "[LV] Support conditional scalar assignments of masked operations" (PR #180708)   via llvm-commits
• [llvm] Reland "[LV] Support conditional scalar assignments of masked operations" (PR #180708)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor log10f16 to Header Only. (PR #176523)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor log10f to Header Only. (PR #176520)   via llvm-commits
• [llvm] [LLVM][AArch64] Add target-aware printing for target memory locations (PR #178689)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor log10f to Header Only. (PR #176520)   via llvm-commits
• [llvm] [MemorySSA] Relax clobbering checks for calls to consider writes only (PR #179721)   via llvm-commits
• [llvm] 570fffe - [MemorySSA] Relax clobbering checks for calls to consider writes only (#179721)   via llvm-commits
• [llvm] [MemorySSA] Relax clobbering checks for calls to consider writes only (PR #179721)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor log1pf to Header Only. (PR #176525)   via llvm-commits
• [llvm] [Hexagon] Add support for V128i1/V64i1/V32i1 predicate store/load in HVX (PR #180701)   via llvm-commits
• [lld] [RISCV][LLD] Zcmt RISC-V extension in lld (PR #163142)   via llvm-commits
• [llvm] [RISCV] Stash GPR to FPR if emergency spill slot is not reachable (PR #180685)   via llvm-commits
• [llvm] 302ff8f - InstCombine: Use SimplifyDemandedFPClass on fmul (#177490)   via llvm-commits
• [llvm] f22a178 - Reland "[LV] Support conditional scalar assignments of masked operations" (#180708)   via llvm-commits
• [flang] [llvm] [flang] Implement 'F_C_STRING' library function (Fortran 2023) (PR #174474)   via llvm-commits
• [flang] [llvm] [flang] Implement 'F_C_STRING' library function (Fortran 2023) (PR #174474)   via llvm-commits
• [llvm] [LLVM] Refine MemoryEffect handling for target-specific intrinsics (PR #155590)   via llvm-commits
• [llvm] e043195 - [AArch64] Add support for intent to read prefetch intrinsic (#179709)   via llvm-commits
• [llvm] bd6dd94 - [AMDGPU] Add legalization rules for atomicrmw max/min ops (#180502)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor log2f16 to Header Only. (PR #176526)   via llvm-commits
• [llvm] 41aed21 - [CoroSplit][DebugInfo] Fix scope of continuation funclets (#180523)   via llvm-commits
• [llvm] [SCEV] Don't create SCEVPtrToAddr for unstable pointer representations. (PR #180718)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor log2f to Header Only. (PR #176527)   via llvm-commits
• [compiler-rt] c975385 - [TySan] Add skeleton for adding interface functions (#170859)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor pow to Header Only. (PR #176529)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor powf to Header Only. (PR #176531)   via llvm-commits
• [llvm] 7756bfd - [NFC] Modify the comment of LoopRotate param (#180675)   via llvm-commits
• [llvm] 3157758 - [LV] Handle partial sub-reductions with sub in middle block. (#178919)   via llvm-commits
• [llvm] 4280f0d - [AMDGPU] Add dot4 fp8/bf8 instructions for gfx1170 (#180516)   via llvm-commits
• [libcxx] [llvm] [XRay] Add bounds check before memcpy in readBinaryFormatHeader (PR #178499)   via llvm-commits
• [llvm] [RISCV] Remove vp.reverse mask check in performVP_REVERSECombine (PR #180724)   via llvm-commits
• [llvm] [SelectionDAG] Make sure demanded lanes for AND-by-zero are frozen (PR #180727)   via llvm-commits
• [llvm] [SelectionDAG] Make sure demanded lanes for AND-by-zero are frozen (PR #180727)   via llvm-commits
• [llvm] [AArch64] Lower factor-of-2 interleaved stores to STNP (PR #177938)   via llvm-commits
• [llvm] 2889098 - [IVDesc] Add `[[maybe_unused]]` to `NumNonPHIUsers` (NFC) (#180729)   via llvm-commits
• [clang] [llvm] [AMDGPU] Add WMMA and SWMMAC instructions for gfx1170 (PR #180731)   via llvm-commits
• [clang] [llvm] [AMDGPU] Add WMMA and SWMMAC instructions for gfx1170 (PR #180731)   via llvm-commits
• [llvm] [MIRParser] Accept sub-register for implicit operand verification (PR #180707)   via llvm-commits
• [llvm] [X86] Fix lower1BitShuffle blend-with-zero shuffles to AND mask (PR #180472)   via llvm-commits
• [llvm] [X86] Fix lower1BitShuffle blend-with-zero shuffles to AND mask (PR #180472)   via llvm-commits
• [llvm] 6d5bb4d - [X86] Fixed flags issue of onlyZeroFlagUsed (#180405)   via llvm-commits
• [llvm] [X86] Fixed flags issue of onlyZeroFlagUsed (PR #180405)   via llvm-commits
• [llvm] [X86] Optimized ADD + ADC to ADC (PR #173543)   via llvm-commits
• [llvm] 9501114 - [Verifier] Make verifier fail when global variable size exceeds address space size (#179625)   via llvm-commits
• [llvm] [X86] Optimized ADD + ADC to ADC (PR #173543)   via llvm-commits
• [llvm] [IR] Add llvm.masked.load.first.fault intrinsic (PR #156470)   via llvm-commits
• [llvm] dca7b11 - [X86] Add tests showing failure to reduce the vector width of vpmaddwd/vpmaddubsw/pmulhrsw nodes (#180728)   via llvm-commits
• [llvm] [SPIRV] Scalarize single-element vectors in type creation (PR #180735)   via llvm-commits
• [llvm] [SPIRV] Scalarize single-element vectors in type creation (PR #180735)   via llvm-commits
• [llvm] [VPlan] Simplify the computation of the block entry mask. (PR #173265)   via llvm-commits
• [lld] 6558595 - [LLD][COFF] Fix out-of-bounds write when filling gaps with INT3 in code sections (#180411)   via llvm-commits
• [lld] [LLD][COFF] Fix out-of-bounds write when filling gaps with INT3 in code sections (PR #180411)   via llvm-commits
• [llvm] 2f0400c - [Thumb2] mve-shuffle.ll - add missing check prefix coverage for some fullfp16 cases (#180567)   via llvm-commits
• [llvm] f8d5a00 - [SCEV] Don't create SCEVPtrToAddr for unstable pointer representations. (#180718)   via llvm-commits
• [llvm] [LangRef] Specify semantics for non-byte-sized loads and stores (PR #180739)   via llvm-commits
• [llvm] 70aebae - [SLP]Support for zext i1 %x modeling as select %x, 1, 0   via llvm-commits
• [llvm] [InstCombine] Fix #163110: Fold icmp (shl X, L), (add (shl Y, L), 1<<L) to icmp X, (Y + 1) (PR #165975)   via llvm-commits
• [llvm] Revert "Reapply [Offload][lit] Link against SPIR-V DeviceRTL if present" (PR #180743)   via llvm-commits
• [llvm] 0fdf9b9 - [ConstraintElim] Infer linear constraints from udiv and urem (#180689)   via llvm-commits
• [llvm] [InstCombine] Fix #163110: Fold icmp (shl X, L), (add (shl Y, L), 1<<L) to icmp X, (Y + 1) (PR #165975)   via llvm-commits
• [llvm] 7d2e182 - [X86] SimplifyDemandedVectorEltsForTargetNode - add handling for vpmaddwd/vpmaddubsw/vpmulhrsw vector width reduction (#180738)   via llvm-commits
• [llvm] [X86] Blocklist instructions that are unsafe for masked-load folding. (PR #178888)   via llvm-commits
• [llvm] [Option] Fix param name mismatch & coding style (NFC) (PR #180746)   via llvm-commits
• [llvm] [Option] Fix param name mismatch & coding style (NFC) (PR #180746)   via llvm-commits
• [llvm] [Option] Fix param name mismatch & coding style (NFC) (PR #180746)   via llvm-commits
• [llvm] [Option] Fix param name mismatch & coding style (NFC) (PR #180746)   via llvm-commits
• [llvm] [DAG] Enable bitcast STLF for Constant/Undef (PR #172523)   via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSD] Add riscv64 support (PR #180549)   via llvm-commits
• [llvm] [InstCombine] Canonicalize GEP source element types (PR #180745)   via llvm-commits
• [llvm] [InstCombine] Canonicalize GEP source element types (PR #180745)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor `f16sqrtf` to Header Only. (PR #180749)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor `f16sqrtf` to Header Only. (PR #180749)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor `f16sqrtf` to Header Only. (PR #180749)   via llvm-commits
• [llvm] [SLP]Support for zext i1 %x modeling as select %x, 1, 0 (PR #180635)   via llvm-commits
• [llvm] [InstCombine] Fold shift of boolean zext to logic sequence (PR #180596)   via llvm-commits
• [llvm] [RISCV] Stash GPR to FPR if emergency spill slot is not reachable (PR #180685)   via llvm-commits
• [llvm] Reenable sched mfma rewrite (PR #180751)   via llvm-commits
• [llvm] [RISCV] Stash GPR to FPR if emergency spill slot is not reachable (PR #180685)   via llvm-commits
• [llvm] [NFC] Initialize AtomicLoadExtActions array (PR #180752)   via llvm-commits
• [llvm] [RegisterPressure] Remove dead defs correctly (PR #156576)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Reassociate add sub mul. (PR #180753)   via llvm-commits
• [llvm] [AMDGPU] fix eliminateFrameIndex to use SGPR frame index (PR #178991)   via llvm-commits
• [llvm] [AMDGPU] fix eliminateFrameIndex to use SGPR frame index (PR #178991)   via llvm-commits
• [llvm] [SLP] Use the correct calling convention for vector math routines (PR #180759)   via llvm-commits
• [llvm] [SLP] Use the correct calling convention for vector math routines (PR #180759)   via llvm-commits
• [llvm] d8b8793 - [NFC][TableGen] Adopt CodeGenHelpers in GobalISel emitters (#180143)   via llvm-commits
• [llvm] [Option] Fix param name mismatch & coding style (NFC) (PR #180746)   via llvm-commits
• [llvm] [llvm-pdbutil] Dump and parse unknown records (PR #180761)   via llvm-commits
• [llvm] [llvm-pdbutil] Dump and parse unknown records (PR #180761)   via llvm-commits
• [llvm] [RegisterPressure] Remove dead defs correctly (PR #156576)   via llvm-commits
• [llvm] [RegisterPressure] Remove dead defs correctly (PR #156576)   via llvm-commits
• [llvm] f96c1cc - [VPlan] Add `-vplan-print-after=` option (#178700)   via llvm-commits
• [llvm] [InstCombine] Only ignore first zero index during GEP canonicalization (PR #180764)   via llvm-commits
• [llvm] d80a729 - [LoopVectorizer] Rename variable (NFC). (#180585)   via llvm-commits
• [llvm] [TableGen] Fix potential null pointer dereference in parseInstruction (PR #180767)   via llvm-commits
• [llvm] Connex second patch (PR #180768)   via llvm-commits
• [llvm] f81889d - [VPlan] Fix convertToPhisToBlends folding non poison blend to poison (#180686)   via llvm-commits
• [llvm] Connex second patch (PR #180768)   via llvm-commits
• [llvm] [TableGen] Fix potential null pointer dereference in parseInstruction (PR #180767)   via llvm-commits
• [llvm] Connex second patch (PR #180768)   via llvm-commits
• [llvm] [TableGen] Fix potential null pointer dereference in parseInstructionPattern (PR #180767)   via llvm-commits
• [llvm] Connex second patch (#2) (PR #180768)   via llvm-commits
• [llvm] Added first Connex patch (#1) (PR #165466)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Drop `AMDGPU::` (PR #180663)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Drop `AMDGPU::` (PR #180663)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Make Waitcnt members private (PR #180772)   via llvm-commits
• [llvm] First Connex patch (#1) (PR #165466)   via llvm-commits
• [llvm] [NFC][TableGen] Use std::move to avoid copy (PR #180775)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Make Waitcnt members private (PR #180772)   via llvm-commits
• [llvm] [CodeGen] Teach ReplaceWithVeclib to use correct calling convention (PR #180773)   via llvm-commits
• [llvm] [NFC][TableGen] Use std::move to avoid copy (PR #180775)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor `f16sqrtf` to Header Only. (PR #180749)   via llvm-commits
• [llvm] [TableGen] Fix potential null pointer dereference in parseInstructionPattern (PR #180767)   via llvm-commits
• [clang] [llvm] [Clang][Lexer] Reland "Detect SSE4.2 availability at runtime in fastParseASCIIIdentifier" (PR #180631)   via llvm-commits
• [clang] [llvm] [Clang][Lexer] Reland "Detect SSE4.2 availability at runtime in fastParseASCIIIdentifier" (PR #180631)   via llvm-commits
• [llvm] e6f5e49 - [Windows][Support] Add helper to expand short 8.3 form paths (#178480)   via llvm-commits
• [clang] [llvm] [Clang][Lexer] Reland "Detect SSE4.2 availability at runtime in fastParseASCIIIdentifier" (PR #180631)   via llvm-commits
• [llvm] 4b8f866 - [AMDGPU][NFC] Use RegisterOperand instead of RegisterClass (#180574)   via llvm-commits
• [llvm] [AArch64][SVE] Use loop.dependence.war.mask in vector.memcheck (PR #175943)   via llvm-commits
• [llvm] [AArch64][SVE] Use loop.dependence.war.mask in vector.memcheck (PR #175943)   via llvm-commits
• [llvm] [AMDGPU] BackOffBarrier feature added to gfx1250; Removed incorrect "DS Store drain" check. (PR #179818)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Drop `using llvm::AMDGPU` (PR #180782)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Drop `using llvm::AMDGPU` (PR #180782)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Drop `using llvm::AMDGPU` (PR #180782)   via llvm-commits
• [llvm] [NFC][TableGen] Use std::move to avoid copy (PR #180785)   via llvm-commits
• [llvm] [NFC][TableGen] Use std::move to avoid copy (PR #180785)   via llvm-commits
• [llvm] [DAG] Enable bitcast STLF for Constant/Undef (PR #172523)   via llvm-commits
• [llvm] 5df1732 - [NFC] Initialize AtomicLoadExtActions array (#180752)   via llvm-commits
• [llvm] [NFC] Initialize AtomicLoadExtActions array (PR #180752)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Drop `using llvm::AMDGPU` (PR #180782)   via llvm-commits
• [llvm] [DAG] Enable bitcast STLF for Constant/Undef (PR #172523)   via llvm-commits
• [llvm] [SimplifyCFG] correct and move debug info for mergeConditionalStoreToAddress (PR #180789)   via llvm-commits
• [llvm] [AMDGPU] BackOffBarrier feature added to gfx1250; Removed incorrect "DS Store drain" check. (PR #179818)   via llvm-commits
• [llvm] [ADT][NFC] Remove `else` after `return` in APSInt.h (PR #180790)   via llvm-commits
• [llvm] [DAGCombiner] Fix subvector extraction index for big-endian STLF (PR #180795)   via llvm-commits
• [llvm] [VPlan] Add VPlan-dump-based test for predication (PR #180794)   via llvm-commits
• [llvm] [VPlan] Add VPlan-dump-based test for predication (PR #180794)   via llvm-commits
• [llvm] [DAGCombiner] Fix subvector extraction index for big-endian STLF (PR #180795)   via llvm-commits
• [llvm] [DAGCombiner] Fix subvector extraction index for big-endian STLF (PR #180795)   via llvm-commits
• [llvm] [DAGCombiner] Fix subvector extraction index for big-endian STLF (PR #180795)   via llvm-commits
• [llvm] [DAGCombiner] Fix subvector extraction index for big-endian STLF (PR #180795)   via llvm-commits
• [llvm] [SPIRV] Implement NaN propation for FMINIMUM and FMAXIMUM. (PR #180797)   via llvm-commits
• [llvm] [AMDGPU][ISel] `setcc` peephole for comparisons with upper 32 bits of a 64-bit register pair (PR #177662)   via llvm-commits
• [llvm] [SPIRV] Implement NaN propation for FMINIMUM and FMAXIMUM. (PR #180797)   via llvm-commits
• [llvm] 9475f6a - Reland "[NVPTX] Validate user-specified PTX version against SM version" (#180116)   via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add ppc and ppc64le support (PR #180669)   via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add ppc and ppc64le support (PR #180669)   via llvm-commits
• [llvm] [AMDGPU] Use enum instead of literal for MadFmaMixFP16Pats (PR #180802)   via llvm-commits
• [llvm] [AMDGPU] Use enum instead of literal for MadFmaMixFP16Pats (PR #180802)   via llvm-commits
• [llvm] ce94d63 - Make OpenCL an OSType rather than an EnvironmentType. (#170297)   via llvm-commits
• [llvm] [AIX] Sort relocations in XCOFF object writer. (PR #180807)   via llvm-commits
• [llvm] [AMDGPU] Use enum instead of literal for MadFmaMixFP16Pats (PR #180802)   via llvm-commits
• [llvm] [AMDGPU][ISel] `setcc` peephole for comparisons with upper 32 bits of a 64-bit register pair (PR #177662)   via llvm-commits
• [llvm] [RISCV] Add (BSETI x0, 11) to isLoadImm for optimizeCondBranch (PR #180820)   via llvm-commits
• [llvm] 81a8363 - [Offload][SYCL] Refactoring: get rid of newline separators (#180274)   via llvm-commits
• [llvm] [AMDGPU] Fix LDS address correction in promoteConstantOffsetToImm for async stores (PR #180220)   via llvm-commits
• [llvm] [AMDGPU] Fix LDS address correction in promoteConstantOffsetToImm for async stores (PR #180220)   via llvm-commits
• [lld] c703f5a - [lld][Webassembly] Avoid a signed overflow on large sections (#178287)   via llvm-commits
• [lld] [lld][Webassembly] Avoid a signed overflow on large sections (PR #178287)   via llvm-commits
• [llvm] [AMDGPU][ISel] `setcc` peephole for comparisons with upper 32 bits of a 64-bit register pair (PR #177662)   via llvm-commits
• [llvm] [X86] Add test for VPBLENDW Tuning (PR #179906)   via llvm-commits
• [clang] [llvm] [Clang][Lexer] Reland "Detect SSE4.2 availability at runtime in fastParseASCIIIdentifier" (PR #180631)   via llvm-commits
• [llvm] 49c0523 - [RISCV] Use ADDD for GPR Pair Move with P (#180671)   via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   via llvm-commits
• [llvm] [AMDGPU] BackOffBarrier feature added to gfx1250; Removed incorrect "DS Store drain" check. (PR #179818)   via llvm-commits
• [clang] [llvm] [Clang][Lexer] Reland "Detect SSE4.2 availability at runtime in fastParseASCIIIdentifier" (PR #180631)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor log10f to Header Only. (PR #176520)   via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor log2f16 to Header Only. (PR #176526)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor log2f to Header Only. (PR #176527)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor log2f to Header Only. (PR #176527)   via llvm-commits
• [llvm] [llvm-isel-fuzzer] Fix crash in `IRMutator::getEffectiveTerminator` (PR #180853)   via llvm-commits
• [llvm] [AMDGPU] Add known bits for G_AMDGPU_COPY_SCC_VCC (PR #180560)   via llvm-commits
• [llvm] [SLP] Use static_assert() rather than assert() where possible (PR #180867)   via llvm-commits
• [llvm] 1094775 - [X86] Fix lower1BitShuffle blend-with-zero shuffles to AND mask (#180472)   via llvm-commits
• [llvm] [X86] Fix lower1BitShuffle blend-with-zero shuffles to AND mask (PR #180472)   via llvm-commits
• [llvm] ac85248 - [NewPM] Port x86-winehstate (#180687)   via llvm-commits
• [llvm] 36caa31 - [llubi] Add UTC helper (#180603)   via llvm-commits
• [llvm] ab33f1e - [IROutliner] Add TTI Hook for Propagating Attributes (#153985)   via llvm-commits
• [llvm] workflows/release-binaries: Pass missing release-version input to upload-release-artifact (PR #180879)   via llvm-commits
• [llvm] [AMDGPU] Remove alignment constraint from spill pseudos (PR #177317)   via llvm-commits
• [compiler-rt] [sanitizer_common][NFC] Fix sanitizer_platform_limits_posix.cpp formatting (PR #180823)   via llvm-commits
• [compiler-rt] [llvm] [ASan][Fuchsia] Have Fuchsia use a dynamic shadow start (PR #180880)   via llvm-commits
• [compiler-rt] [llvm] [ASan][Fuchsia] Have Fuchsia use a dynamic shadow start (PR #180880)   via llvm-commits
• [compiler-rt] [llvm] [HWASan][Fuchsia] Have Fuchsia use a dynamic shadow start #180880 (PR #180881)   via llvm-commits
• [compiler-rt] [llvm] [HWASan][Fuchsia] Have Fuchsia use a dynamic shadow start (PR #180881)   via llvm-commits
• [compiler-rt] [llvm] [HWASan][Fuchsia] Have Fuchsia use a dynamic shadow start (PR #180881)   via llvm-commits
• [llvm] [CHR] Skip regions containing convergent calls (PR #180882)   via llvm-commits
• [compiler-rt] [llvm] [HWASan][Fuchsia] Have Fuchsia use a dynamic shadow start (PR #180881)   via llvm-commits
• [compiler-rt] [llvm] [HWASan][Fuchsia] Have Fuchsia use a dynamic shadow start (PR #180881)   via llvm-commits
• [llvm] [DAGCombiner] Combine (fshl A, X, Y) | (shl X, Y) --> fshl (A|X), X, Y (PR #180888)   via llvm-commits
• [llvm] [DAGCombiner] Combine (fshl A, B, S) | (fshr C, D, BW-S) --> (fshl (A|C), (B|D), S) (PR #180889)   via llvm-commits
• [llvm] [DAGCombiner] Combine (fshl A, B, S) | (fshr C, D, BW-S) --> (fshl (A|C), (B|D), S) (PR #180889)   via llvm-commits
• [llvm] [NFC] Fix typos 'bicast' -> 'bitcast' (PR #180890)   via llvm-commits
• [llvm] 70b96be - [NewPM] Port x86-insert-x87-wait (#180128)   via llvm-commits
• [llvm] 128437f - [AMDGPU] Introduce asyncmark/wait intrinsics (#180467)   via llvm-commits
• [llvm] [Hexagon] Add support for V128i1/V64i1/V32i1 predicate store/load in HVX (PR #180701)   via llvm-commits
• [llvm] 680124c - [Option] Fix param name mismatch & coding style (NFC) (#180746)   via llvm-commits
• [llvm] [Option] Fix param name mismatch & coding style (NFC) (PR #180746)   via llvm-commits
• [llvm] [SDAG] Do not treat fp x!=0|y!=0 as special case in branch builder. (PR #180895)   via llvm-commits
• [llvm] [SDAG] Do not treat fp x!=0|y!=0 as special case in branch builder. (PR #180895)   via llvm-commits
• [llvm] ad1e107 - [PowerPC] Require PPC32 for 32-bit addc/adde/subc/sube (#179186)   via llvm-commits
• [llvm] [LIBM][AMDLIBM] - Add new vector call support for fveclib=AMDLIBM (PR #180896)   via llvm-commits
• [llvm] 1f05778 - InstCombine: Fix insert point for rounding intrinsic -> copysign (#180837)   via llvm-commits
• [llvm] 8503cb6 - InstCombine: Fix wrong insert point for fdiv->copysign simplify (#180839)   via llvm-commits
• [llvm] bd4fe78 - InstCombine: Fix wrong insert point for various fmul->copysign simplifies (#180840)   via llvm-commits
• [llvm] 17a9170 - InstCombine: Fix wrong insert point for sqrt -> copysign simplify (#180838)   via llvm-commits
• [llvm] 7353ca7 - [NFC][TableGen] Use std::move to avoid copy (#180785)   via llvm-commits
• [llvm] [NFC][TableGen] Use std::move to avoid copy (PR #180785)   via llvm-commits
• [llvm] [DAG] Enable bitcast STLF for Constant/Undef (PR #172523)   via llvm-commits
• [llvm] 1e42c76 - [Mips] Fix cttz.i32 fails to lower on mips16 (#179633)   via llvm-commits
• [llvm] [Mips] Fix cttz.i32 fails to lower on mips16 (PR #179633)   via llvm-commits
• [llvm] [VPlan] Explicitly reassociate header mask in logical and (PR #180898)   via llvm-commits
• [llvm] [VPlan] Explicitly reassociate header mask in logical and (PR #180898)   via llvm-commits
• [llvm] [WebAssembly] Define `__funcref_call_table` in generated asm and objects (PR #180900)   via llvm-commits
• [llvm] ffe446e - [RISCV] Relax reversed mask's mask requirement in reverse to strided load/store combine (#180706)   via llvm-commits
• [lldb] [llvm] [llvm][lldb] Add check for incorrect target features (PR #180901)   via llvm-commits
• [lldb] [llvm] [llvm][lldb] Add check for incorrect target features (PR #180901)   via llvm-commits
• [lldb] [llvm] [llvm][lldb] Add check for incorrect target features (PR #180901)   via llvm-commits
• [llvm] 8b57b97 - [DTLTO][NFC] Minor improvements to the input file preparation class (#180824)   via llvm-commits
• [llvm] [DTLTO][NFC] Minor improvements to the input file preparation class (PR #180824)   via llvm-commits
• [llvm] cd2761f - [RISCV] Remove vp.reverse mask check in performVP_REVERSECombine (#180724)   via llvm-commits
• [llvm] c3b6f14 - [RISCV] Remove explicitly adding spilled registers as liveins. (#180483)   via llvm-commits
• [llvm] 6b6efcd - [RISCV] Add sp register as implicit/implicit-def register to save/restore call (#180667)   via llvm-commits
• [lldb] [llvm] [llvm][lldb] Add check for incorrect target features (PR #180901)   via llvm-commits
• [llvm] [RISCV] Extend vp.reverse vp.load/vp.store combine to non-VP splice + reverse (PR #180907)   via llvm-commits
• [llvm] [RISCV] Extend vp.reverse vp.load/vp.store combine to non-VP splice + reverse (PR #180907)   via llvm-commits
• [llvm] [AMDGPU] Don't cluster DS-instrs together (PR #180908)   via llvm-commits
• [llvm] [AMDGPU] Don't cluster DS-instrs together (PR #180908)   via llvm-commits
• [llvm] [AMDGPU] Don't cluster DS-instrs together (PR #180908)   via llvm-commits
• [clang] [llvm] [HIPSPV] Add chipStar SPIR-V support for the new offload driver (PR #180903)   via llvm-commits
• [llvm] 4f551b5 - [IndVarSimplify] Add safety check for getTruncateExpr in genLoopLimit (#172234)   via llvm-commits
• [lld] [LLD][ELF][RISCV] Support big-endian RISC-V linking (PR #180912)   via llvm-commits
• [llvm] 56eb89e - [RISCV] Add precommit test for vwabda(u) combine   via llvm-commits
• [llvm] [IndVarSimplify] Add safety check for getTruncateExpr in genLoopLimit (PR #172234)   via llvm-commits
• [llvm] 6f0b8a7 - [SLP] Use the correct calling convention for vector math routines (#180759)   via llvm-commits
• [llvm] e84659b - [RISCV][CodeGen] Combine vwaddu+vabd(u) to vwabda(u)   via llvm-commits
• [llvm] [AggressiveInstCombine] POPCNT generation for bit-count pattern (PR #180917)   via llvm-commits
• [llvm] [AArch64]Add SCR2_EL3 system register (PR #180918)   via llvm-commits
• [llvm] eed35c9 - [AArch64] Avoid selecting XAR for reverse operations. (#178706)   via llvm-commits
• [llvm] [AArch64]Add SCR2_EL3 system register (PR #180918)   via llvm-commits
• [llvm] 77513e7 - [SPIRV] Add a `SPIRVTypeInst` type with some guardrails (#179947)   via llvm-commits
• [llvm] 2dcf858 - [LAA] Use SCEVPtrToAddr in tryToCreateDiffChecks. (#178861)   via llvm-commits
• [llvm] [DAGCombiner] Fix subvector extraction index for big-endian STLF (PR #180795)   via llvm-commits
• [llvm] [DAGCombiner] Fix subvector extraction index for big-endian STLF (PR #180795)   via llvm-commits
• [llvm] [DAGCombiner] Fix subvector extraction index for big-endian STLF (PR #180795)   via llvm-commits
• [llvm] [VPlan] Use ExitingIVValue for pointer inductions as well. (PR #180925)   via llvm-commits
• [llvm] [VPlan] Use ExitingIVValue for pointer inductions as well. (PR #180925)   via llvm-commits
• [clang] [llvm] [Clang][RISCV] Add Zvabd intrinsics (PR #180929)   via llvm-commits
• [llvm] [AMDGPU] Remove alignment constraint from spill pseudos (PR #177317)   via llvm-commits
• [llvm] [InstCombine] Optimise the expression `(C && A) | (!C && B)` with `FoldOrOfLogicalAnds` (PR #178438)   via llvm-commits
• [llvm] [InstCombine] Optimise the expression `(C && A) | (!C && B)` with `FoldOrOfLogicalAnds` (PR #178438)   via llvm-commits
• [llvm] 7f2b875 - [SPIRV] Replace `SPIRVType` with `SPIRVTypeInst` as much as we can (#180721)   via llvm-commits
• [flang] [llvm] [flang][mlir] Add flang to mlir lowering for dyn_groupprivate (PR #180938)   via llvm-commits
• [llvm] Revert "[WebAssembly] Mark extract.last.active as having invalid cost." (PR #180942)   via llvm-commits
• [llvm] [AsmParserContext] Fix regression after #174566 (PR #180068)   via llvm-commits
• [llvm] [bolt][aarch64] Change indirect call instrumentation snippet (PR #180229)   via llvm-commits
• [llvm] a8f2119 - [ExpandIRInsts] Support saturating fptoi (#179710)   via llvm-commits
• [llvm] [AsmParserContext] Fix regression after #174566 (PR #180068)   via llvm-commits
• [llvm] [AggressiveInstCombine] Match the pattern and generate ctlz function call (PR #177110)   via llvm-commits
• [llvm] [llvm] Add format check for MCSubtargetFeatures (PR #180943)   via llvm-commits
• [flang] [llvm] [flang][mlir] Add flang to mlir lowering for dyn_groupprivate (PR #180938)   via llvm-commits
• [flang] [llvm] [flang][mlir] Add flang to mlir lowering for dyn_groupprivate (PR #180938)   via llvm-commits
• [llvm] [VPlan] Run initial recipe simplification on VPlan0. (PR #176828)   via llvm-commits
• [llvm] [InstCombine] Fold ((X + AddC) & Mask) ^ Mask to ((Mask - AddC) - X) & Mask (PR #174278)   via llvm-commits
• [llvm] [LAA] Get conflicts in loop-invariant addresses (PR #180945)   via llvm-commits
• [llvm] [AsmParserContext] Fix regression after #174566 (PR #180068)   via llvm-commits
• [llvm] [AsmParserContext] Fix regression after #174566 (PR #180068)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor logb implementation to header-only (PR #175719)   via llvm-commits
• [llvm] [X86] Optimized ADD + ADC to ADC (PR #173543)   via llvm-commits
• [llvm] [X86] Optimized ADD + ADC to ADC (PR #173543)   via llvm-commits
• [llvm] Reapply "[MC][TableGen] Expand Opcode field of MCInstrDesc" (#180321) (PR #180954)   via llvm-commits
• [llvm] Reapply "[MC][TableGen] Expand Opcode field of MCInstrDesc" (#180321) (PR #180954)   via llvm-commits
• [llvm] Reapply "[MC][TableGen] Expand Opcode field of MCInstrDesc" (#180321) (PR #180954)   via llvm-commits
• [llvm] Reapply "[MC][TableGen] Expand Opcode field of MCInstrDesc" (#180321) (PR #180954)   via llvm-commits
• [llvm] Reapply "[MC][TableGen] Expand Opcode field of MCInstrDesc" (#180321) (PR #180954)   via llvm-commits
• [llvm] Reapply "[MC][TableGen] Expand Opcode field of MCInstrDesc" (#180321) (PR #180954)   via llvm-commits
• [llvm] [SDAG] SetCC: remove spurious extensions (PR #173110)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor logb implementation to header-only (PR #175719)   via llvm-commits
• [llvm] [SDAG] SetCC: remove spurious extensions (PR #173110)   via llvm-commits
• [llvm] [AsmParserContext] Fix regression after #174566 (PR #180068)   via llvm-commits
• [llvm] [SDAG] SetCC: remove spurious extensions (PR #173110)   via llvm-commits
• [llvm] [SDAG] SetCC: remove spurious extensions (PR #173110)   via llvm-commits
• [llvm] [SDAG] SetCC: remove spurious extensions (PR #173110)   via llvm-commits
• [llvm] [SDAG] SetCC: remove spurious extensions (PR #173110)   via llvm-commits
• [llvm] [X86] Optimized ADD + ADC to ADC (PR #173543)   via llvm-commits
• [llvm] [X86] Optimized ADD + ADC to ADC (PR #173543)   via llvm-commits
• [llvm] [AArch64][llvm] Preserve FP_TO_*_SAT VT operand in SVE scalar-combine (PR #177333)   via llvm-commits
• [llvm] [AArch64][llvm] Preserve FP_TO_*_SAT VT operand in SVE scalar-combine (PR #177333)   via llvm-commits
• [llvm] [SDAG] SetCC: remove spurious extensions (PR #173110)   via llvm-commits
• [llvm] [InstCombine] Fold ((X + AddC) & Mask) ^ Mask to ((-1 - AddC) - X) & Mask (PR #174278)   via llvm-commits
• [llvm] [InstCombine] Fold ((X + AddC) & Mask) ^ Mask to ((-1 - AddC) - X) & Mask (PR #174278)   via llvm-commits
• [llvm] [InstCombine] Fold ((X + AddC) & Mask) ^ Mask to ((-1 - AddC) - X) & Mask (PR #174278)   via llvm-commits
• [llvm] [InstCombine] Fold ((X + AddC) & Mask) ^ Mask to ((-1 - AddC) - X) & Mask (PR #174278)   via llvm-commits
• [llvm] 54177e9 - [Matrix] Use tiled loops automatically for large kernels. (#179325)   via llvm-commits
• [clang] [llvm] [LoopUnroll] Add flag to enforce loop unroll pragma regardless of expensive trip count (PR #180961)   via llvm-commits
• [llvm] [AMDGPU][ISel] `setcc` peephole for comparisons with upper 32 bits of a 64-bit register pair (PR #177662)   via llvm-commits
• [clang] [llvm] [LoopUnroll] Add flag to enforce loop unroll pragma regardless of expensive trip count (PR #180961)   via llvm-commits
• [llvm] [AMDGPU][ISel] `setcc` peephole for comparisons with upper 32 bits of a 64-bit register pair (PR #177662)   via llvm-commits
• [llvm] [AMDGPU] Treat F64 TRANS instructions as VALU for S_DELAY_ALU insertion (PR #180940)   via llvm-commits
• [llvm] [InstCombine] Fold ((X + AddC) & Mask) ^ Mask to ((-1 - AddC) - X) & Mask (PR #174278)   via llvm-commits
• [llvm] [ADT] use correct iterator_facade_base for SmallSetIterator (PR #180967)   via llvm-commits
• [llvm] 6a81656 - [RISCV] improve `musttail` support (#170547)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor `f16sqrtf` to Header Only. (PR #180749)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Move instr events code into separate function (PR #180864)   via llvm-commits
• [llvm] [InstCombine] Fold ((X + AddC) & Mask) ^ Mask to ((-1 - AddC) - X) & Mask (PR #174278)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Move instr events code into separate function (PR #180864)   via llvm-commits
• [llvm] [AsmParserContext] Fix regression after #174566 (PR #180068)   via llvm-commits
• [llvm] [NFC][TableGen] Use std::move to avoid copy (PR #180775)   via llvm-commits
• [llvm] [TableGen] Fix potential null pointer dereference in parseInstructionPattern (PR #180767)   via llvm-commits
• [llvm] [TableGen] Fix potential null pointer dereference in parseInstructionPattern (PR #180767)   via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Add register bank legalization rules for buffer atomic min max (PR #180975)   via llvm-commits
• [clang] [flang] [llvm] [mlir] [mlir][OpenMP] Translate omp.declare_simd to LLVM IR (x86) (PR #178087)   via llvm-commits
• [llvm] 0286641 - [AMDGPU] Add known bits for G_AMDGPU_COPY_SCC_VCC (#180560)   via llvm-commits
• [llvm] [AMDGPU] Add known bits for G_AMDGPU_COPY_SCC_VCC (PR #180560)   via llvm-commits
• [llvm] [ADT] use correct iterator_facade_base for SmallSetIterator (PR #180967)   via llvm-commits
• [llvm] [ADT] use correct iterator_facade_base for SmallSetIterator (PR #180967)   via llvm-commits
• [llvm] aad0ae4 - [CMake] Only pass PYTHON_EXECUTABLE to native build if defined (#180964)   via llvm-commits
• [llvm] [InstCombine] Fold ((X + AddC) & Mask) ^ Mask to (~AddC - X) & Mask (PR #174278)   via llvm-commits
• [llvm] [InstCombine] Fold ((X + AddC) & Mask) ^ Mask to (~AddC - X) & Mask (PR #174278)   via llvm-commits
• [llvm] 182eb9d - [X86] Move getTargetVShift helpers earlier in the source file. NFC. (#180972)   via llvm-commits
• [llvm] [InstCombine] Fold ((X + AddC) & Mask) ^ Mask to (~AddC - X) & Mask (PR #174278)   via llvm-commits
• [llvm] 90a56a1 - AMDGPU/GlobalISel: RegBankLegalize for global atomic ordered add (#180829)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize for global atomic ordered add (PR #180829)   via llvm-commits
• [llvm] [DAGCombiner] Fix subvector extraction index for big-endian STLF (PR #180795)   via llvm-commits
• [llvm] [LLVM][CodeGen] Add suppport for vector ConstantInt/FP to scalarConstantToHexString. (PR #180978)   via llvm-commits
• [llvm] [OFFLOAD] Add support for host offloading device (PR #177307)   via llvm-commits
• [llvm] [DAGCombiner] Fix subvector extraction index for big-endian STLF (PR #180795)   via llvm-commits
• [llvm] TableGen: Allow defining sets of runtime libraries (PR #144978)   via llvm-commits
• [llvm] [VPlan] Run more passes through `RUN_VPLAN_PASS[_NO_VERIFY]` (PR #180580)   via llvm-commits
• [llvm] [VPlan] Run more passes through `RUN_VPLAN_PASS[_NO_VERIFY]` (PR #180580)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for G_FMIN*/MAX* (PR #179778)   via llvm-commits
• [llvm] 7323cb3 - [WebAssembly] Add a WASM table to `llvm/test/MC/WebAssembly/wasm64.s`. NFC (#180861)   via llvm-commits
• [llvm] [InstCombine] Fold ((X + AddC) & Mask) ^ Mask to (~AddC - X) & Mask (PR #174278)   via llvm-commits
• [llvm] [DAGCombiner] Fix subvector extraction index for big-endian STLF (PR #180795)   via llvm-commits
• [llvm] [AMDGPU] Remove alignment constraint from spill pseudos (PR #177317)   via llvm-commits
• [llvm] [AMDGPU] Remove alignment constraint from spill pseudos (PR #177317)   via llvm-commits
• [llvm] 45412b6 - [LoopUnrollPass] Indent `LLVM_DEBUG()` messages based on our depth in the `tryToUnrollLoop()` call graph (#178945)   via llvm-commits
• [llvm] [LLVM][CodeGen] Add suppport for vector ConstantInt/FP to scalarConstantToHexString. (PR #180978)   via llvm-commits
• [llvm] [DAGCombiner] Fix subvector extraction index for big-endian STLF (PR #180795)   via llvm-commits
• [llvm] [RISC] Rename the P extensions srx/slx tests and add fshl/fshr intrinsic tests. NFC (PR #180984)   via llvm-commits
• [llvm] 81f445b - [clang-sycl-linker][offload] Set TheImageKind based on IsAOTCompileNeeded flag (#180269)   via llvm-commits
• [llvm] [llvm-reduce] Add a pass to replace unconditinal branches with returns (PR #180993)   via llvm-commits
• [llvm] 6fdf93c - Update requirements_formatting.txt.in (#180963)   via llvm-commits
• [llvm] [OFFLOAD] Extend olMemRegister API to handle cases when a memory block may have been mapped outside of liboffload. (PR #172226)   via llvm-commits
• [llvm] c6329a3 - [NFC] [MemoryTagging] pass AllocaInfo to isStandardLifetime (#180311)   via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   via llvm-commits
• [llvm] 0215f6b - [DominanceFrontier] Support post-dominators on graphs with single root (#179336)   via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   via llvm-commits
• [llvm] Allow DWARF expressions to refer to variable values (PR #181028)   via llvm-commits
• [llvm] Allow DWARF expressions to refer to variable values (PR #181028)   via llvm-commits
• [lld] [ELF] Support DW_EH_PE_sdata8 encoding in .eh_frame_hdr (PR #179089)   via llvm-commits
• [llvm] Fix for issue #177696 (PR #181047)   via llvm-commits
• [clang] [libc] [llvm] [OFFLOAD] Add support to build libc for SPIRV backend (PR #181049)   via llvm-commits
• [clang] [libc] [llvm] [OFFLOAD] Add support to build libc for SPIRV backend (PR #181049)   via llvm-commits
• [llvm] workflows/release-documentation: Add release environment (PR #181063)   via llvm-commits
• [llvm] [InstCombine] Avoid invalid bitcast across address spaces in foldIntegerTypedPHI (PR #181064)   via llvm-commits
• [llvm] Revert "[MC/DC] Make covmap tolerant of nested Decisions (#125407)" (PR #181069)   via llvm-commits
• [llvm] Revert "[MC/DC] Make covmap tolerant of nested Decisions (#125407)" (PR #181069)   via llvm-commits
• [clang] [libc] [llvm] [OFFLOAD] Add support to build libc for SPIRV backend (PR #181049)   via llvm-commits
• [clang] [libc] [llvm] [OFFLOAD] Add support to build libc for SPIRV backend (PR #181049)   via llvm-commits
• [llvm] set cmakelists init (PR #181077)   via llvm-commits
• [llvm] set cmakelists init (PR #181077)   via llvm-commits
• [llvm] set cmakelists init (PR #181077)   via llvm-commits
• [llvm] [NFC] `const`-ify argument in `promoteInternals` (readability) (PR #181079)   via llvm-commits
• [llvm] expandFMINNUM_FMAXNUM: Improve for backends with FMINIMUMNUM and FMINNUM_IEEE (PR #181083)   via llvm-commits
• [llvm] expandFMINNUM_FMAXNUM: Improve for backends with FMINIMUMNUM and FMINNUM_IEEE (PR #181083)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor `f16sqrtf` to Header Only. (PR #180749)   via llvm-commits
• [llvm] [ADT] Add is_sorted_constexpr, equivalent to C++20 std::is_sorted (PR #180867)   via llvm-commits
• [clang] [llvm] Define VP_FMINIMUMNUM and VP_FMAXIMUMNUM (PR #181084)   via llvm-commits
• [clang] [llvm] Define VP_FMINIMUMNUM and VP_FMAXIMUMNUM (PR #181084)   via llvm-commits
• [clang] [llvm] Define VP_FMINIMUMNUM and VP_FMAXIMUMNUM (PR #181084)   via llvm-commits
• [clang] [llvm] Define VP_FMINIMUMNUM and VP_FMAXIMUMNUM (PR #181084)   via llvm-commits
• [lld] [llvm] [LIT][LLD] Fix Windows test failures due to path separator mismatches (PR #179865)   via llvm-commits
• [llvm] [PowerPC] Add support for MSGSNDP instruction (PR #180974)   via llvm-commits
• [llvm] 2ff9310 - [llvm-ir2vec] Adding BB Embeddings Map API to ir2vec python bindings (#180135)   via llvm-commits
• [llvm] Define VP_FMINIMUMNUM and VP_FMAXIMUMNUM (PR #181084)   via llvm-commits
• [llvm] Define VP_FMINIMUMNUM and VP_FMAXIMUMNUM (PR #181084)   via llvm-commits
• [llvm] [llvm-dwp] Adds --prioritize-discard-path to explicitly control dwp overflow. (PR #180909)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnt][NFC] Access Waitcnt elements using InstCounterType (PR #178345)   via llvm-commits
• [lld] 8a3b830 - [ELF] Add target-specific relocation scanning for x86 (#178846)   via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] WavePrefixProduct intrinsic support (PR #179423)   via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] WavePrefixProduct intrinsic support (PR #179423)   via llvm-commits
• [llvm] 0675fa4 - [llvm-dwp] Adds --prioritize-discard-path to explicitly control dwp overflow order. (#180909)   via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] WavePrefixProduct intrinsic support (PR #179423)   via llvm-commits
• [libc] [llvm] Refactor bf16addf128 to header only (PR #181058)   via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #180467)   via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #180467)   via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #180467)   via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #180467)   via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #180467)   via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #180467)   via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #180467)   via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #180467)   via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #180467)   via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] WavePrefixProduct intrinsic support (PR #179423)   via llvm-commits
• [llvm] [NFC][TableGen] Use std::move to avoid copy (PR #180775)   via llvm-commits
• [llvm] 3ed9bd6 - [NFC][TableGen] Use std::move to avoid copy (#180775)   via llvm-commits
• [llvm] [NFC][TableGen] Use std::move to avoid copy (PR #180775)   via llvm-commits
• [llvm] [InstCombine] Fold ((X + AddC) & Mask) ^ Mask to (~AddC - X) & Mask (PR #174278)   via llvm-commits
• [llvm] [InstCombine] Fold ((X + AddC) & Mask) ^ Mask to (~AddC - X) & Mask (PR #174278)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Drop IsExpertMode and MaxCounter member variables (PR #181092)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Drop IsExpertMode and MaxCounter member variables (PR #181092)   via llvm-commits
• [llvm] [IndVars] Use context for proving same sign (PR #181093)   via llvm-commits
• [llvm] [IndVars] Use context for proving same sign (PR #181093)   via llvm-commits
• [llvm] [IndVars] Use context for proving same sign (PR #181093)   via llvm-commits
• [llvm] [AMDGPU][NFC] Minor source cleanups in SIInsertWaitcnts (PR #181095)   via llvm-commits
• [llvm] [AMDGPU] Remove alignment constraint from spill pseudos (PR #177317)   via llvm-commits
• [llvm] [WebAssembly] Print type signature and table for call_indirect (PR #179120)   via llvm-commits
• [llvm] [WebAssembly] Print type signature and table for call_indirect (PR #179120)   via llvm-commits
• [llvm] [RISCV] Move NSRL/NSRA isel to tablegen. NFC (PR #181096)   via llvm-commits
• [llvm] [AMDGPU][Scheduler] Fix inconsistent MI slots after rematerialization revert (PR #180646)   via llvm-commits
• [llvm] 5ec5701 - Reapply "[MC][TableGen] Expand Opcode field of MCInstrDesc" (#180321) (#180954)   via llvm-commits
• [llvm] Reapply "[MC][TableGen] Expand Opcode field of MCInstrDesc" (#180321) (PR #180954)   via llvm-commits
• [llvm] [AMDGPU] Add missing assert requirement to unit test (PR #181102)   via llvm-commits
• [llvm] [AMDGPU] Add missing assert requirement to unit test (PR #181102)   via llvm-commits
• [llvm] 5fe60e9 - [SDAG] Copy flags in convertMask when legalizing vselect/setcc (#180979)   via llvm-commits
• [llvm] 36dbe53 - [AArch64][ISel] Add clmul to pmullb/t lowering (#180568)   via llvm-commits
• [llvm] [CodeGen] Improve `getLoadExtAction` and friends (PR #181104)   via llvm-commits
• [llvm] [CodeGen] Improve `getLoadExtAction` and friends (PR #181104)   via llvm-commits
• [llvm] [CodeGen] Improve `getLoadExtAction` and friends (PR #181104)   via llvm-commits
• [llvm] [DAGCombiner] Fix subvector extraction index for big-endian STLF (PR #180795)   via llvm-commits
• [llvm] [WebAssembly] Print type signature and table for call_indirect (PR #179120)   via llvm-commits
• [llvm] [llvm][lli] fix lli crash when run variable arguments function as a interpret (PR #173719)   via llvm-commits
• [llvm] expandFMINNUM_FMAXNUM: Improve for backends with FMINIMUMNUM and FMINNUM_IEEE (PR #181083)   via llvm-commits
• [llvm] expandFMINNUM_FMAXNUM: Improve for backends with FMINIMUMNUM and FMINNUM_IEEE (PR #181083)   via llvm-commits
• [llvm] efab96c - [AMDGPU] Add missing assert requirement to unit test (#181102)   via llvm-commits
• [llvm] [llvm][lli] fix lli crash when run variable arguments function as a interpret (PR #173719)   via llvm-commits
• [llvm] [AMDGPU] Remove alignment constraint from spill pseudos (PR #177317)   via llvm-commits
• [llvm] [AMDGPU] Remove alignment constraint from spill pseudos (PR #177317)   via llvm-commits
• [lldb] [llvm] [lldb-dap] Add unknown request handler (PR #181109)   via llvm-commits
• [lldb] [llvm] [lldb-dap] Add unknown request handler (PR #181109)   via llvm-commits
• [llvm] [WebAssembly] Print type signature and table for call_indirect (PR #179120)   via llvm-commits
• [llvm] 6117bdd - [DAGCombiner] Fix subvector extraction index for big-endian STLF (#180795)   via llvm-commits
• [llvm] [DAGCombiner] Fix subvector extraction index for big-endian STLF (PR #180795)   via llvm-commits
• [llvm] [AMDGPU] Remove alignment constraint from spill pseudos (PR #177317)   via llvm-commits
• [llvm] [AMDGPU] Remove alignment constraint from spill pseudos (PR #177317)   via llvm-commits
• [llvm] [SDAG] Canonicalize compare of abd? (PR #180952)   via llvm-commits
• [llvm] 6420099 - [SelectionDAG] Make sure demanded lanes for AND/MUL-by-zero are frozen (#180727)   via llvm-commits
• [llvm] [ValueTracking] Extend computeConstantRange for add/sub, sext/zext/trunc (PR #181110)   via llvm-commits
• [llvm] [SimplifyCFG] Optimize select over pointers to eliminate no-op load/store (PR #179277)   via llvm-commits
• [llvm] [SDAG] SetCC: remove spurious extensions (PR #173110)   via llvm-commits
• [llvm] Reapply "[msan] Switch switch() from strict handling to (icmp eq)-style handling" (#180636) (PR #181112)   via llvm-commits
• [llvm] Reapply "[msan] Switch switch() from strict handling to (icmp eq)-style handling" (#180636) (PR #181112)   via llvm-commits
• [llvm] [X86] Remove LowerFCanonicalize and use generic expansion (PR #147877)   via llvm-commits
• [llvm] [DAG] fix wrong type check in DAGCombiner::visitSRA (PR #153762)   via llvm-commits
• [llvm] [LLVM] Refine MemoryEffect handling for target-specific intrinsics (PR #155590)   via llvm-commits
• [llvm] [ValueTracking] Extend computeConstantRange for add/sub, sext/zext/trunc (PR #181110)   via llvm-commits
• [llvm] [ValueTracking] Extend computeConstantRange for add/sub, sext/zext/trunc (PR #181110)   via llvm-commits
• [llvm] [SelectionDAG] Make sure demanded lanes for AND/MUL-by-zero are frozen (PR #180727)   via llvm-commits
• [llvm] db26124 - [AArch64]Add SCR2_EL3 system register (#180918)   via llvm-commits
• [llvm] [AArch64]Add SCR2_EL3 system register (PR #180918)   via llvm-commits
• [llvm] [AArch64]Add SCR2_EL3 system register (PR #180918)   via llvm-commits
• [llvm] [AArch64]Add SCR2_EL3 system register (PR #180918)   via llvm-commits
• [llvm] 3c8016c - [AArch64] Eliminate XTN/SSHLL for vector splats (#180913)   via llvm-commits
• [llvm] [AArch64]Add SCR2_EL3 system register (PR #180918)   via llvm-commits
• [llvm] [SelectionDAG] Make sure demanded lanes for AND/MUL-by-zero are frozen (PR #180727)   via llvm-commits
• [llvm] 838be78 - [AArch64][ISel] Lower fixed-width i64 vector CLMUL intrinsics (#178876)   via llvm-commits
• [llvm] [InstCombine] Fix #163110: Fold icmp (shl X, L), (add (shl Y, L), 1<<L) to icmp X, (Y + 1) (PR #165975)   via llvm-commits
• [llvm] [LV] Run VPlan licm late in executePlan (PR #181122)   via llvm-commits
• [llvm] [LV] Run VPlan licm late in executePlan (PR #181122)   via llvm-commits
• [llvm] [AggressiveInstCombine] Create zext during store merge (PR #181125)   via llvm-commits
• [llvm] [GlobalISel] Add integer combines from SelectionDAG (PR #181126)   via llvm-commits
• [llvm] [GlobalISel] Add integer combines from SelectionDAG (PR #181126)   via llvm-commits
• [llvm] [NFC][AMDGPU] Remove unused/unimplemented `getWavesPerEU` variants (PR #181131)   via llvm-commits
• [llvm] [LV] Add LoopVectorize/VPlan subdirectory for VPlan printing tests. (PR #180611)   via llvm-commits
• [llvm] [GlobalISel] Add integer combines from SelectionDAG (PR #181126)   via llvm-commits
• [llvm] [GlobalISel] Add integer combines from SelectionDAG (PR #181126)   via llvm-commits
• [llvm] [GlobalISel] Add sub_same_val rewrites from SelectionDAG (PR #181134)   via llvm-commits
• [llvm] [GlobalISel] Add sub_same_val rewrites from SelectionDAG (PR #181134)   via llvm-commits
• [llvm] [GlobalISel] Add sub_same_val rewrites from SelectionDAG (PR #181134)   via llvm-commits
• [llvm] [GlobalISel] Add sub_same_val rewrites from SelectionDAG (PR #181134)   via llvm-commits
• [llvm] 0c70489 - [NFC][AMDGPU] Remove unused/unimplemented `getWavesPerEU` variants (#181131)   via llvm-commits
• [llvm] Add DW_LNAME_HIP (PR #180999)   via llvm-commits
• [llvm] 4fef5e4 - [NFC][AMDGPU] Remove unused `getLDSSize` (#181133)   via llvm-commits
• [llvm] 2223b93 - [VPlan] Introduce m_c_Logical(And|Or) (#180048)   via llvm-commits
• [llvm] f32bd39 - [Hexagon] Update maintainers (#177935)   via llvm-commits
• [llvm] dcb38a4 - [ReleaseNotes] Create subheader for LLDB/FreeBSD (#181000)   via llvm-commits
• [llvm] 4167b28 - [AggressiveInstCombine] Create zext during store merge (#181125)   via llvm-commits
• [llvm] `dwarf2yaml.cpp` optimizations (PR #179048)   via llvm-commits
• [llvm] [VPlan] Remove non-reductions after simplifications. (PR #176795)   via llvm-commits
• [llvm] [VPlan] Remove non-reductions after simplifications. (PR #176795)   via llvm-commits
• [llvm] [VPlan] Remove non-reductions after simplifications. (PR #176795)   via llvm-commits
• [llvm] [VPlan] Remove non-reductions after simplifications. (PR #176795)   via llvm-commits
• [llvm] [VPlan] Remove non-reductions after simplifications. (PR #176795)   via llvm-commits
• [llvm] [VPlan] Remove non-reductions after simplifications. (PR #176795)   via llvm-commits
• [llvm] [VPlan] Remove non-reductions after simplifications. (PR #176795)   via llvm-commits
• [llvm] [VPlan] Remove non-reductions after simplifications. (PR #176795)   via llvm-commits
• [llvm] [VPlan] Remove non-reductions after simplifications. (PR #176795)   via llvm-commits
• [llvm] [VPlan] Remove non-reductions after simplifications. (PR #176795)   via llvm-commits
• [llvm] [VPlan] Remove non-reductions after simplifications. (PR #176795)   via llvm-commits
• [llvm] [SelectionDAG] Make sure demanded lanes for AND/MUL-by-zero are frozen (PR #180727)   via llvm-commits
• [llvm] [DAGCombiner] Fix subvector extraction index for big-endian STLF (PR #180795)   via llvm-commits
• [llvm] [LoopIdiomVectorize] Bail when vectorization is disabled (PR #181142)   via llvm-commits
• [llvm] 8e1d5ec - [LV] Add LoopVectorize/VPlan subdirectory for VPlan printing tests. (#180611)   via llvm-commits
• [llvm] [MC] Support specifying unwind handler in Masm proc directive (PR #181152)   via llvm-commits
• [llvm] [MC] Support specifying unwind handler in Masm proc directive (PR #181152)   via llvm-commits
• [llvm] [ADT] Allow member pointers in map_range and map_to_vector (PR #181154)   via llvm-commits
• [llvm] 8a2255f - [IR] Change getParamIndexForOptionalMask to assume masked parameter is last (#180558)   via llvm-commits
• [llvm] [ADT] Allow member pointers in map_range and map_to_vector (PR #181154)   via llvm-commits
• [llvm] [MC][ARM] Don't set funcs to Thumb as a side effect of .hidden (PR #181156)   via llvm-commits
• [llvm] 3482a9c - [VPlan] Explicitly reassociate header mask in logical and (#180898)   via llvm-commits
• [llvm] 00a8cb4 - [RISCV] Move NSRL/NSRA isel to tablegen. NFC (#181096)   via llvm-commits
• [llvm] 574d799 - [DebugInfo] DWARFFormValue use formatv instead of format (#180498)   via llvm-commits
• [llvm] [AArch64] Prefer SVE for fixed-length [S|U][MIN|MAX] reductions (PR #181161)   via llvm-commits
• [llvm] 1c62781 - [llvm-mc-assemble-fuzzer] Fix Triple passing (#181135)   via llvm-commits
• [llvm] 97bd838 - [llvm][DebugInfo] Allow anonymous basic types (#180016)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Combine to sqxtn pre legalization for FewerElements (PR #181163)   via llvm-commits
• [llvm] Fix Bazel build for b20d7d0 (PR #181164)   via llvm-commits
• [llvm] [bazel] Fix Bazel build for b20d7d0 (PR #181164)   via llvm-commits
• [llvm] [CodeGen] Expand power-of-2 div/rem at IR level in ExpandIRInsts. (PR #180654)   via llvm-commits
• [llvm] [bazel] Fix Bazel build for b20d7d0 (PR #181164)   via llvm-commits
• [llvm] 2d53aab - In-class initialize DenseMapBase members. (#177168)   via llvm-commits
• [llvm] [ADT] Allow member pointers in map_range and map_to_vector (PR #181154)   via llvm-commits
• [llvm] [ADT] Allow member pointers in map_range and map_to_vector (PR #181154)   via llvm-commits
• [llvm] [bazel] Fix Bazel build for b20d7d0 (PR #181164)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor logb implementation to header-only (PR #175719)   via llvm-commits
• [llvm] [WebAssembly] Print type signature and table for call_indirect (PR #179120)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor logb implementation to header-only (PR #175719)   via llvm-commits
• [llvm] [SLP]Initial compatibility support for shl v, 1 and add v, v (PR #181168)   via llvm-commits
• [llvm] [SLP]Initial compatibility support for shl v, 1 and add v, v (PR #181168)   via llvm-commits
• [llvm] [SLP]Initial compatibility support for shl v, 1 and add v, v (PR #181168)   via llvm-commits
• [llvm] [bazel] Fix Bazel build for b20d7d0 (PR #181164)   via llvm-commits
• [llvm] [SCEV] Discard samesign when analyzing loop invariant exits (PR #181171)   via llvm-commits
• [llvm] e9d3dd2 - [AArch64][llvm] Preserve FP_TO_*_SAT VT operand in SVE scalar-combine (#177333)   via llvm-commits
• [llvm] 85e07ba - [InstructionSimplify] Extend simplifyICmpWithZero to handle equivalent zero RHS (#179055)   via llvm-commits
• [llvm] [Tablegen] Patch RegUnitIntervals Initialization (PR #181173)   via llvm-commits
• [llvm] [X86] Add test for VPBLENDW Tuning (PR #179906)   via llvm-commits
• [llvm] [Tablegen] Patch RegUnitIntervals Initialization (PR #181173)   via llvm-commits
• [llvm] [X86] Add test for VPBLENDW Tuning (PR #179906)   via llvm-commits
• [llvm] d8ebb80 - [AsmParserContext] Fix regression after #174566 (#180068)   via llvm-commits
• [llvm] [DAGCombine] Fix crash caused by illegal InterVT in ForwardStoreValueToDirectLoad (PR #181175)   via llvm-commits
• [llvm] [DAGCombine] Fix crash caused by illegal InterVT in ForwardStoreValueToDirectLoad (PR #181175)   via llvm-commits
• [llvm] [DAGCombine] Fix crash caused by illegal InterVT in ForwardStoreValueToDirectLoad (PR #181175)   via llvm-commits
• [llvm] [DAGCombiner] Fix crash caused by illegal InterVT in ForwardStoreValueToDirectLoad (PR #181175)   via llvm-commits
• [llvm] [BOLT][AArch64] Add a unittest for compare-and-branch inversion. (PR #181177)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Clean up loop (PR #179572)   via llvm-commits
• [llvm] [InstCombine] Canonicalize zext+overflow check to overflow check if zext's only purpose is to check overflow (PR #179505)   via llvm-commits
• [llvm] [VPlan] Explicitly reassociate header mask in logical and (PR #180898)   via llvm-commits
• [llvm] [VPlan] Explicitly reassociate header mask in logical and (PR #180898)   via llvm-commits
• [llvm] [VPlan] Explicitly reassociate header mask in logical and (PR #180898)   via llvm-commits
• [llvm] [VPlan] Explicitly reassociate header mask in logical and (PR #180898)   via llvm-commits
• [llvm] [VPlan] Explicitly reassociate header mask in logical and (PR #180898)   via llvm-commits
• [llvm] [VPlan] Explicitly reassociate header mask in logical and (PR #180898)   via llvm-commits
• [llvm] [VPlan] Explicitly reassociate header mask in logical and (PR #180898)   via llvm-commits
• [llvm] [BOLT][AArch64] Add a unittest for compare-and-branch inversion. (PR #181177)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Clean up loop (PR #179572)   via llvm-commits
• [llvm] [VPlan] Explicitly reassociate header mask in logical and (PR #180898)   via llvm-commits
• [llvm] [VPlan] Explicitly reassociate header mask in logical and (PR #180898)   via llvm-commits
• [llvm] 2de6d98 - [AArch64][llvm] Allow FPRCVT insns to run in streaming mode if safe (#177334)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Move instr events code into separate function (PR #180864)   via llvm-commits
• [llvm] [NFC] Pre-Commit test case for __builtin_ppc_test_data_class (PR #181181)   via llvm-commits
• [llvm] [WebAssembly] Print type signature and table for call_indirect (PR #179120)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Drop IsExpertMode and MaxCounter member variables (PR #181092)   via llvm-commits
• [llvm] [bazel] Fix Bazel build for b20d7d0 (PR #181164)   via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #180467)   via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #180467)   via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #180467)   via llvm-commits
• [llvm] [InstCombine] Fold ((X + AddC) & Mask) ^ Mask to (~AddC - X) & Mask (PR #174278)   via llvm-commits
• [llvm] Add const check (PR #181190)   via llvm-commits
• [llvm] Add const check (PR #181190)   via llvm-commits
• [llvm] [InstCombine] Fold ((X + AddC) & Mask) ^ Mask to (~AddC - X) & Mask (PR #174278)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Clean up loop (PR #179572)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Clean up loop (PR #179572)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Drop IsExpertMode and MaxCounter member variables (PR #181092)   via llvm-commits
• [llvm] 95ef1a5 - [SLP] Use the correct identity when combining binary opcodes with AND/MUL (#180457)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Drop MaxCounter member variable (PR #181092)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Drop MaxCounter member variable (PR #181092)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Drop MaxCounter member variable (PR #181092)   via llvm-commits
• [llvm] [Github] Make prune-unused-branches workflow save branch list (PR #181194)   via llvm-commits
• [llvm] [Github] Make prune-unused-branches workflow save branch list (PR #181194)   via llvm-commits
• [llvm] [InstCombine] Fold ((X + AddC) & Mask) ^ Mask to (~AddC - X) & Mask (PR #174278)   via llvm-commits
• [llvm] [InstCombine] Fold ((X + AddC) & Mask) ^ Mask to (~AddC - X) & Mask (PR #174278)   via llvm-commits
• [llvm] [RISCV] Remove RISCVISD::WMACC*. Match during isel. NFC (PR #181197)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Clean up loop (PR #179572)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Clean up loop (PR #179572)   via llvm-commits
• [llvm] 1de1a76 - [ADT] Add const check to MutableArrayRef constructor (#181190)   via llvm-commits
• [llvm] Add const check (PR #181190)   via llvm-commits
• [lld] [lld][MachO] Accept prefixed boundary symbol names (PR #181201)   via llvm-commits
• [llvm] [Github] Use format-patch instead of diff in prune-unused-branches (PR #181200)   via llvm-commits
• [lld] [lld][MachO] Accept prefixed boundary symbol names (PR #181201)   via llvm-commits
• [llvm] [Hexagon] Fix APInt assertion in getBuildVectorConstInts (PR #181202)   via llvm-commits
• [llvm] workflows/commit-access-reivew: Use concurrency to speed up script (PR #181204)   via llvm-commits
• [llvm] workflows/commit-access-reivew: Use concurrency to speed up script (PR #181204)   via llvm-commits
• [libc] [llvm] Refactor bf16addf128 to header only (PR #181058)   via llvm-commits
• [libc] [llvm] Refactor bf16addf128 to header only (PR #181058)   via llvm-commits
• [libc] [llvm] Refactor bf16addf128 to header only (PR #181058)   via llvm-commits
• [libc] [llvm] Refactor bf16addf128 to header only (PR #181058)   via llvm-commits
• [libc] [llvm] Refactor bf16addf128 to header only (PR #181058)   via llvm-commits
• [libc] [llvm] Refactor bf16addf128 to header only (PR #181058)   via llvm-commits
• [llvm] [SystemZ][z/OS] Migrate most test case to use HLASM syntax (PR #181222)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for G_EXTRACT (PR #181036)   via llvm-commits
• [llvm] [RISCV] Use FSHR in LowerShiftRightParts for P extension on RV64. (PR #181234)   via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for buffer load lds intrinsics (PR #180998)   via llvm-commits
• [llvm] 6be2e89 - [MemProf] Emit richer optimization remarks for single-type allocations (#181089)   via llvm-commits
• [flang] [llvm] [flang-rt] Implement basic support for I/O from OpenMP GPU Offloading (PR #181039)   via llvm-commits
• [llvm] Revert "[MC/DC] Make covmap tolerant of nested Decisions (#125407)" (PR #181069)   via llvm-commits
• [llvm] 96c7a11 - [RISCV] Combine Xqci Extensions in Arch Strings (#181033)   via llvm-commits
• [llvm] [bazel] Fix after #181026 (PR #181260)   via llvm-commits
• [llvm] [Support] Support 5-component VersionTuples (PR #181275)   via llvm-commits
• [llvm] [Support] Support 5-component VersionTuples (PR #181275)   via llvm-commits
• [llvm] [RISCV] Update Andes45 vector floating-point arithmetic scheduling info (PR #181289)   via llvm-commits
• [llvm] [AMDGPU] fix eliminateFrameIndex to use SGPR frame index (PR #178991)   via llvm-commits
• [llvm] [AMDGPU] fix eliminateFrameIndex to use SGPR frame index (PR #178991)   via llvm-commits
• [llvm] [IndVarSimplify] Add safety check for getTruncateExpr in genLoopLimit (PR #181296)   via llvm-commits
• [llvm] [RISCV] Stash GPR to FPR if emergency spill slot is not reachable (PR #180685)   via llvm-commits
• [lld] 685507d - Revert "[ELF] Add target-specific relocation scanning for x86" (#181274)   via llvm-commits
• [llvm] [WebAssembly] Print type signature and table for call_indirect (PR #179120)   via llvm-commits
• [llvm] [WebAssembly] Print type signature and table for call_indirect (PR #179120)   via llvm-commits
• [llvm] [GlobalISel] Add G_UDIV/G_SDIV computeKnownBits (PR #181307)   via llvm-commits
• [llvm] [NVPTX] Cleanup NVPTXLowerArgs, simplifying logic and improving alignment propagation (PR #180286)   via llvm-commits
• [llvm] [IndVarSimplify] Add safety check for getTruncateExpr in genLoopLimit (PR #181296)   via llvm-commits
• [llvm] [GlobalISel] Add G_UDIV/G_SDIV computeKnownBits (PR #181307)   via llvm-commits
• [llvm] [GlobalISel] Add G_UDIV/G_SDIV computeKnownBits (PR #181307)   via llvm-commits
• [llvm] Add XCOFF object file support in sanitizer coverage tool (PR #179884)   via llvm-commits
• [llvm] a89e766 - [IndVarSimplify] Add safety check for getTruncateExpr in genLoopLimit (#181296)   via llvm-commits
• [llvm] a809d64 - [RISCV] Remove RISCVISD::WMACC*. Match during isel. NFC (#181197)   via llvm-commits
• [flang] [llvm] [flang][cuda] Add CUFSetAssociatedStream entry point (PR #181313)   via llvm-commits
• [llvm] 5ab9cbe - [ARM] Precommit tests: strictfp rounding vector intrinsics (#180479)   via llvm-commits
• [clang] [libc] [llvm] [OFFLOAD] Add support to build libc for SPIRV backend (PR #181049)   via llvm-commits
• [llvm] [SelectionDAG] Optimize 32-bit udiv with 33-bit magic constants on 64-bit targets (PR #181288)   via llvm-commits
• [clang] [libc] [llvm] [OFFLOAD] Add support to build libc for SPIRV backend (PR #181049)   via llvm-commits
• [llvm] [RISCV] In tryWideningMulAcc, check multiple users before checking operand 1. (PR #181321)   via llvm-commits
• [lldb] [llvm] lldb] Add ScriptedSymbolLocator plugin for source file resolution (PR #181324)   via llvm-commits
• [llvm] 420047c - [AArch64] Fix active.lane.mask(0, cttz.elts(x)) -> 'brkb' transform (#180177)   via llvm-commits
• [llvm] [VPlan] Remove unused VPExpandSCEVRecipe before expansion (PR #181329)   via llvm-commits
• [llvm] [TailRecElim] Introduce support for shift accumulator optimization (PR #181331)   via llvm-commits
• [llvm] [TailRecElim] Introduce support for shift accumulator optimization (PR #181331)   via llvm-commits
• [lld] Revert "[LLD] Add support for statically resolved vendor-specific RISCV relocations. (#169273)" (PR #181336)   via llvm-commits
• [llvm] ca8082f - [InstCombine] Fold ((X + AddC) & Mask) ^ Mask to (~AddC - X) & Mask (#174278)   via llvm-commits
• [llvm] [InstCombine] Fold ((X + AddC) & Mask) ^ Mask to (~AddC - X) & Mask (PR #174278)   via llvm-commits
• [llvm] 0f8325c - Revert "[WebAssembly] Mark extract.last.active as having invalid cost." (#180942)   via llvm-commits
• [llvm] [OFFLOAD] Add support for host offloading device (PR #177307)   via llvm-commits
• [llvm] [X86] Avoid lowering `llrint` via x87 on non-x87 targets (PR #181339)   via llvm-commits
• [llvm] [Support] Fixup for formatting hex on 32 bit (PR #181338)   via llvm-commits
• [llvm] [Support] Fixup for formatting hex on 32 bit (PR #181338)   via llvm-commits
• [llvm] 0ad941a - Revert "Revert "[WebAssembly] Mark extract.last.active as having invalid cost."" (#181342)   via llvm-commits
• [llvm] Revert "Revert "[WebAssembly] Mark extract.last.active as having invalid cost."" (PR #181342)   via llvm-commits
• [llvm] [ValueTracking] Conservative nosync check prevents vectorization (PR #181345)   via llvm-commits
• [llvm] [ValueTracking] Conservative nosync check prevents vectorization (PR #181345)   via llvm-commits
• [libc] [llvm] Refactor bf16addf128 to header only (PR #181058)   via llvm-commits
• [libc] [llvm] Refactor bf16addf128 to header only (PR #181058)   via llvm-commits
• [llvm] [OFFLOAD] Fix issue where host plugin is added twice to the plugin list (PR #181346)   via llvm-commits
• [llvm] fe413f7 - [SCEV] Discard samesign when analyzing loop invariant exits (#181171)   via llvm-commits
• [llvm] [ValueTracking] Conservative nosync check prevents vectorization (PR #181345)   via llvm-commits
• [llvm] [ValueTracking] Conservative nosync check prevents vectorization (PR #181345)   via llvm-commits
• [llvm] [GlobalISel][LLT] Introduce FPInfo for LLT (Enable bfloat, ppc128float and others in GlobalISel) (PR #155107)   via llvm-commits
• [llvm] [GlobalISel][LLT] Introduce FPInfo for LLT (Enable bfloat, ppc128float and others in GlobalISel) (PR #155107)   via llvm-commits
• [llvm] [DAGCombiner] Fix crash caused by illegal InterVT in ForwardStoreValueToDirectLoad (PR #181175)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor hypotf16 to Header Only. (PR #180511)   via llvm-commits
• [clang] [flang] [llvm] [InstCombine] Canonicalize GEP source element types (PR #180745)   via llvm-commits
• [clang] [flang] [llvm] [InstCombine] Canonicalize GEP source element types (PR #180745)   via llvm-commits
• [clang] [flang] [llvm] [InstCombine] Canonicalize GEP source element types (PR #180745)   via llvm-commits
• [llvm] a55fbab - [VPlan] Run initial recipe simplification on VPlan0. (#176828)   via llvm-commits
• [llvm] cf95ad1 - [llubi] Add support for integer arithmetic ops (#181224)   via llvm-commits
• [llvm] Revert "workflows: Use main-branch-only environment when using ISSUE_SUBSCRIBER_TOKEN (#179990)" (PR #181352)   via llvm-commits
• [llvm] 655edda - [llvm-otool] Fix error messages to use -p instead of --dis-symname (#181225)   via llvm-commits
• [llvm] [LV] Support argmin/argmax with strict predicates. (PR #170223)   via llvm-commits
• [llvm] [LV] Support argmin/argmax with strict predicates. (PR #170223)   via llvm-commits
• [llvm] [LV] Support argmin/argmax with strict predicates. (PR #170223)   via llvm-commits
• [llvm] [LV] Support argmin/argmax with strict predicates. (PR #170223)   via llvm-commits
• [llvm] [LV] Support argmin/argmax with strict predicates. (PR #170223)   via llvm-commits
• [llvm] [LV] Support argmin/argmax with strict predicates. (PR #170223)   via llvm-commits
• [llvm] [LV] Support argmin/argmax with strict predicates. (PR #170223)   via llvm-commits
• [llvm] [LV] Support argmin/argmax with strict predicates. (PR #170223)   via llvm-commits
• [llvm] [LV] Support argmin/argmax with strict predicates. (PR #170223)   via llvm-commits
• [llvm] [LV] Support argmin/argmax with strict predicates. (PR #170223)   via llvm-commits
• [llvm] [LV] Support argmin/argmax with strict predicates. (PR #170223)   via llvm-commits
• [llvm] [LV] Support argmin/argmax with strict predicates. (PR #170223)   via llvm-commits
• [llvm] [LV] Support argmin/argmax with strict predicates. (PR #170223)   via llvm-commits
• [llvm] [X86] Correctly call 16 byte atomic helpers on x86_64 Windows (PR #181356)   via llvm-commits
• [llvm] b447f5d - [lldb-dap] Add unknown request handler (#181109)   via llvm-commits
• [llvm] [InstCombine] Optimise the expression `(C && A) || (!C && B)` with `FoldOrOfLogicalAnds` (PR #178438)   via llvm-commits
• [llvm] [StackSlotColoring] Check for zero stack slot size in RemoveDeadStores (PR #82331)   via llvm-commits
• [llvm] [VPlan] Use ExitingIVValue for pointer inductions as well. (PR #180925)   via llvm-commits
• [llvm] [mlir] [OMPIRBuilder] Hoist alloca's to entry blocks of compiler-emitted GPU reduction functions (PR #181359)   via llvm-commits
• [llvm] [mlir] [OMPIRBuilder] Hoist alloca's to entry blocks of compiler-emitted GPU reduction functions (PR #181359)   via llvm-commits
• [llvm] [Hexagon] Handle truncating COPY from DoubleRegs to IntRegs (PR #181360)   via llvm-commits
• [llvm] [Hexagon] Fix extractHvxSubvectorPred shuffle mask for small predicates (PR #181364)   via llvm-commits
• [llvm] [Hexagon] Fix extractHvxSubvectorPred shuffle mask for small predicates (PR #181364)   via llvm-commits
• [clang] [llvm] [IR] Add ConstantExpr::getPtrAdd() (PR #181365)   via llvm-commits
• [clang] [llvm] [IR] Add ConstantExpr::getPtrAdd() (PR #181365)   via llvm-commits
• [clang] [llvm] [IR] Add ConstantExpr::getPtrAdd() (PR #181365)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor sqrti to header-only (PR #177960)   via llvm-commits
• [llvm] [CodeGen] Don't merge stack slots accessed with volatile after setjmp (returns twice) calls (PR #181370)   via llvm-commits
• [llvm] [X86] Optimized ADD + ADC to ADC (PR #173543)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16addf to header only (PR #181230)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16addf128 to header only (PR #181058)   via llvm-commits
• [llvm] Add HexagonGlobalScheduler pass (PR #180803)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor ffma implementation to header-only in src/__support/math folder (PR #175304)   via llvm-commits
• [llvm] [ARM] Only change mask if demanded bits says we can optimize (PR #165106)   via llvm-commits
• [llvm] 892ac61 - Add HexagonGlobalScheduler pass (#180803)   via llvm-commits
• [llvm] Enable machine combiner pass for ARM (PR #159466)   via llvm-commits
• [llvm] [Hexagon] Fix SplitVectors crash in HVX type legalization (PR #181377)   via llvm-commits
• [llvm] ec0b22f - [VPlan] Reuse introduces-broadcast logic in narrowToSingleScalars (#174444)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor ffma implementation to header-only in src/__support/math folder (PR #175304)   via llvm-commits
• [lldb] [llvm] [lldb-dap] Add unknown request handler (PR #181109)   via llvm-commits
• [clang] [llvm] [clang][bytecode] fix assertion failure on invalid init list (GH175432) (PR #180261)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor ffma implementation to header-only in src/__support/math folder (PR #175304)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor logb implementation to header-only (PR #175719)   via llvm-commits
• [llvm] 94b5adc - [Github] Update requirements_formatting.txt (#181184)   via llvm-commits
• [llvm] [X86] Optimized ADD + ADC to ADC (PR #173543)   via llvm-commits
• [clang] [llvm] [clang][bytecode] fix assertion failure on invalid init list (GH175432) (PR #180261)   via llvm-commits
• [clang] [llvm] [clang][bytecode] fix assertion failure on invalid init list (GH175432) (PR #180261)   via llvm-commits
• [llvm] ede1a96 - [LV] Vectorize early exit loops with multiple exits. (#174864)   via llvm-commits
• [llvm] 9deb4fd - [CodeGen][AMDGPU] TwoAddress: Only skip undef COPY at REG_SEQUENCE lowering when there is Live info or no uses for subreg (#175598)   via llvm-commits
• [llvm] [CodeGen][AMDGPU] TwoAddress: Only skip undef COPY at REG_SEQUENCE lowering when there is Live info or no uses for subreg (PR #175598)   via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   via llvm-commits
• [llvm] b39ab2e - [RISCV] Use PADD_DW instead of ADDD for GPRPair copy on RV32 with P extension (#181316)   via llvm-commits
• [llvm] 211314d - [ADT] Add is_sorted_constexpr, equivalent to C++20 std::is_sorted (#180867)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16add to header only (PR #181392)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16add to header only (PR #181392)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16add to header only (PR #181392)   via llvm-commits
• [clang] [flang] [llvm] [mlir] [mlir][OpenMP] Translate omp.declare_simd to LLVM IR (x86) (PR #178087)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16add to header only (PR #181392)   via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   via llvm-commits
• [llvm] [OCaml] Adding back OCaml Kaleidoscope tutorial (PR #181394)   via llvm-commits
• [llvm] [llubi] Add basic support for terminators (PR #181393)   via llvm-commits
• [llvm] a1d12e9 - [NFC] [IndVars] test for multiple bounds for predicate-loop-traps   via llvm-commits
• [clang] [flang] [llvm] [mlir] [mlir][OpenMP] Translate omp.declare_simd to LLVM IR (x86) (PR #178087)   via llvm-commits
• [llvm] e4c30c1 - [SPIRV] Extend lowering of variadic functions (#178980)   via llvm-commits
• [llvm] [RISCV] Combine ADDD(lo, hi, x, 0) -> WADDAU(lo, hi, x, 0). Combine WADDAU (WADDAU lo, hi, x, 0), y, 0 -> WADDAU lo, hi, x, y (PR #181396)   via llvm-commits
• [llvm] [SLP][NFC] Use static_assert to confirm SupportedOps is sorted (PR #181397)   via llvm-commits
• [llvm] [SLP][NFC] Use static_assert to confirm SupportedOps is sorted (PR #181397)   via llvm-commits
• [llvm] [AMDGPU][NFC] Enable RegistersAreIntervals (PR #181398)   via llvm-commits
• [clang] [llvm] [HexFloat] add HexFloat to APFloat (PR #179771)   via llvm-commits
• [libc] [llvm] [libc] refactor bf16div to be header-only and constexpr (PR #181400)   via llvm-commits
• [libc] [llvm] [libc] refactor bf16div to be header-only and constexpr (PR #181400)   via llvm-commits
• [libc] [llvm] [libc] refactor bf16div to be header-only and constexpr (PR #181400)   via llvm-commits
• [llvm] This is a draft for enabling opt-in tail-folding on vectorized epilogue. (PR #181401)   via llvm-commits
• [llvm] This is a draft for enabling opt-in tail-folding on vectorized epilogue. (PR #181401)   via llvm-commits
• [llvm] [OFFLOAD] Extend olMemRegister API to handle cases when a memory block may have been mapped outside of liboffload. (PR #172226)   via llvm-commits
• [llvm] [RISCV] Combine ADDD(lo, hi, x, 0) -> WADDAU(lo, hi, x, 0). Combine WADDAU (WADDAU lo, hi, x, 0), y, 0 -> WADDAU lo, hi, x, y (PR #181396)   via llvm-commits
• [llvm] f290379 - [SLP][NFC] Use static_assert to confirm SupportedOps is sorted (#181397)   via llvm-commits
• [llvm] This is a draft for enabling opt-in tail-folding on vectorized epilogue. (PR #181401)   via llvm-commits
• [llvm] 648bd56 - [SystemZ][z/OS] Migrate most test case to use HLASM syntax (#181222)   via llvm-commits
• [llvm] [RISCV] Convert some multiclasses in RISCVInstrInfoV.td to classes if they only have one child def. NFC (PR #181408)   via llvm-commits
• [llvm] 5f8053b - [RISCV] In tryWideningMulAcc, check multiple users before checking operand 1. (#181321)   via llvm-commits
• [llvm] af1a5c5 - [GISel][RISCV] Simplify the generated code for narrowScalarCTLS. (#180827)   via llvm-commits
• [llvm] 343103a - [NFC] Pre-Commit test case for __builtin_ppc_test_data_class (#181181)   via llvm-commits
• [llvm] [AMDGPU] Add Srl combine for extracting last element of BUILD_VECTOR (PR #181412)   via llvm-commits
• [llvm] [AMDGPU] Add Srl combine for extracting last element of BUILD_VECTOR (PR #181412)   via llvm-commits
• [llvm] [PowerPC] Implement v256i1 BUILD_VECTOR custom lowering (PR #181233)   via llvm-commits
• [llvm] [PowerPC] Implement v256i1 BUILD_VECTOR custom lowering (PR #181233)   via llvm-commits
• [llvm] Revert "[MC/DC] Make covmap tolerant of nested Decisions (#125407)" (PR #181069)   via llvm-commits
• [llvm] 43fcc26 - [Support] Support 5-component VersionTuples (#181275)   via llvm-commits
• [lld] 43fcc26 - [Support] Support 5-component VersionTuples (#181275)   via llvm-commits
• [compiler-rt] 7817197 - [ASan][Windows] Fix false positive for zero sized rtl allocations (#181015)   via llvm-commits
• [llvm] Revert "Add HexagonGlobalScheduler pass (#180803)" (PR #181418)   via llvm-commits
• [llvm] Revert "Add HexagonGlobalScheduler pass (#180803)" (PR #181418)   via llvm-commits
• [llvm] `dwarf2yaml.cpp` optimizations (PR #179048)   via llvm-commits
• [llvm] [PowerPC] Fix inefficient code for __builtin_ppc_test_data_class (PR #181420)   via llvm-commits
• [llvm] [PowerPC] Fix inefficient code for __builtin_ppc_test_data_class (PR #181420)   via llvm-commits
• [llvm] 4c3d561 - [llvm/unittests/CAS] Fix `CASTests` compilation when `LLVM_ENABLE_ONDISK_CAS=OFF` (#181403)   via llvm-commits
• [llvm] [NFC] Pre-Commit test case for __builtin_ppc_test_data_class (PR #181181)   zhijian lin via llvm-commits
• [llvm] [NFC] Pre-Commit test case for __builtin_ppc_test_data_class (PR #181181)   zhijian lin via llvm-commits
• [llvm] [NFC] Pre-Commit test case for __builtin_ppc_test_data_class (PR #181181)   zhijian lin via llvm-commits
• [llvm] [NFC] Pre-Commit test case for __builtin_ppc_test_data_class (PR #181181)   zhijian lin via llvm-commits
• [llvm] [NFC] Pre-Commit test case for __builtin_ppc_test_data_class (PR #181181)   zhijian lin via llvm-commits
• [llvm] [NFC] Pre-Commit test case for __builtin_ppc_test_data_class (PR #181181)   zhijian lin via llvm-commits
• [llvm] [NFC] Pre-Commit test case for __builtin_ppc_test_data_class (PR #181181)   zhijian lin via llvm-commits
• [llvm] [NFC] Pre-Commit test case for __builtin_ppc_test_data_class (PR #181181)   zhijian lin via llvm-commits
• [llvm] [NFC] Pre-Commit test case for __builtin_ppc_test_data_class (PR #181181)   zhijian lin via llvm-commits
• [llvm] [NFC] Pre-Commit test case for __builtin_ppc_test_data_class (PR #181181)   zhijian lin via llvm-commits
• [llvm] [PowerPC] Fix inefficient code for __builtin_ppc_test_data_class (PR #181420)   zhijian lin via llvm-commits
• [llvm] [PowerPC] Fix inefficient code for __builtin_ppc_test_data_class (PR #181420)   zhijian lin via llvm-commits