[llvm] 1d588c5 - [RISCV] Rename tablegen class VALU_MV_VS2->VEXT_MV_VS2. NFC

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Fri Feb 13 11:17:57 PST 2026


Author: Craig Topper
Date: 2026-02-13T11:17:38-08:00
New Revision: 1d588c5c9b5042b1c11b9b9ce70d044fb3f750b0

URL: https://github.com/llvm/llvm-project/commit/1d588c5c9b5042b1c11b9b9ce70d044fb3f750b0
DIFF: https://github.com/llvm/llvm-project/commit/1d588c5c9b5042b1c11b9b9ce70d044fb3f750b0.diff

LOG: [RISCV] Rename tablegen class VALU_MV_VS2->VEXT_MV_VS2. NFC

This better matches the scheduler model in the class.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVInstrInfoV.td

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfoV.td b/llvm/lib/Target/RISCV/RISCVInstrInfoV.td
index 7280823b6735b..7c622ea1fbdd6 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoV.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoV.td
@@ -679,7 +679,7 @@ multiclass VWMAC_MV_V_X<string opcodestr, bits<6> funct6>
                          "ReadVIWMulAddV">;
 }
 
-multiclass VALU_MV_VS2<string opcodestr, bits<6> funct6, bits<5> vs1> {
+multiclass VEXT_MV_VS2<string opcodestr, bits<6> funct6, bits<5> vs1> {
   def "" : VALUVs2<funct6, vs1, OPMVV, opcodestr>,
            SchedUnaryMC<"WriteVExtV", "ReadVExtV">;
 }
@@ -1215,12 +1215,12 @@ def : InstAlias<"vwcvtu.x.x.v $vd, $vs",
                 (VWADDU_VX VR:$vd, VR:$vs, X0, zero_reg)>;
 
 // Vector Integer Extension
-defm VZEXT_VF8 : VALU_MV_VS2<"vzext.vf8", 0b010010, 0b00010>;
-defm VSEXT_VF8 : VALU_MV_VS2<"vsext.vf8", 0b010010, 0b00011>;
-defm VZEXT_VF4 : VALU_MV_VS2<"vzext.vf4", 0b010010, 0b00100>;
-defm VSEXT_VF4 : VALU_MV_VS2<"vsext.vf4", 0b010010, 0b00101>;
-defm VZEXT_VF2 : VALU_MV_VS2<"vzext.vf2", 0b010010, 0b00110>;
-defm VSEXT_VF2 : VALU_MV_VS2<"vsext.vf2", 0b010010, 0b00111>;
+defm VZEXT_VF8 : VEXT_MV_VS2<"vzext.vf8", 0b010010, 0b00010>;
+defm VSEXT_VF8 : VEXT_MV_VS2<"vsext.vf8", 0b010010, 0b00011>;
+defm VZEXT_VF4 : VEXT_MV_VS2<"vzext.vf4", 0b010010, 0b00100>;
+defm VSEXT_VF4 : VEXT_MV_VS2<"vsext.vf4", 0b010010, 0b00101>;
+defm VZEXT_VF2 : VEXT_MV_VS2<"vzext.vf2", 0b010010, 0b00110>;
+defm VSEXT_VF2 : VEXT_MV_VS2<"vsext.vf2", 0b010010, 0b00111>;
 
 // Vector Integer Add-with-Carry / Subtract-with-Borrow Instructions
 defm VADC_V : VALUm_IV_V_X_I<"vadc", 0b010000>;


        


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