The Week Of Monday 23 October 2023 Archives by author

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Starting: Mon Oct 23 00:06:33 PDT 2023
Ending: Sun Oct 29 23:54:30 PDT 2023
Messages: 3930

• [compiler-rt] [compiler-rt][builtins] Switch to using __builtin_memcpy_inline (PR #69784)   A. Jiang via llvm-commits
• [lld] Update stdckdint.h and make it available in pre-C23 modes. (PR #69649)   Aaron Ballman via llvm-commits
• [compiler-rt] Update stdckdint.h and make it available in pre-C23 modes. (PR #69649)   Aaron Ballman via llvm-commits
• [lld] Update stdckdint.h and make it available in pre-C23 modes. (PR #69649)   Aaron Ballman via llvm-commits
• [lld] Update stdckdint.h and make it available in pre-C23 modes. (PR #69649)   Aaron Ballman via llvm-commits
• [llvm] Update stdckdint.h and make it available in pre-C23 modes. (PR #69649)   Aaron Ballman via llvm-commits
• [compiler-rt] Update stdckdint.h and make it available in pre-C23 modes. (PR #69649)   Aaron Ballman via llvm-commits
• [lld] Update stdckdint.h and make it available in pre-C23 modes. (PR #69649)   Aaron Ballman via llvm-commits
• [llvm] Update stdckdint.h and make it available in pre-C23 modes. (PR #69649)   Aaron Ballman via llvm-commits
• [llvm] Revert "[clang] Support fixed point types in C++ (#67750)" (PR #69963)   Aaron Ballman via llvm-commits
• [llvm] ✨ [Sema, Lex, Parse] Preprocessor embed in C and C++ (and Obj-C and Obj-C++ by-proxy) (PR #68620)   Aaron Ballman via llvm-commits
• [llvm] [Sema] -Wzero-as-null-pointer-constant: don't warn for __null (PR #69126)   Aaron Ballman via llvm-commits
• [llvm] [docs] Improve README: point to office hours and online sync-ups (PR #69323)   Aaron Ballman via llvm-commits
• [llvm] [SelectionDAG] Salvage debug info for non-constant ADDs (PR #68981)   Adrian Prantl via llvm-commits
• [llvm] [SelectionDAG] Salvage debug info for non-constant ADDs (PR #68981)   Adrian Prantl via llvm-commits
• [llvm] [SelectionDAG] Salvage debug info for non-constant ADDs (PR #68981)   Adrian Prantl via llvm-commits
• [llvm] Fix size in bytes of type DIEs when size in bits is not a multiple of 8 (PR #69741)   Adrian Prantl via llvm-commits
• [llvm] [NFC] Move DIExpressionCursor to DebugInfoMetadata.h (PR #69768)   Adrian Prantl via llvm-commits
• [llvm] Introduce DIExpressionOptimizer (PR #69769)   Adrian Prantl via llvm-commits
• [llvm] Introduce DIExpressionOptimizer (PR #69769)   Adrian Prantl via llvm-commits
• [llvm] Introduce DIExpressionOptimizer (PR #69769)   Adrian Prantl via llvm-commits
• [llvm] Introduce DIExpressionOptimizer (PR #69769)   Adrian Prantl via llvm-commits
• [llvm] Introduce DIExpressionOptimizer (PR #69769)   Adrian Prantl via llvm-commits
• [llvm] Introduce DIExpressionOptimizer (PR #69769)   Adrian Prantl via llvm-commits
• [llvm] Introduce DIExpressionOptimizer (PR #69769)   Adrian Prantl via llvm-commits
• [llvm] Introduce DIExpressionOptimizer (PR #69769)   Adrian Prantl via llvm-commits
• [llvm] Introduce DIExpressionOptimizer (PR #69769)   Adrian Prantl via llvm-commits
• [llvm] 92b4e05 - Fix typo in swift section name   Adrian Prantl via llvm-commits
• [llvm] Add support for DFP IR type. (PR #69718)   Aiden Grossman via llvm-commits
• [llvm] Add support for DFP IR type. (PR #69718)   Aiden Grossman via llvm-commits
• [llvm] Add support for DFP IR type. (PR #69718)   Aiden Grossman via llvm-commits
• [llvm] [Github] Use API to fetch PR diff for docs action (PR #70001)   Aiden Grossman via llvm-commits
• [llvm] [Github] Add libunwind to docs CI (PR #69830)   Aiden Grossman via llvm-commits
• [llvm] [Github] Add libunwind to docs CI (PR #69830)   Aiden Grossman via llvm-commits
• [llvm] [Github] Add libcxx docs to CI (PR #69828)   Aiden Grossman via llvm-commits
• [llvm] [Github] Add libcxx docs to CI (PR #69828)   Aiden Grossman via llvm-commits
• [llvm] [Github] Fetch all commits in PR for code formatting checks (PR #69766)   Aiden Grossman via llvm-commits
• [llvm] [Github] Add support for building libc docs in Github actions (PR #69824)   Aiden Grossman via llvm-commits
• [llvm] [Github] Add support for building libc docs in Github actions (PR #69824)   Aiden Grossman via llvm-commits
• [llvm] [Github] Add support for building libc docs in Github actions (PR #69824)   Aiden Grossman via llvm-commits
• [llvm] [Github] Use API to fetch PR diff for docs action (PR #70001)   Aiden Grossman via llvm-commits
• [llvm] [Github] Use API to fetch PR diff for docs action (PR #70001)   Aiden Grossman via llvm-commits
• [llvm] [Github] Use API to fetch PR diff for docs action (PR #70001)   Aiden Grossman via llvm-commits
• [llvm] [Github] Use API to fetch PR diff for docs action (PR #70001)   Aiden Grossman via llvm-commits
• [llvm] [Github] Add support for building libc docs in Github actions (PR #69824)   Aiden Grossman via llvm-commits
• [llvm] [Github] Add support for building libc docs in Github actions (PR #69824)   Aiden Grossman via llvm-commits
• [llvm] [Github] Add lld to docs CI (PR #69821)   Aiden Grossman via llvm-commits
• [llvm] [Github] Add lld to docs CI (PR #69821)   Aiden Grossman via llvm-commits
• [llvm] [Github] Fix libc docs build (PR #70363)   Aiden Grossman via llvm-commits
• [llvm] [Github] Add OpenMP docs to Github docs action (PR #70529)   Aiden Grossman via llvm-commits
• [llvm] [Github] Add flang docs to Github actions (PR #70530)   Aiden Grossman via llvm-commits
• [llvm] [Github] Add Polly docs to Github actions (PR #70531)   Aiden Grossman via llvm-commits
• [llvm] [Github] Add OpenMP docs to Github docs action (PR #70529)   Aiden Grossman via llvm-commits
• [llvm] [Github] Add OpenMP docs to Github docs action (PR #70529)   Aiden Grossman via llvm-commits
• [llvm] [Github] Fetch all commits in PR for code formatting checks (PR #69766)   Aiden Grossman via llvm-commits
• [llvm] [Github] Fetch all commits in PR for code formatting checks (PR #69766)   Aiden Grossman via llvm-commits
• [llvm] [Github] Fetch all commits in PR for code formatting checks (PR #69766)   Aiden Grossman via llvm-commits
• [llvm] [Github] Fetch all commits in PR for code formatting checks (PR #69766)   Aiden Grossman via llvm-commits
• [llvm] [Github] Fetch all commits in PR for code formatting checks (PR #69766)   Aiden Grossman via llvm-commits
• [llvm] [Github] Fetch all commits in PR for code formatting checks (PR #69766)   Aiden Grossman via llvm-commits
• [llvm] [Github] Fetch all commits in PR for code formatting checks (PR #69766)   Aiden Grossman via llvm-commits
• [llvm] [Github] Fetch all commits in PR for code formatting checks (PR #69766)   Aiden Grossman via llvm-commits
• [llvm] [Github] Fetch all commits in PR for code formatting checks (PR #69766)   Aiden Grossman via llvm-commits
• [llvm] [Github] Fetch all commits in PR for code formatting checks (PR #69766)   Aiden Grossman via llvm-commits
• [llvm] [Github] Fetch all commits in PR for code formatting checks (PR #69766)   Aiden Grossman via llvm-commits
• [llvm] [Github] Fetch all commits in PR for code formatting checks (PR #69766)   Aiden Grossman via llvm-commits
• [llvm] [Github] Fetch all commits in PR for code formatting checks (PR #69766)   Aiden Grossman via llvm-commits
• [llvm] [Github] Fetch all commits in PR for code formatting checks (PR #69766)   Aiden Grossman via llvm-commits
• [llvm] f39c385 - [MLGO] Fix tests post 1a2e77c   Aiden Grossman via llvm-commits
• [llvm] fix: asan support aarch64be (PR #70536)   Aiden Grossman via llvm-commits
• [llvm] fix: asan support aarch64be (PR #70536)   Aiden Grossman via llvm-commits
• [llvm] fix: asan support aarch64be (PR #70536)   Aiden Grossman via llvm-commits
• [llvm] [Github] Fetch all commits in PR for code formatting checks (PR #69766)   Aiden Grossman via llvm-commits
• [llvm] [Github] Add OpenMP docs to Github docs action (PR #70529)   Aiden Grossman via llvm-commits
• [llvm] [Github] Add Polly docs to Github actions (PR #70531)   Aiden Grossman via llvm-commits
• [llvm] [Github] Add Polly docs to Github actions (PR #70531)   Aiden Grossman via llvm-commits
• [llvm] [OpenMP][Flang] Add "IsolatedFromAbove" trait to omp.target (PR #67164)   Akash Banerjee via llvm-commits
• [llvm] [OpenMP][MLIR] Add "IsolatedFromAbove" and "OutlineableOpenMPOpInterface" trait to omp.target (PR #67318)   Akash Banerjee via llvm-commits
• [llvm] [LoopPeeling] Fix weights updating of peeled off branches (PR #70094)   Aleksandr Popov via llvm-commits
• [llvm] [LoopPeeling] Fix weights updating of peeled off branches (PR #70094)   Aleksandr Popov via llvm-commits
• [llvm] [LoopPeeling] Fix weights updating of peeled off branches (PR #70094)   Aleksandr Popov via llvm-commits
• [llvm] [LoopPeeling] Fix weights updating of peeled off branches (PR #70094)   Aleksandr Popov via llvm-commits
• [llvm] [LoopPeeling] Fix weights updating of peeled off branches (PR #70094)   Aleksandr Popov via llvm-commits
• [llvm] [NFC] Extract LoopConstrainer from IRCE to reuse it outside the pass (PR #70508)   Aleksandr Popov via llvm-commits
• [llvm] [NFC] Extract LoopConstrainer from IRCE to reuse it outside the pass (PR #70508)   Aleksandr Popov via llvm-commits
• [llvm] [clangd] Support square bracket escaping in Annotations (PR #69379)   Aleksey Fefelov via llvm-commits
• [llvm] [clangd] Support square bracket escaping in Annotations (PR #69379)   Aleksey Fefelov via llvm-commits
• [compiler-rt] [builtins] Fix floattitf.c etc. compilation on Solaris/SPARC (PR #70058)   Alex Bradbury via llvm-commits
• [llvm] [RISCV][GISel] Rename XLenVT sXLen to be consistent with other LLTs. (PR #70288)   Alex Bradbury via llvm-commits
• [compiler-rt] [builtins] Start to refactor int to fp conversion functions to use a common implementation (PR #66903)   Alex Bradbury via llvm-commits
• [compiler-rt] [builtins] Start to refactor int to fp conversion functions to use a common implementation (PR #66903)   Alex Bradbury via llvm-commits
• [llvm] [RISCV] Add processor definition for XiangShan-NanHu (PR #70294)   Alex Bradbury via llvm-commits
• [llvm] [RFC][RISCV] Support the large code model. (PR #70308)   Alex Bradbury via llvm-commits
• [llvm] [RISCV] Add processor definition for XiangShan-NanHu (PR #70294)   Alex Bradbury via llvm-commits
• [llvm] [RISCV] Correct copyPhysReg for GPRPF64. (PR #70419)   Alex Bradbury via llvm-commits
• [llvm] [RISCV] Add processor definition for XiangShan-NanHu (PR #70294)   Alex Bradbury via llvm-commits
• [PATCH] D70401: [RISCV] CodeGen of RVE and ilp32e/lp64e ABIs   Alex Bradbury via Phabricator via llvm-commits
• [llvm] [InstCombine] enable more factorization in SimplifyUsingDistributiveLaws (PR #69892)   Alex Cameron via llvm-commits
• [llvm] [InstCombine] enable more factorization in SimplifyUsingDistributiveLaws (PR #69892)   Alex Cameron via llvm-commits
• [compiler-rt] b745ce9 - [builtins] Revert accidental change to PPC implementation in 05a4212cc76d   Alex Richardson via llvm-commits
• [llvm] 696eb3a - Remove unnecessary newline from error message   Alex Richardson via llvm-commits
• [llvm] e39f6c1 - [opt] Infer DataLayout from triple if not specified   Alex Richardson via llvm-commits
• [llvm] 1e029cf - Add missing REQUIRES lines to unbreak buildbots   Alex Richardson via llvm-commits
• [llvm] 1f5a9d1 - Fix opt/invalid-target.ll on Windows bots   Alex Richardson via llvm-commits
• [llvm] a002606 - Add another missing REQUIRES: line   Alex Richardson via llvm-commits
• [llvm] 0359a78 - Add target REQUIRES to 3 more tests   Alex Richardson via llvm-commits
• [compiler-rt] [builtins] Convert more int to fp functions to use common implementation (PR #67540)   Alexander Richardson via llvm-commits
• [compiler-rt] [builtins] Convert more int to fp functions to use common implementation (PR #67540)   Alexander Richardson via llvm-commits
• [compiler-rt] [builtins] Fix floattitf.c etc. compilation on Solaris/SPARC (PR #70058)   Alexander Richardson via llvm-commits
• [compiler-rt] [builtins] Support building the 128-bit float functions on ld80 platforms (PR #68132)   Alexander Richardson via llvm-commits
• [compiler-rt] [builtins] Avoid using long double in generic sources (PR #69754)   Alexander Richardson via llvm-commits
• [llvm] [IR] Require index width to be ule pointer width (PR #70015)   Alexander Richardson via llvm-commits
• [llvm] [IR] Require index width to be ule pointer width (PR #70015)   Alexander Richardson via llvm-commits
• [compiler-rt] [builtins] Avoid using long double in generic sources (PR #69754)   Alexander Richardson via llvm-commits
• [llvm] [IR] Require index width to be ule pointer width (PR #70015)   Alexander Richardson via llvm-commits
• [compiler-rt] [builtins] Avoid using long double in generic sources (PR #69754)   Alexander Richardson via llvm-commits
• [llvm] [IR] Require index width to be ule pointer width (PR #70015)   Alexander Richardson via llvm-commits
• [llvm] [AMDGPU] Use alloca address space in rewrite-out-arguments.ll (PR #70269)   Alexander Richardson via llvm-commits
• [llvm] [AMDGPU] Use alloca address space in rewrite-out-arguments.ll (PR #70269)   Alexander Richardson via llvm-commits
• [llvm] [InstCombine] Add combines/simplifications for `llvm.ptrmask` (PR #67166)   Alexander Richardson via llvm-commits
• [llvm] [InstCombine] Add combines/simplifications for `llvm.ptrmask` (PR #67166)   Alexander Richardson via llvm-commits
• [llvm] [InstCombine] Add combines/simplifications for `llvm.ptrmask` (PR #67166)   Alexander Richardson via llvm-commits
• [llvm] [InstCombine] Add combines/simplifications for `llvm.ptrmask` (PR #67166)   Alexander Richardson via llvm-commits
• [PATCH] D141060: [opt] Infer DataLayout from triple if not specified   Alexander Richardson via Phabricator via llvm-commits
• [PATCH] D141060: [opt] Infer DataLayout from triple if not specified   Alexander Richardson via Phabricator via llvm-commits
• [PATCH] D141060: [opt] Infer DataLayout from triple if not specified   Alexander Richardson via Phabricator via llvm-commits
• [PATCH] D141060: [opt] Infer DataLayout from triple if not specified   Alexander Richardson via Phabricator via llvm-commits
• [compiler-rt] [compiler-rt][builtins] Switch to using __builtin_memcpy_inline (PR #69784)   Alexander Shaposhnikov via llvm-commits
• [compiler-rt] [compiler-rt][builtins] Switch to using __builtin_memcpy_inline (PR #69784)   Alexander Shaposhnikov via llvm-commits
• [compiler-rt] [compiler-rt][builtins] Switch to using __builtin_memcpy_inline (PR #69784)   Alexander Shaposhnikov via llvm-commits
• [compiler-rt] d4b8572 - [compiler-rt] Fix src_rep_t_clz and clz_in_sig_frac   Alexander Shaposhnikov via llvm-commits
• [llvm] [LLVM[NFC] Refactor to allow debug_names entries to conatain DIE offset (PR #69399)   Alexander Yermolovich via llvm-commits
• [llvm] [LLVM[NFC] Refactor to allow debug_names entries to conatain DIE offset (PR #69399)   Alexander Yermolovich via llvm-commits
• [llvm] [LLVM[NFC] Refactor to allow debug_names entries to conatain DIE offset (PR #69399)   Alexander Yermolovich via llvm-commits
• [llvm] y (PR #70512)   Alexander Yermolovich via llvm-commits
• [llvm] y (PR #70512)   Alexander Yermolovich via llvm-commits
• [llvm] [LLVM][DWARF] Add support for monolithic types in .debug_names (PR #70512)   Alexander Yermolovich via llvm-commits
• [llvm] [LLVM][DWARF] Add support for monolithic types in .debug_names (PR #70512)   Alexander Yermolovich via llvm-commits
• [llvm] [LLVM][DWARF] Add support for monolithic types in .debug_names (PR #70512)   Alexander Yermolovich via llvm-commits
• [llvm] [LLVM][DWARF] Add support for monolithic types in .debug_names (PR #70515)   Alexander Yermolovich via llvm-commits
• [llvm] [LLVM][DWARF] Add support for monolithic types in .debug_names (PR #70515)   Alexander Yermolovich via llvm-commits
• [lld] [lld][COFF]Expose UnifiedLTO and PassPipeline Options (PR #69904)   Alexandre Ganea via llvm-commits
• [lld] [lld][COFF]Expose UnifiedLTO and PassPipeline Options (PR #69904)   Alexandre Ganea via llvm-commits
• [llvm] [LAA] Add a test case to show incorrect dependency classification (NFC). (PR #70473)   Alexandros Lamprineas via llvm-commits
• [llvm] SLP/RISCV: add negative test for llrint, increase coverage (PR #69940)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Improve isGatherShuffledEntry by trying per-register shuffle. (PR #66542)   Alexey Bataev via llvm-commits
• [llvm] [VectorCombine] Add special handling for truncating shuffles (PR #70013)   Alexey Bataev via llvm-commits
• [llvm] [VectorCombine] Add special handling for truncating shuffles (PR #70013)   Alexey Bataev via llvm-commits
• [llvm] 254558a - [SLP]Fix PR69976: Check for multi-node uses during node building.   Alexey Bataev via llvm-commits
• [llvm] 8d307f5 - [SLP]Fix PR69246: do not treat resizing maskas identity.   Alexey Bataev via llvm-commits
• [llvm] d79051f - [SLP]Fix PR70004: Do not change insert point for reduction gather nodes.   Alexey Bataev via llvm-commits
• [llvm] [NFC][SLP] Add test case for issue #69670. (PR #70088)   Alexey Bataev via llvm-commits
• [llvm] [NFC][SLP] Add test case for issue #69670. (PR #70088)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Improve gather tree nodes matching when users are PHIs. (PR #70111)   Alexey Bataev via llvm-commits
• [llvm] a3c6875 - [SLP][NFC]Remove unused variables, NFC.   Alexey Bataev via llvm-commits
• [llvm] SLP/RISCV: add negative test for llrint, increase coverage (PR #69940)   Alexey Bataev via llvm-commits
• [llvm] [VPlan] Introduce ComputeReductionResult VPInstruction opcode. (PR #70253)   Alexey Bataev via llvm-commits
• [llvm] [VPlan] Introduce ComputeReductionResult VPInstruction opcode. (PR #70253)   Alexey Bataev via llvm-commits
• [llvm] [VPlan] Introduce ComputeReductionResult VPInstruction opcode. (PR #70253)   Alexey Bataev via llvm-commits
• [llvm] [VPlan] Introduce ComputeReductionResult VPInstruction opcode. (PR #70253)   Alexey Bataev via llvm-commits
• [llvm] [VPlan] Introduce ComputeReductionResult VPInstruction opcode. (PR #70253)   Alexey Bataev via llvm-commits
• [llvm] [VPlan] Introduce ComputeReductionResult VPInstruction opcode. (PR #70253)   Alexey Bataev via llvm-commits
• [llvm] [VPlan] Introduce ComputeReductionResult VPInstruction opcode. (PR #70253)   Alexey Bataev via llvm-commits
• [llvm] [VPlan] Introduce ComputeReductionResult VPInstruction opcode. (PR #70253)   Alexey Bataev via llvm-commits
• [llvm] [VPlan] Introduce ComputeReductionResult VPInstruction opcode. (PR #70253)   Alexey Bataev via llvm-commits
• [llvm] [VPlan] Introduce ComputeReductionResult VPInstruction opcode. (PR #70253)   Alexey Bataev via llvm-commits
• [llvm] [VPlan] Introduce ComputeReductionResult VPInstruction opcode. (PR #70253)   Alexey Bataev via llvm-commits
• [llvm] [VPlan] Introduce ComputeReductionResult VPInstruction opcode. (PR #70253)   Alexey Bataev via llvm-commits
• [llvm] 560bad0 - [SLP]Improve isGatherShuffledEntry by trying per-register shuffle.   Alexey Bataev via llvm-commits
• [llvm] [SLP]Improve isGatherShuffledEntry by trying per-register shuffle. (PR #66542)   Alexey Bataev via llvm-commits
• [llvm] c65ec9d - Revert "[SLP]Improve isGatherShuffledEntry by trying per-register shuffle."   Alexey Bataev via llvm-commits
• [llvm] 196d154 - [SLP]Improve isGatherShuffledEntry by trying per-register shuffle.   Alexey Bataev via llvm-commits
• [PATCH] D99750: [LV, VP]VP intrinsics support for the Loop Vectorizer   Alexey Bataev via Phabricator via llvm-commits
• [PATCH] D99750: [LV, VP]VP intrinsics support for the Loop Vectorizer   Alexey Bataev via Phabricator via llvm-commits
• [PATCH] D149742: [SLP]Improve isGatherShuffledEntry by trying per-register shuffle.   Alexey Bataev via Phabricator via llvm-commits
• [PATCH] D149742: [SLP]Improve isGatherShuffledEntry by trying per-register shuffle.   Alexey Bataev via Phabricator via llvm-commits
• [PATCH] D149742: [SLP]Improve isGatherShuffledEntry by trying per-register shuffle.   Alexey Bataev via Phabricator via llvm-commits
• [PATCH] D148855: [SLP]Improve tryToGatherExtractElements by using per-register analysis.   Alexey Bataev via Phabricator via llvm-commits
• [PATCH] D99750: [LV, VP]VP intrinsics support for the Loop Vectorizer   Alexey Bataev via Phabricator via llvm-commits
• [PATCH] D99750: [LV, VP]VP intrinsics support for the Loop Vectorizer   Alexey Bataev via Phabricator via llvm-commits
• [PATCH] D148855: [SLP]Improve tryToGatherExtractElements by using per-register analysis.   Alexey Bataev via Phabricator via llvm-commits
• [PATCH] D148855: [SLP]Improve tryToGatherExtractElements by using per-register analysis.   Alexey Bataev via Phabricator via llvm-commits
• [PATCH] D99750: [LV, VP]VP intrinsics support for the Loop Vectorizer   Alexey Bataev via Phabricator via llvm-commits
• [PATCH] D99750: [LV, VP]VP intrinsics support for the Loop Vectorizer   Alexey Bataev via Phabricator via llvm-commits
• [PATCH] D123235: [OpenMP] atomic compare fail : Parser & AST support   Alexey Bataev via Phabricator via llvm-commits
• [llvm] d0584e2 - [CodeLayout] Update to resolve Wdangling warning.   Alina Sbirlea via llvm-commits
• [llvm] Reland [dsymutil] Add support for mergeable libraries (PR #70256)   Alpha Abdoulaye via llvm-commits
• [llvm] Reland [dsymutil] Add support for mergeable libraries (PR #70256)   Alpha Abdoulaye via llvm-commits
• [llvm] [ADT] Add TrieRawHashMap (PR #69528)   Aman LaChapelle via llvm-commits
• [llvm] [ADT] Add TrieRawHashMap (PR #69528)   Aman LaChapelle via llvm-commits
• [llvm] [ADT] Add TrieRawHashMap (PR #69528)   Aman LaChapelle via llvm-commits
• [llvm] [ADT] Add TrieRawHashMap (PR #69528)   Aman LaChapelle via llvm-commits
• [llvm] [ADT] Add TrieRawHashMap (PR #69528)   Aman LaChapelle via llvm-commits
• [llvm] [ADT] Add TrieRawHashMap (PR #69528)   Aman LaChapelle via llvm-commits
• [llvm] [ADT] Add TrieRawHashMap (PR #69528)   Aman LaChapelle via llvm-commits
• [llvm] [ADT] Add TrieRawHashMap (PR #69528)   Aman LaChapelle via llvm-commits
• [llvm] [ADT] Add TrieRawHashMap (PR #69528)   Aman LaChapelle via llvm-commits
• [llvm] [ADT] Add TrieRawHashMap (PR #69528)   Aman LaChapelle via llvm-commits
• [llvm] [ADT] Add TrieRawHashMap (PR #69528)   Aman LaChapelle via llvm-commits
• [llvm] [ADT] Add TrieRawHashMap (PR #69528)   Aman LaChapelle via llvm-commits
• [llvm] [AArch64][GlobalISel] Add support for post-indexed loads/stores. (PR #69532)   Amara Emerson via llvm-commits
• [llvm] [AArch64][GlobalISel] Add support for post-indexed loads/stores. (PR #69532)   Amara Emerson via llvm-commits
• [llvm] [AArch64][GlobalISel] Legalize NEON smin,smax,umin,umax,fmin,fmax intrinsics (PR #70060)   Amara Emerson via llvm-commits
• [llvm] [AArch64][ABI] Pass v8f32 on the stack (PR #69729)   Amara Emerson via llvm-commits
• [llvm] [AArch64][GlobalISel] Add support for post-indexed loads/stores. (PR #69532)   Amara Emerson via llvm-commits
• [llvm] [AArch64][GlobalISel] Add support for pre-indexed loads/stores. (PR #70185)   Amara Emerson via llvm-commits
• [llvm] STACK: GlobalISel: indexed load/stores support for AArch64 (PR #69533)   Amara Emerson via llvm-commits
• [llvm] [AArch64][GlobalISel] Add support for pre-indexed loads/stores. (PR #70185)   Amara Emerson via llvm-commits
• [llvm] [AArch64][GlobalISel] Add support for pre-indexed loads/stores. (PR #70185)   Amara Emerson via llvm-commits
• [llvm] [AArch64][GlobalISel] Add support for pre-indexed loads/stores. (PR #70185)   Amara Emerson via llvm-commits
• [llvm] [AArch64][GlobalISel] Add support for pre-indexed loads/stores. (PR #70185)   Amara Emerson via llvm-commits
• [llvm] [AArch64][GlobalISel] Add support for pre-indexed loads/stores. (PR #70185)   Amara Emerson via llvm-commits
• [llvm] [AArch64][GlobalISel] Add support for pre-indexed loads/stores. (PR #70185)   Amara Emerson via llvm-commits
• [llvm] [AArch64][GlobalISel] Fix incorrect ABI when tail call not supported (PR #70215)   Amara Emerson via llvm-commits
• [llvm] [AArch64] Clarify that Anyext is OK for MOPS instructions. NFC (PR #70298)   Amara Emerson via llvm-commits
• [llvm] [AArch64][GlobalISel] Add support for pre-indexed loads/stores. (PR #70185)   Amara Emerson via llvm-commits
• [llvm] a66051c - [InstCombine] Add oneuse checks to shr + cmp constant folds.   Amara Emerson via llvm-commits
• [llvm] [AArch64][GlobalISel] Add support for extending indexed loads. (PR #70373)   Amara Emerson via llvm-commits
• [llvm] STACK: GlobalISel: indexed load/stores support for AArch64 (PR #69533)   Amara Emerson via llvm-commits
• [llvm] [AArch64][GlobalISel] Add support for extending indexed loads. (PR #70373)   Amara Emerson via llvm-commits
• [llvm] [AArch64][GlobalISel] Adopt some Ld1Lane* patterns for GlobalISel to reduce codegen regressions (PR #69607)   Amara Emerson via llvm-commits
• [llvm] [AArch64][GlobalISel] Add support for extending indexed loads. (PR #70373)   Amara Emerson via llvm-commits
• [llvm] STACK: GlobalISel: indexed load/stores support for AArch64 (PR #69533)   Amara Emerson via llvm-commits
• [llvm] STACK: GlobalISel: indexed load/stores support for AArch64 (PR #69533)   Amara Emerson via llvm-commits
• [llvm] d37b283 - Revert "[InstCombine] Add oneuse checks to shr + cmp constant folds."   Amara Emerson via llvm-commits
• [llvm] [AArch64][GlobalISel] Adopt some Ld1Lane* patterns for GlobalISel to reduce codegen regressions (PR #69607)   Amara Emerson via llvm-commits
• [llvm] 2228b35 - Revert "Revert "[InstCombine] Add oneuse checks to shr + cmp constant folds.""   Amara Emerson via llvm-commits
• [llvm] 1a2e77c - Revert "Revert "Inlining: Run the legacy AlwaysInliner before the regular inliner.""   Amara Emerson via llvm-commits
• [llvm] [AArch64][GlobalISel] Fix incorrect ABI when tail call not supported (PR #70215)   Amara Emerson via llvm-commits
• [PATCH] D149918: [InstCombine] Add oneuse checks to shr + cmp constant folds.   Amara Emerson via Phabricator via llvm-commits
• [llvm] [BOLT] Rename cds to cdsort (PR #69966)   Amir Ayupov via llvm-commits
• [llvm] [BOLT] Fix build issues after #69836 (PR #70087)   Amir Ayupov via llvm-commits
• [llvm] [BOLT] Fix build issues after #69836 (PR #70087)   Amir Ayupov via llvm-commits
• [llvm] [BOLT] Use direct storage for Label annotations. NFCI. (PR #70147)   Amir Ayupov via llvm-commits
• [llvm] [BOLT] Fix address mapping for ICP code (PR #70136)   Amir Ayupov via llvm-commits
• [llvm] [AArch64][PAC] Refactor aarch64-ptrauth pass for better extensibility (PR #70446)   Anatoly Trosinenko via llvm-commits
• [lld] [LLD][ELF] Change default flags for NOBITS sections with no inputs (PR #70447)   Andreu Carminati via llvm-commits
• [lld] [LLD][ELF] Change default flags for NOBITS sections with no inputs (PR #70447)   Andreu Carminati via llvm-commits
• [PATCH] D154395: [llvm] Add triple for SerenityOS   Andrew Kaster via Phabricator via llvm-commits
• [PATCH] D154400: [llvm] Add support for building LLVM on SerenityOS   Andrew Kaster via Phabricator via llvm-commits
• [PATCH] D154401: [tools] Support building shared libLLVM and libClang for SerenityOS   Andrew Kaster via Phabricator via llvm-commits
• [PATCH] D154402: [compiler-rt] Enable profile instrumentation for SerenityOS   Andrew Kaster via Phabricator via llvm-commits
• [llvm] Add support for DFP IR type. (PR #69718)   Andy Kaylor via llvm-commits
• [llvm] Add support for DFP IR type. (PR #69718)   Andy Kaylor via llvm-commits
• [llvm] Add support for DFP IR type. (PR #69718)   Andy Kaylor via llvm-commits
• [llvm] Add support for DFP IR type. (PR #69718)   Andy Kaylor via llvm-commits
• [PATCH] D37251: [X86] Add a pass to convert instruction chains between domains   Anna Thomas via Phabricator via llvm-commits
• [llvm] fix: asan support aarch64be (PR #70536)   Anton Korobeynikov via llvm-commits
• [llvm] fix: asan support aarch64be (PR #70536)   Anton Korobeynikov via llvm-commits
• [compiler-rt] Adding Separate OpenMP Offloading Backend to `libcxx/include/__algorithm/pstl_backends` (PR #66968)   Anton Rydahl via llvm-commits
• [llvm] Adding Separate OpenMP Offloading Backend to `libcxx/include/__algorithm/pstl_backends` (PR #66968)   Anton Rydahl via llvm-commits
• [compiler-rt] Adding Separate OpenMP Offloading Backend to `libcxx/include/__algorithm/pstl_backends` (PR #66968)   Anton Rydahl via llvm-commits
• [compiler-rt] Adding Separate OpenMP Offloading Backend to `libcxx/include/__algorithm/pstl_backends` (PR #66968)   Anton Rydahl via llvm-commits
• [compiler-rt] Adding Separate OpenMP Offloading Backend to `libcxx/include/__algorithm/pstl_backends` (PR #66968)   Anton Rydahl via llvm-commits
• [llvm] Adding Separate OpenMP Offloading Backend to `libcxx/include/__algorithm/pstl_backends` (PR #66968)   Anton Rydahl via llvm-commits
• [compiler-rt] [libcxx] Unifying __is_trivial_equality_predicate and __is_trivial_plus_operation into __desugars_to (PR #68642)   Anton Rydahl via llvm-commits
• [llvm] [libcxx] Unifying __is_trivial_equality_predicate and __is_trivial_plus_operation into __desugars_to (PR #68642)   Anton Rydahl via llvm-commits
• [compiler-rt] Adding Separate OpenMP Offloading Backend to `libcxx/include/__algorithm/pstl_backends` (PR #66968)   Anton Rydahl via llvm-commits
• [llvm] Adding Separate OpenMP Offloading Backend to `libcxx/include/__algorithm/pstl_backends` (PR #66968)   Anton Rydahl via llvm-commits
• [compiler-rt] Adding Separate OpenMP Offloading Backend to `libcxx/include/__algorithm/pstl_backends` (PR #66968)   Anton Rydahl via llvm-commits
• [llvm] [AArch64][ISel] Add support for v8.4a RCpc `ldapur`/`stlur` (PR #67879)   Antonio Frighetto via llvm-commits
• [llvm] [AArch64][TTI] Improve `LegalVF` when computing gather-loads cost (PR #69617)   Antonio Frighetto via llvm-commits
• [llvm] [AArch64][TTI] Improve `LegalVF` when computing gather-loads cost (PR #69617)   Antonio Frighetto via llvm-commits
• [llvm] [AArch64][TTI] Improve `LegalVF` when computing gather-loads cost (PR #69617)   Antonio Frighetto via llvm-commits
• [llvm] [AArch64][TTI] Improve `LegalVF` when computing gather-loads cost (PR #69617)   Antonio Frighetto via llvm-commits
• [llvm] [AArch64][TTI] Improve `LegalVF` when computing gather-loads cost (PR #69617)   Antonio Frighetto via llvm-commits
• [llvm] 138e6c1 - [AArch64][TTI] Improve `LegalVF` when gather loads are scalarized   Antonio Frighetto via llvm-commits
• [llvm] [AArch64][TTI] Improve `LegalVF` when computing gather-loads cost (PR #69617)   Antonio Frighetto via llvm-commits
• [llvm] [Sema] -Wzero-as-null-pointer-constant: don't warn for __null (PR #69126)   Arseny Kapoulkine via llvm-commits
• [llvm] [TableGen][NFC] Add record kind to `Record` class (PR #69919)   Artem Belevich via llvm-commits
• [llvm] [TableGen][NFC] Add record kind to `Record` class (PR #69919)   Artem Belevich via llvm-commits
• [llvm] [TableGen][NFC] Add record kind to `Record` class (PR #69919)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Add lowering for bitcasts float<->v4i8 (PR #69960)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Add lowering for bitcasts float<->v4i8 (PR #69960)   Artem Belevich via llvm-commits
• [llvm] [opt] Properly report errors when loading pass plugins (PR #69745)   Arthur Eubanks via llvm-commits
• [llvm] [LowerSwitch] Don't let pass manager handle the dependency (PR #68662)   Arthur Eubanks via llvm-commits
• [compiler-rt] [Bazel][Clang Tidy] Include builtin headers with clang-tidy (PR #67626)   Arthur Eubanks via llvm-commits
• [llvm] [Bazel][Clang Tidy] Include builtin headers with clang-tidy (PR #67626)   Arthur Eubanks via llvm-commits
• [llvm] [llvm-profdata] Emit warning when counter value is greater than 2^56. (PR #69513)   Arthur Eubanks via llvm-commits
• [compiler-rt] [Bazel][Clang Tidy] Include builtin headers with clang-tidy (PR #67626)   Arthur Eubanks via llvm-commits
• [llvm] [Bazel][Clang Tidy] Include builtin headers with clang-tidy (PR #67626)   Arthur Eubanks via llvm-commits
• [llvm] [llvm-profdata] Emit warning when counter value is greater than 2^56. (PR #69513)   Arthur Eubanks via llvm-commits
• [llvm] [llvm][support] Show name of overlapping cl option (PR #70108)   Arthur Eubanks via llvm-commits
• [lld] [Support] Better error msg when cache dir can't be created. (PR #69575)   Arthur Eubanks via llvm-commits
• [llvm] [Support] Better error msg when cache dir can't be created. (PR #69575)   Arthur Eubanks via llvm-commits
• [llvm] [llvm][support] Show name of overlapping cl option (PR #70108)   Arthur Eubanks via llvm-commits
• [llvm] [llvm][support] Show name of overlapping cl option (PR #70108)   Arthur Eubanks via llvm-commits
• [llvm] [llvm][support] Show name of overlapping cl option (PR #70108)   Arthur Eubanks via llvm-commits
• [llvm] [llvm][support] Show name of overlapping cl option (PR #70108)   Arthur Eubanks via llvm-commits
• [llvm] [llvm][support] Show name of overlapping cl option (PR #70108)   Arthur Eubanks via llvm-commits
• [llvm] [llvm][support] Show name of overlapping cl option (PR #70108)   Arthur Eubanks via llvm-commits
• [llvm] [NewGVN][1/3] Load coercion between load and store (PR #68659)   Arthur Eubanks via llvm-commits
• [llvm] [NewGVN][1/3] Load coercion between load and store (PR #68659)   Arthur Eubanks via llvm-commits
• [llvm] [NewGVN][1/3] Load coercion between load and store (PR #68659)   Arthur Eubanks via llvm-commits
• [llvm] [NewGVN][1/3] Load coercion between load and store (PR #68659)   Arthur Eubanks via llvm-commits
• [llvm] [NewGVN][1/3] Load coercion between load and store (PR #68659)   Arthur Eubanks via llvm-commits
• [llvm] [NewGVN][1/3] Load coercion between load and store (PR #68659)   Arthur Eubanks via llvm-commits
• [llvm] [NewGVN][1/3] Load coercion between load and store (PR #68659)   Arthur Eubanks via llvm-commits
• [llvm] [llvm][support] Show name of overlapping cl option (PR #70108)   Arthur Eubanks via llvm-commits
• [llvm] [llvm][support] Show name of overlapping cl option (PR #70108)   Arthur Eubanks via llvm-commits
• [llvm] 94ed99a - [gn build] Manually port 078ae8cd   Arthur Eubanks via llvm-commits
• [llvm] [X86] Treat all data under large code model as large (PR #70265)   Arthur Eubanks via llvm-commits
• [lld] [lld/ELF] Place large executable sections at the end (PR #70358)   Arthur Eubanks via llvm-commits
• [llvm] [PassTimingInfo] Handle nested timers in passes (PR #70165)   Arthur Eubanks via llvm-commits
• [llvm] [PassTimingInfo] Handle nested timers in passes (PR #70165)   Arthur Eubanks via llvm-commits
• [llvm] [PassTimingInfo] Handle nested timers in passes (PR #70165)   Arthur Eubanks via llvm-commits
• [llvm] [X86] Print 'l' section flag for SHF_X86_64_LARGE (PR #70380)   Arthur Eubanks via llvm-commits
• [llvm] [LLVM-C] Add LLVMCreateTargetMachineWithABI (PR #68406)   Arthur Eubanks via llvm-commits
• [llvm] [LLVM-C] Add LLVMCreateTargetMachineWithABI (PR #68406)   Arthur Eubanks via llvm-commits
• [llvm] [LLVM-C] Add LLVMCreateTargetMachineWithABI (PR #68406)   Arthur Eubanks via llvm-commits
• [llvm] [LLVM-C] Add LLVMCreateTargetMachineWithABI (PR #68406)   Arthur Eubanks via llvm-commits
• [llvm] [LLVM-C] Add LLVMCreateTargetMachineWithABI (PR #68406)   Arthur Eubanks via llvm-commits
• [llvm] [LLVM-C] Add LLVMCreateTargetMachineWithABI (PR #68406)   Arthur Eubanks via llvm-commits
• [llvm] [X86] Print 'l' section flag for SHF_X86_64_LARGE (PR #70380)   Arthur Eubanks via llvm-commits
• [PATCH] D158081: [IR] Add writable attribute   Arthur Eubanks via Phabricator via llvm-commits
• [compiler-rt] [orc][mach-o] Fix mixing objc and swift code in a single JITDylib (PR #69258)   Ben Langmuir via llvm-commits
• [llvm] [llvm][NewGVN] Fixing the replacement of incorrect instructions (PR #70599)   Ben Shi via llvm-commits
• [llvm] [llvm][NewGVN] Fixing the replacement of incorrect instructions (PR #70599)   Ben Shi via llvm-commits
• [llvm] [RISCV][NFC] consolidate simple conditional statements (PR #70423)   Ben Shi via llvm-commits
• [llvm] e558be5 - [STLExtras] Undo C++20 hack   Benjamin Kramer via llvm-commits
• [llvm] [NVPTX] Add lowering for bitcasts float<->v4i8 (PR #69960)   Benjamin Kramer via llvm-commits
• [llvm] b796eac - [IPSCCP] Silence sign compare warnings in test   Benjamin Kramer via llvm-commits
• [llvm] 8f33995 - [IPSCCP] Fix a mistake in b796eac3f2aedca449fda5a46a9b0c979d1ee102 so the test actually passes   Benjamin Kramer via llvm-commits
• [llvm] 858d6a1 - [wasm] Don't crash on non-simple value types during shuffle combine   Benjamin Kramer via llvm-commits
• [llvm] eb67b34 - [IPSCCP] Don't crash on ptrtoint   Benjamin Kramer via llvm-commits
• [llvm] 4c600bd - [NVPTX] Add a test to verify the .version with sm_90(a)   Benjamin Kramer via llvm-commits
• [llvm] 80ff42b - [scev-aa] Make TypeSize -> uint64_t conversion explicit   Benjamin Kramer via llvm-commits
• [llvm] f7de498 - [AArch64][GlobalISel] Fold variable into assert   Benjamin Kramer via llvm-commits
• [llvm] [ARM] Add a method to clear registers (PR #69659)   Bill Wendling via llvm-commits
• [llvm] [ARM] Add a method to clear registers (PR #69659)   Bill Wendling via llvm-commits
• [llvm] [ARM] Add a method to clear registers (PR #69659)   Bill Wendling via llvm-commits
• [llvm] [ARM] Add a method to clear registers (PR #69659)   Bill Wendling via llvm-commits
• [llvm] 89eeb4f - [LegacyPM] Clean up includes in LowerExpectIntrinsicPass   Bjorn Pettersson via llvm-commits
• [llvm] [RISCV][GISel][NFC] Correct the test case in constant32.mir (PR #70003)   Brandon Wu via llvm-commits
• [llvm] [RISCV][GISel][NFC] Correct the test case in constant32.mir (PR #70003)   Brandon Wu via llvm-commits
• [llvm] [RISCV] Fix wrong implication for zvknhb. (PR #66860)   Brandon Wu via llvm-commits
• [llvm] [RISCV] Support Xsfvfwmaccqqq extensions (PR #68296)   Brandon Wu via llvm-commits
• [llvm] [RISCV] Support Xsfvfnrclipxfqf extensions (PR #68297)   Brandon Wu via llvm-commits
• [llvm] Correctly set pointer bit for aggregate values in SelectionDAGBuilder to fix CCIfPtr (PR #70554)   Camil Staps via llvm-commits
• [llvm] Correctly set pointer bit for aggregate values in SelectionDAGBuilder to fix CCIfPtr (PR #70554)   Camil Staps via llvm-commits
• [llvm] Correctly set pointer bit for aggregate values in SelectionDAGBuilder to fix CCIfPtr (PR #70554)   Camil Staps via llvm-commits
• [llvm] Correctly set pointer bit for aggregate values in SelectionDAGBuilder to fix CCIfPtr (PR #70554)   Camil Staps via llvm-commits
• [llvm] Correctly set pointer bit for aggregate values in SelectionDAGBuilder to fix CCIfPtr (PR #70554)   Camil Staps via llvm-commits
• [llvm] Correctly set pointer bit for aggregate values in SelectionDAGBuilder to fix CCIfPtr (PR #70554)   Camil Staps via llvm-commits
• [llvm] [AMDGPU] Add writelane and readlane pseudos for SGPR spilling (PR #69923)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Add writelane and readlane pseudos for SGPR spilling (PR #69923)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Add writelane and readlane pseudos for SGPR spilling (PR #69923)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Add writelane and readlane pseudos for SGPR spilling (PR #69923)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Add writelane and readlane pseudos for SGPR spilling (PR #69923)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] GCNRegPressure printing pass for testing. (PR #70031)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] GCNRegPressure printing pass for testing. (PR #70031)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Cleanup hasUnwantedEffectsWhenEXECEmpty function (PR #70206)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Move WWM register pre-allocation to during regalloc (PR #70618)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Add option to pre-allocate SGPR spill VGPRs (PR #70626)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Add option to pre-allocate SGPR spill VGPRs (PR #70626)   Carl Ritson via llvm-commits
• [llvm] [indvars] Missing variables at Og: (PR #69920)   Carlos Alberto Enciso via llvm-commits
• [llvm] [IPSCCP] Variable not visible at Og. (PR #66745)   Carlos Alberto Enciso via llvm-commits
• [llvm] [indvars] Missing variables at Og: (PR #69920)   Carlos Alberto Enciso via llvm-commits
• [llvm] [indvars] Missing variables at Og: (PR #69920)   Carlos Alberto Enciso via llvm-commits
• [llvm] [indvars] Missing variables at Og: (PR #69920)   Carlos Alberto Enciso via llvm-commits
• [llvm] [indvars] Missing variables at Og: (PR #69920)   Carlos Alberto Enciso via llvm-commits
• [llvm] [indvars] Missing variables at Og: (PR #69920)   Carlos Alberto Enciso via llvm-commits
• [llvm] [indvars] Missing variables at Og: (PR #69920)   Carlos Alberto Enciso via llvm-commits
• [llvm] [AArch64] Implement INIT/ADJUST_TRAMPOLINE (PR #70267)   Carlos Eduardo Seo via llvm-commits
• [llvm] [AArch64] Implement INIT/ADJUST_TRAMPOLINE (PR #70267)   Carlos Eduardo Seo via llvm-commits
• [llvm] [AMDGPU] make w32i16/w32f16 legal (PR #70484)   Changpeng Fang via llvm-commits
• [llvm] [AMDGPU] make w32i16/w32f16 legal (PR #70484)   Changpeng Fang via llvm-commits
• [llvm] [AMDGPU] make v32i16/v32f16 legal (PR #70484)   Changpeng Fang via llvm-commits
• [llvm] [AMDGPU] make v32i16/v32f16 legal (PR #70484)   Changpeng Fang via llvm-commits
• [llvm] [llvm-symbolizer] nfc, use map instead of vector (PR #69552)   Chen Zheng via llvm-commits
• [llvm] [llvm-symbolizer] nfc, use map instead of vector (PR #69552)   Chen Zheng via llvm-commits
• [llvm] [llvm-symbolizer] nfc, use map instead of vector (PR #69552)   Chen Zheng via llvm-commits
• [llvm] [PowerPC] Add an alias for -mregnames so that full register names used in assembly. (PR #70255)   Chen Zheng via llvm-commits
• [llvm] [XCOFF] make related SD symbols as isFunction (PR #69553)   Chen Zheng via llvm-commits
• [llvm] [llvm-symbolizer] nfc, use map instead of vector (PR #69552)   Chen Zheng via llvm-commits
• [llvm] [llvm-symbolizer] nfc, use map instead of vector (PR #69552)   Chen Zheng via llvm-commits
• [llvm] [XCOFF] make related SD symbols as isFunction (PR #69553)   Chen Zheng via llvm-commits
• [llvm] [XCOFF] make related SD symbols as isFunction (PR #69553)   Chen Zheng via llvm-commits
• [llvm] [XCOFF] make related SD symbols as isFunction (PR #69553)   Chen Zheng via llvm-commits
• [llvm] [XCOFF] make related SD symbols as isFunction (PR #69553)   Chen Zheng via llvm-commits
• [llvm] [XCOFF] make related SD symbols as isFunction (PR #69553)   Chen Zheng via llvm-commits
• [llvm] [XCOFF] make related SD symbols as isFunction (PR #69553)   Chen Zheng via llvm-commits
• [llvm] [XCOFF] make related SD symbols as isFunction (PR #69553)   Chen Zheng via llvm-commits
• [llvm] [XCOFF] make related SD symbols as isFunction (PR #69553)   Chen Zheng via llvm-commits
• [llvm] [XCOFF] make related SD symbols as isFunction (PR #69553)   Chen Zheng via llvm-commits
• [llvm] [XCOFF] make related SD symbols as isFunction (PR #69553)   Chen Zheng via llvm-commits
• [llvm] [XCOFF] make related SD symbols as isFunction (PR #69553)   Chen Zheng via llvm-commits
• [llvm] [XCOFF] make related SD symbols as isFunction (PR #69553)   Chen Zheng via llvm-commits
• [llvm] [XCOFF] make related SD symbols as isFunction (PR #69553)   Chen Zheng via llvm-commits
• [llvm] [XCOFF] make related SD symbols as isFunction (PR #69553)   Chen Zheng via llvm-commits
• [llvm] [XCOFF] make related SD symbols as isFunction (PR #69553)   Chen Zheng via llvm-commits
• [llvm] [XCOFF] make related SD symbols as isFunction (PR #69553)   Chen Zheng via llvm-commits
• [llvm] [XCOFF] make related SD symbols as isFunction (PR #69553)   Chen Zheng via llvm-commits
• [llvm] [XCOFF] make related SD symbols as isFunction (PR #69553)   Chen Zheng via llvm-commits
• [llvm] [XCOFF] make related SD symbols as isFunction (PR #69553)   Chen Zheng via llvm-commits
• [compiler-rt] [scudo] Pass the max number of blocks to popBlocks (PR #70243)   Christopher Ferris via llvm-commits
• [compiler-rt] [scudo] Pass the max number of blocks to popBlocks (PR #70243)   Christopher Ferris via llvm-commits
• [compiler-rt] [scudo] Enable "Delayed release to OS" feature for Android (PR #65942)   Christopher Ferris via llvm-commits
• [compiler-rt] [scudo] Pass the max number of blocks to popBlocks (PR #70243)   Christopher Ferris via llvm-commits
• [compiler-rt] [scudo] Store more blocks in each TransferBatch (PR #70390)   Christopher Ferris via llvm-commits
• [compiler-rt] [scudo] Store more blocks in each TransferBatch (PR #70390)   Christopher Ferris via llvm-commits
• [compiler-rt] [scudo] Store more blocks in each TransferBatch (PR #70390)   Christopher Ferris via llvm-commits
• [llvm] [AMDGPU] Add writelane and readlane pseudos for SGPR spilling (PR #69923)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Improve isBasicBlockPrologue helper function (PR #69924)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Improve isBasicBlockPrologue helper function (PR #69924)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Add writelane and readlane pseudos for SGPR spilling (PR #69923)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Add writelane and readlane pseudos for SGPR spilling (PR #69923)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Improve isBasicBlockPrologue helper function (PR #69924)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Add writelane and readlane pseudos for SGPR spilling (PR #69923)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Add writelane and readlane pseudos for SGPR spilling (PR #69923)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Cleanup hasUnwantedEffectsWhenEXECEmpty function (PR #70206)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Add writelane and readlane pseudos for SGPR spilling (PR #69923)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Cleanup hasUnwantedEffectsWhenEXECEmpty function (PR #70206)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Add writelane and readlane pseudos for SGPR spilling (PR #69923)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Add writelane and readlane pseudos for SGPR spilling (PR #69923)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Add writelane and readlane pseudos for SGPR spilling (PR #69923)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Improve isBasicBlockPrologue helper function (PR #69924)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Improve isBasicBlockPrologue helper function (PR #69924)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Improve isBasicBlockPrologue helper function (PR #69924)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Improve isBasicBlockPrologue helper function (PR #69924)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Add writelane and readlane pseudos for SGPR spilling (PR #69923)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Add writelane and readlane pseudos for SGPR spilling (PR #69923)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Add writelane and readlane pseudos for SGPR spilling (PR #69923)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Improve isBasicBlockPrologue helper function (PR #69924)   Christudasan Devadasan via llvm-commits
• [llvm] 16fbc45 - Revert "[AMDGPU] Cleanup hasUnwantedEffectsWhenEXECEmpty function (#70206)"   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Cleanup hasUnwantedEffectsWhenEXECEmpty function (PR #70206)   Christudasan Devadasan via llvm-commits
• [llvm] bb2b753 - [AMDGPU] precommit lit test for PR 69924.   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Add writelane and readlane pseudos for SGPR spilling (PR #69923)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Add writelane and readlane pseudos for SGPR spilling (PR #69923)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Improve isBasicBlockPrologue helper function (PR #69924)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Improve isBasicBlockPrologue helper function (PR #69924)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Improve isBasicBlockPrologue helper function (PR #69924)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Improve isBasicBlockPrologue helper function (PR #69924)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Improve isBasicBlockPrologue helper function (PR #69924)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Add writelane and readlane pseudos for SGPR spilling (PR #69923)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Improve isBasicBlockPrologue helper function (PR #69924)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Improve isBasicBlockPrologue helper function (PR #69924)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Move WWM register pre-allocation to during regalloc (PR #70618)   Christudasan Devadasan via llvm-commits
• [llvm] [RFC] Perform lifetime bound checks for arguments to coroutine (PR #69360)   Chuanqi Xu via llvm-commits
• [llvm] [RFC] Perform lifetime bound checks for arguments to coroutine (PR #69360)   Chuanqi Xu via llvm-commits
• [llvm] [RFC] Perform lifetime bound checks for arguments to coroutine (PR #69360)   Chuanqi Xu via llvm-commits
• [llvm] [CodeGen] Improve ExpandMemCmp for more efficient non-register aligned sizes handling (PR #69942)   Clement Courbet via llvm-commits
• [llvm] [CodeGen] Improve ExpandMemCmp for more efficient non-register aligned sizes handling (PR #69942)   Clement Courbet via llvm-commits
• [llvm] [CodeGen] Improve ExpandMemCmp for more efficient non-register aligned sizes handling (PR #69942)   Clement Courbet via llvm-commits
• [llvm] [CodeGen] Improve ExpandMemCmp for more efficient non-register aligned sizes handling (PR #69942)   Clement Courbet via llvm-commits
• [llvm] [CodeGen] Improve ExpandMemCmp for more efficient non-register aligned sizes handling (PR #69942)   Clement Courbet via llvm-commits
• [llvm] [CodeGen] Improve ExpandMemCmp for more efficient non-register aligned sizes handling (PR #69942)   Clement Courbet via llvm-commits
• [llvm] [CodeGen] Improve ExpandMemCmp for more efficient non-register aligned sizes handling (PR #69942)   Clement Courbet via llvm-commits
• [llvm] [clang]Transform uninstantiated ExceptionSpec in TemplateInstantiator (PR #68878)   Congcong Cai via llvm-commits
• [llvm] [clang]Transform uninstantiated ExceptionSpec in TemplateInstantiator (PR #68878)   Congcong Cai via llvm-commits
• [llvm] [clang]improve diagnosing redefined defaulted constructor with different exception specs (PR #69688)   Congcong Cai via llvm-commits
• [compiler-rt] [clang]set invalid for lambda which missing capture `this` (PR #70432)   Congcong Cai via llvm-commits
• [compiler-rt] [clang]set invalid for lambda which missing capture `this` (PR #70432)   Congcong Cai via llvm-commits
• [compiler-rt] [clang-tidy]Fix PreferMemberInitializer false positive for reassignment (PR #70316)   Congcong Cai via llvm-commits
• [lld] [clang]set invalid for lambda which missing capture `this` (PR #70432)   Congcong Cai via llvm-commits
• [lld] [clang-tidy]Fix PreferMemberInitializer false positive for reassignment (PR #70316)   Congcong Cai via llvm-commits
• [llvm] [GISel] Pass MPO and VA to assignValueToAddress by const reference. NFC (PR #69810)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISel] Add ISel support for SHXADD_UW and SLLI.UW (PR #69972)   Craig Topper via llvm-commits
• [llvm] 51446d9 - [RISCV] Only check for scalar VT at depth 0 in hasAllNBitUsers.   Craig Topper via llvm-commits
• [llvm] [RISCV] Add an experimental pseudoinstruction to represent a rematerializable constant materialization sequence. (PR #69983)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add an experimental pseudoinstruction to represent a rematerializable constant materialization sequence. (PR #69983)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISel][NFC] Correct the test case in constant32.mir (PR #70003)   Craig Topper via llvm-commits
• [llvm] [RISCV][SDAG] Prefer ShortForwardBranch to lower sdiv by pow2 (PR #67364)   Craig Topper via llvm-commits
• [llvm] [RISCV][SDAG] Prefer ShortForwardBranch to lower sdiv by pow2 (PR #67364)   Craig Topper via llvm-commits
• [llvm] [RISCV][SDAG] Prefer ShortForwardBranch to lower sdiv by pow2 (PR #67364)   Craig Topper via llvm-commits
• [llvm] [RISCV][SDAG] Prefer ShortForwardBranch to lower sdiv by pow2 (PR #67364)   Craig Topper via llvm-commits
• [llvm] [GISel] Pass MPO and VA to assignValueToAddress by const reference. NFC (PR #69810)   Craig Topper via llvm-commits
• [llvm] [DAGCombiner] Fix misuse of getZeroExtendInReg in SimplifySelectCC. (PR #70066)   Craig Topper via llvm-commits
• [llvm] [GISel] Make assignValueToReg take CCValAssign by const reference. (PR #70086)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add an experimental pseudoinstruction to represent a rematerializable constant materialization sequence. (PR #69983)   Craig Topper via llvm-commits
• [llvm] [RISCV][GlobalISel] Select G_GLOBAL_VALUE (PR #70091)   Craig Topper via llvm-commits
• [llvm] [RISCV][GlobalISel] Select G_GLOBAL_VALUE (PR #70091)   Craig Topper via llvm-commits
• [llvm] [DAGCombiner] Fix misuse of getZeroExtendInReg in SimplifySelectCC. (PR #70066)   Craig Topper via llvm-commits
• [llvm] [Analysis] Add Scalable field in MemoryLocation.h (PR #69716)   Craig Topper via llvm-commits
• [llvm] [RISCV] Macro-fusion support for veyron-v1 CPU. (PR #70012)   Craig Topper via llvm-commits
• [llvm] [RISCV] Macro-fusion support for veyron-v1 CPU. (PR #70012)   Craig Topper via llvm-commits
• [llvm] [RISCV][GlobalISel] Select G_GLOBAL_VALUE (PR #70091)   Craig Topper via llvm-commits
• [llvm] [RISCV] Macro-fusion support for veyron-v1 CPU. (PR #70012)   Craig Topper via llvm-commits
• [llvm] [RISCV] Macro-fusion support for veyron-v1 CPU. (PR #70012)   Craig Topper via llvm-commits
• [llvm] [RISCV] Mark V0 regclasses as larger superclasses of non-V0 classes (PR #70109)   Craig Topper via llvm-commits
• [llvm] [RISCV][GlobalISel] Select G_GLOBAL_VALUE (PR #70091)   Craig Topper via llvm-commits
• [llvm] [RISCV][GlobalISel] Select G_GLOBAL_VALUE (PR #70091)   Craig Topper via llvm-commits
• [llvm] [RISCV][GlobalISel] Select G_GLOBAL_VALUE (PR #70091)   Craig Topper via llvm-commits
• [llvm] [RISCV][NFC] Fix comments in foldMemoryOperandImpl (PR #70033)   Craig Topper via llvm-commits
• [llvm] [RISCV][GlobalISel] Select G_GLOBAL_VALUE (PR #70091)   Craig Topper via llvm-commits
• [llvm] [RISCV] Remove RISCVISD opcodes for LGA, LA_TLS_IE, and LA_TLS_GD. (PR #70137)   Craig Topper via llvm-commits
• [llvm] [GISel] Make assignValueToReg take CCValAssign by const reference. (PR #70086)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISel] Add ISel support for SHXADD_UW and SLLI.UW (PR #69972)   Craig Topper via llvm-commits
• [llvm] [RISCV][GlobalISel] Select G_GLOBAL_VALUE (PR #70091)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISel] Add FP calling convention support (PR #69138)   Craig Topper via llvm-commits
• [llvm] [RISCV] Macro-fusion support for veyron-v1 CPU. (PR #70012)   Craig Topper via llvm-commits
• [llvm] 35d771f - [RISCV][GISel] Fix failure to legalize non-power of 2 shifts between i32 and i64 on RV64.   Craig Topper via llvm-commits
• [llvm] 34af57c - [RISCV][GISel] Add G_SEXTLOAD to legalizer and regbank select. Add instruction selection tests.   Craig Topper via llvm-commits
• [llvm] [RISCV][GISel] Falling back to SDISel for scalable vector type values (PR #70133)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISEL] Add legalizer for G_BSWAP (PR #70226)   Craig Topper via llvm-commits
• [llvm] 8efd679 - [RISCV][GISel] Add clampScalar G_ZEXTLOAD/G_SEXTLOAD legalization rules.   Craig Topper via llvm-commits
• [llvm] [RISCV][GISel] Add FP calling convention support (PR #69138)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISel] Add FP calling convention support (PR #69138)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISel] Add FP calling convention support (PR #69138)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add sched model for XiangShan-NanHu (PR #70232)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISel] Add instruction selection for G_FADD/G_FSUB/G_FMUL/G_FDIV with F/D extensions. (PR #69808)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISEL] Add legalizer for G_BSWAP (PR #70226)   Craig Topper via llvm-commits
• [llvm] 674b53d - [RISCV][GISel] Add widenScalarToNextPow2 to G_SEXTLOAD/G_ZEXTLOAD legalization.   Craig Topper via llvm-commits
• [llvm] [AMDGPU] Fix gcc -Wparentheses warning. NFC (PR #70239)   Craig Topper via llvm-commits
• [llvm] [Mips][GISel] Fix a couple issues with passing f64 in 32-bit GPRs. (PR #69131)   Craig Topper via llvm-commits
• [llvm] [RISCV] Remove RISCVISD opcodes for LGA, LA_TLS_IE, and LA_TLS_GD. (PR #70137)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISel] Add FP calling convention support (PR #69138)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISEL] Add legalizer for G_BSWAP (PR #70226)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISEL] Add legalizer for G_BSWAP (PR #70226)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISEL] Add legalizer for G_BSWAP (PR #70226)   Craig Topper via llvm-commits
• [llvm] [GISel] Restrict G_BSWAP to multiples of 16 bits. (PR #70245)   Craig Topper via llvm-commits
• [llvm] [GISel] Restrict G_BSWAP to multiples of 16 bits. (PR #70245)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISel] Add FP calling convention support (PR #69138)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISel] Add legalizer support for G_FADD/G_FSUB/G_FMUL/G_FDIV with F/D extensions. (PR #69804)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISel] Add legalizer support for G_FADD/G_FSUB/G_FMUL/G_FDIV with F/D extensions. (PR #69804)   Craig Topper via llvm-commits
• [llvm] b379520 - [RISCV][GISel] Add missing using LegalityPredicates.   Craig Topper via llvm-commits
• [llvm] [RISCV][GISel] Add regbank selection for G_FADD/G_FSUB/G_FMUL/G_FDIV with F/D extensions. (PR #69805)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISel] Add regbank selection for G_FADD/G_FSUB/G_FMUL/G_FDIV with F/D extensions. (PR #69805)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISel] Add instruction selection for G_FADD/G_FSUB/G_FMUL/G_FDIV with F/D extensions. (PR #69808)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISel] Add instruction selection for G_FADD/G_FSUB/G_FMUL/G_FDIV with F/D extensions. (PR #69808)   Craig Topper via llvm-commits
• [llvm] [RISCV] Macro-fusion support for veyron-v1 CPU. (PR #70012)   Craig Topper via llvm-commits
• [llvm] [RISCV] Macro-fusion support for veyron-v1 CPU. (PR #70012)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISEL] Add legalizer for G_BSWAP (PR #70226)   Craig Topper via llvm-commits
• [llvm] [RISCV] SiFive7 VLDS Sched should not depend on VL when stride is x0. (PR #70266)   Craig Topper via llvm-commits
• [llvm] [AMDGPU] Fix gcc -Wparentheses warning. NFC (PR #70239)   Craig Topper via llvm-commits
• [llvm] [RISCV] SiFive7 VLDS Sched should not depend on VL when stride is x0. (PR #70266)   Craig Topper via llvm-commits
• [llvm] [RISCV] SiFive7 VLDS Sched should not depend on VL when stride is x0. (PR #70266)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add an experimental pseudoinstruction to represent a rematerializable constant materialization sequence. (PR #69983)   Craig Topper via llvm-commits
• [llvm] [RISCV] Separate addend from FMA operands to support cascade FMA. NFC. (PR #70241)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add an experimental pseudoinstruction to represent a rematerializable constant materialization sequence. (PR #69983)   Craig Topper via llvm-commits
• [llvm] [X86][NFC] Reorder the registers to reduce unnecessary iterations (PR #70222)   Craig Topper via llvm-commits
• [llvm] [X86][NFC] Reorder the registers to reduce unnecessary iterations (PR #70222)   Craig Topper via llvm-commits
• [llvm] [GISel] Restrict G_BSWAP to multiples of 16 bits. (PR #70245)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISel] Rename XLenVT sXLen to be consistent with other LLTs. (PR #70288)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISel] Rename XLenVT sXLen to be consistent with other LLTs. (PR #70288)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISel] Rename XLenVT sXLen to be consistent with other LLTs. (PR #70288)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISel] Rename XLenVT sXLen to be consistent with other LLTs. (PR #70288)   Craig Topper via llvm-commits
• [llvm] [AMDGPU] Correct assert that incorrectly chained multiple == operators. (PR #70291)   Craig Topper via llvm-commits
• [llvm] [AMDGPU] Correct assert that incorrectly chained multiple == operators. (PR #70291)   Craig Topper via llvm-commits
• [llvm] 2d0ac85 - [X86] Fix gcc warning about mix of enumeral and non-enumeral types. NFC   Craig Topper via llvm-commits
• [llvm] [GISel] Restrict G_BSWAP to multiples of 16 bits. (PR #70245)   Craig Topper via llvm-commits
• [llvm] [RISCV] SiFive7 VLDS Sched should not depend on VL when stride is x0. (PR #70266)   Craig Topper via llvm-commits
• [llvm] [RISCV] SiFive7 VLDS Sched should not depend on VL when stride is x0. (PR #70266)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add experimental support for making i32 a legal type on RV64 in SelectionDAG. (PR #70357)   Craig Topper via llvm-commits
• [llvm] d307dc5 - [RISCV][GISel] Allow G_AND/G_OR/G_XOR to have s32 types on RV64.   Craig Topper via llvm-commits
• [llvm] [RISCV] Be more aggressive about forming floating point constants (PR #68433)   Craig Topper via llvm-commits
• [llvm] [RISCV] Be more aggressive about forming floating point constants (PR #68433)   Craig Topper via llvm-commits
• [llvm] [RISCV] Be more aggressive about forming floating point constants (PR #68433)   Craig Topper via llvm-commits
• [llvm] [RISCV] Implement cross basic block VXRM write insertion. (PR #70382)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISEL] Add legalizer for G_BSWAP (PR #70226)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISEL] Add legalizer for G_BSWAP (PR #70226)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISEL] Add legalizer for G_BSWAP (PR #70226)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISel] Rename XLenVT sXLen to be consistent with other LLTs. (PR #70288)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISel] Rename XLenVT sXLen to be consistent with other LLTs. (PR #70288)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISel] Rename XLenVT sXLen to be consistent with other LLTs. (PR #70288)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use RISCVInstrInfo::movImm to implement most of RISCVPostRAExpandPseudo::expandMovImm (PR #70389)   Craig Topper via llvm-commits
• [llvm] [VP][RISCV] Add llvm.experimental.vp.reverse. (PR #70405)   Craig Topper via llvm-commits
• [llvm] [VP][RISCV] Add llvm.experimental.vp.reverse. (PR #70405)   Craig Topper via llvm-commits
• [llvm] [RISCV] Fix incorrect use of Zfa fli instruction for negative minimum value. (PR #70411)   Craig Topper via llvm-commits
• [llvm] be0cbe9 - [RISCV] Add test cases showing fli being used for negative min normalized value.   Craig Topper via llvm-commits
• [llvm] 8ff1422 - [RISCV] Fix incorrect use of Zfa fli instruction for negative minimum value. (#70411)   Craig Topper via llvm-commits
• [llvm] [RISCV] Fix incorrect use of Zfa fli instruction for negative minimum value. (PR #70411)   Craig Topper via llvm-commits
• [llvm] [RISCV] Fix incorrect use of Zfa fli instruction for negative minimum value. (PR #70411)   Craig Topper via llvm-commits
• [llvm] [RISCV] Fix wrong implication for zvknhb. (PR #66860)   Craig Topper via llvm-commits
• [llvm] [RISCV] Support Xsfvfwmaccqqq extensions (PR #68296)   Craig Topper via llvm-commits
• [llvm] [RISCV] Support Xsfvfwmaccqqq extensions (PR #68296)   Craig Topper via llvm-commits
• [llvm] [RISCV] Support Xsfvfwmaccqqq extensions (PR #68296)   Craig Topper via llvm-commits
• [llvm] [RISCV] Support Xsfvfnrclipxfqf extensions (PR #68297)   Craig Topper via llvm-commits
• [llvm] [RISCV] Correct copyPhysReg for GPRPF64. (PR #70419)   Craig Topper via llvm-commits
• [llvm] [RISCV] Correct copyPhysReg for GPRPF64. (PR #70419)   Craig Topper via llvm-commits
• [llvm] [RISCV] Correct copyPhysReg for GPRPF64. (PR #70419)   Craig Topper via llvm-commits
• [llvm] [RISCV] Implement cross basic block VXRM write insertion. (PR #70382)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add `TuneVentanaVeyron` subtarget feature. (PR #70414)   Craig Topper via llvm-commits
• [llvm] [RISCV] Correct copyPhysReg for GPRPF64. (PR #70419)   Craig Topper via llvm-commits
• [llvm] [VP][RISCV] Add llvm.experimental.vp.reverse. (PR #70405)   Craig Topper via llvm-commits
• [llvm] [RISCV] Begin moving post-isel vector peepholes to a MF pass (PR #70342)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISEL] Add legalizer for G_BSWAP (PR #70226)   Craig Topper via llvm-commits
• [llvm] [IR] Add zext nneg flag (PR #67982)   Craig Topper via llvm-commits
• [llvm] [IR] Add zext nneg flag (PR #67982)   Craig Topper via llvm-commits
• [llvm] [RISCV] Separate FPR and VR copyPhysReg implementation. (PR #70492)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add copyPhysRegVector to extract common vector code out of copyPhysRegVector. (PR #70497)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add copyPhysRegVector to extract common vector code out of copyPhysRegVector. (PR #70497)   Craig Topper via llvm-commits
• [llvm] [RISCV] Separate FPR and VR copyPhysReg implementation. (PR #70492)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add copyPhysRegVector to extract common vector code out of copyPhysRegVector. (PR #70497)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add copyPhysRegVector to extract common vector code out of copyPhysRegVector. (PR #70497)   Craig Topper via llvm-commits
• [llvm] [RISCV] Reduce the number of parameters to copyPhysRegVector. NFC (PR #70502)   Craig Topper via llvm-commits
• [llvm] [RISCV] Reduce the number of parameters to copyPhysRegVector. NFC (PR #70502)   Craig Topper via llvm-commits
• [llvm] 035c154 - [RISCV] Refactor RISCVPostRAExpandPseudo::expandMovImm and RISCVInstrInfo::movImm to prepare for merging.   Craig Topper via llvm-commits
• [llvm] b679ec8 - [RISCV] Use RISCVInstrInfo::movImm to implement most of RISCVPostRAExpandPseudo::expandMovImm (#70389)   Craig Topper via llvm-commits
• [llvm] [RISCV] Reduce the number of parameters to copyPhysRegVector. NFC (PR #70502)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use RISCVInstrInfo::movImm to implement most of RISCVPostRAExpandPseudo::expandMovImm (PR #70389)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use RISCVInstrInfo::movImm to implement most of RISCVPostRAExpandPseudo::expandMovImm (PR #70389)   Craig Topper via llvm-commits
• [llvm] [IR] Add zext nneg flag (PR #67982)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add `TuneVentanaVeyron` subtarget feature. (PR #70414)   Craig Topper via llvm-commits
• [llvm] [VP][RISCV] Add llvm.experimental.vp.reverse. (PR #70405)   Craig Topper via llvm-commits
• [llvm] [RISCV] Teach copyPhysReg to allow copies between GPR<->FPR32/FPR64 when the GPR is the same size. (PR #70525)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISel] Add a special case to selectCopy for FPR32<->GPR on RV64. (PR #70526)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISel] Add a special case to selectCopy for FPR32<->GPR on RV64. (PR #70526)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISel] Add a special case to selectCopy for FPR32<->GPR on RV64. (PR #70526)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISel] Add a special case to selectCopy for FPR32<->GPR on RV64. (PR #70526)   Craig Topper via llvm-commits
• [llvm] [RISCV] Teach copyPhysReg to allow copies between GPR<->FPR32/FPR64 when the GPR is the same size. (PR #70525)   Craig Topper via llvm-commits
• [llvm] [RISCV] Teach copyPhysReg to allow copies between GPR<->FPR32/FPR64 (PR #70525)   Craig Topper via llvm-commits
• [llvm] [RISCV] Teach copyPhysReg to allow copies between GPR<->FPR32/FPR64 (PR #70525)   Craig Topper via llvm-commits
• [llvm] [RISCV][GlobalISel] Select G_GLOBAL_VALUE (PR #70091)   Craig Topper via llvm-commits
• [llvm] [RISCV] Support Strict FP arithmetic Op when only have Zvfhmin (PR #68867)   Craig Topper via llvm-commits
• [llvm] 49ae2ef - [RISCV][GISel] Support G_FMA/NEG/ABS/SQRT/MAXNUM/MINNUM for F and D extension.   Craig Topper via llvm-commits
• [llvm] 4ac3042 - [RISCV][GISel] Support G_FPEXT/G_FPTRUNC for F and D extension.   Craig Topper via llvm-commits
• [llvm] 133e50d - [RISCV][GISel] Directly emit X0 from getICMPOperandsForBranch instead of using buildConstant+selectConstant.   Craig Topper via llvm-commits
• [llvm] [X86][NFC] Reorder the registers to reduce unnecessary iterations (PR #70222)   Craig Topper via llvm-commits
• [llvm] [RISCV][NFC] Combine redundant 'if' statements (PR #70423)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISel] Add support for G_FCMP with F and D extensions. (PR #70624)   Craig Topper via llvm-commits
• [llvm] [RISCV][NFC] Combine redundant 'if' statements (PR #70423)   Craig Topper via llvm-commits
• [PATCH] D70401: [RISCV] CodeGen of RVE and ilp32e/lp64e ABIs   Craig Topper via Phabricator via llvm-commits
• [llvm] [llvm] Followup fix for "Use XMACROS for MachO platforms" (PR #70140)   Cyndy Ishida via llvm-commits
• [llvm] [llvm] Followup fix for "Use XMACROS for MachO platforms" (PR #70140)   Cyndy Ishida via llvm-commits
• [llvm] [llvm] Add myself as codeowner for TextAPI (PR #70399)   Cyndy Ishida via llvm-commits
• [llvm] [llvm] Add myself as codeowner for TextAPI (PR #70399)   Cyndy Ishida via llvm-commits
• [llvm] [objcopy] Implement --weaken, --weaken-symbol(s) flags for MachO Object Files (PR #70560)   Dan Zimmerman via llvm-commits
• [llvm] [objcopy] Implement --weaken, --weaken-symbol(s) flags for MachO Object Files (PR #70560)   Dan Zimmerman via llvm-commits
• [llvm] [objcopy] Implement --weaken, --weaken-symbol(s) flags for MachO Object Files (PR #70560)   Dan Zimmerman via llvm-commits
• [llvm] 3333096 - [Test] NFC. Add a test exposing a SCEV bug causing an LSR miscompile   Daniil Suchkov via llvm-commits
• [llvm] 505e323 - [Test] NFC. Add missing "REQUIRES: x86-registered-target" to LoopStrengthReduce/scev-incorrect-nuw-inference.ll   Daniil Suchkov via llvm-commits
• [llvm] [SCEV] Fix incorrect NUW inference (PR #70521)   Daniil Suchkov via llvm-commits
• [llvm] [NFC] Extract LoopConstrainer from IRCE to reuse it outside the pass (PR #70508)   Danila Malyutin via llvm-commits
• [llvm] Fixed Windows build warnings (PR #68978)   David Blaikie via llvm-commits
• [llvm] [Support] Better error msg when cache dir can't be created. (PR #69575)   David Blaikie via llvm-commits
• [llvm] [ADT] Support appending multiple values (PR #69891)   David Blaikie via llvm-commits
• [llvm] [NFC] Move DIExpressionCursor to DebugInfoMetadata.h (PR #69768)   David Blaikie via llvm-commits
• [llvm] [LLVM[NFC] Refactor to allow debug_names entries to conatain DIE offset (PR #69399)   David Blaikie via llvm-commits
• [llvm] [LLVM[NFC] Refactor to allow debug_names entries to conatain DIE offset (PR #69399)   David Blaikie via llvm-commits
• [llvm] [LLVM[NFC] Refactor to allow debug_names entries to conatain DIE offset (PR #69399)   David Blaikie via llvm-commits
• [llvm] [LLVM[NFC] Refactor to allow debug_names entries to conatain DIE offset (PR #69399)   David Blaikie via llvm-commits
• [llvm] [LLVM[NFC] Refactor to allow debug_names entries to conatain DIE offset (PR #69399)   David Blaikie via llvm-commits
• [llvm] [DebugMetadata][DwarfDebug] Clone uniqued function-local types after metadata loading (PR #68986)   David Blaikie via llvm-commits
• [llvm] [DebugMetadata][DwarfDebug] Clone uniqued function-local types after metadata loading (PR #68986)   David Blaikie via llvm-commits
• [llvm] [DebugMetadata][DwarfDebug] Clone uniqued function-local types after metadata loading (PR #68986)   David Blaikie via llvm-commits
• [llvm] [DebugMetadata][DwarfDebug] Clone uniqued function-local types after metadata loading (PR #68986)   David Blaikie via llvm-commits
• [PATCH] D101011: [Attr] Add "noipa" function attribute   David Blaikie via Phabricator via llvm-commits
• [PATCH] D101011: [Attr] Add "noipa" function attribute   David Blaikie via Phabricator via llvm-commits
• [PATCH] D101011: [Attr] Add "noipa" function attribute   David Blaikie via Phabricator via llvm-commits
• [llvm] [AArch64] Don't generate st2 for 64bit store that can use stp (PR #69901)   David Green via llvm-commits
• [llvm] [AArch64] Don't generate st2 for 64bit store that can use stp (PR #69901)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Legalize G_VECREDUCE_{MIN/MAX} (PR #69461)   David Green via llvm-commits
• [llvm] [AArch64] Only clear kill flags if necessary when merging str (PR #69680)   David Green via llvm-commits
• [llvm] [AArch64] Lower mathlib call ldexp into fscale when sve is enabled (PR #67552)   David Green via llvm-commits
• [llvm] [AArch64] Don't generate st2 for 64bit store that can use stp (PR #69901)   David Green via llvm-commits
• [llvm] SLPVectorizer: vectorize lrint, llrint (PR #69945)   David Green via llvm-commits
• [llvm] [RISCV][SDAG] Prefer ShortForwardBranch to lower sdiv by pow2 (PR #67364)   David Green via llvm-commits
• [llvm] [RISCV][SDAG] Prefer ShortForwardBranch to lower sdiv by pow2 (PR #67364)   David Green via llvm-commits
• [llvm] Scalarizer: add negative test for lrint, llrint (PR #70203)   David Green via llvm-commits
• [llvm] [AArch64] Clarify that Anyext is OK for MOPS instructions. NFC (PR #70298)   David Green via llvm-commits
• [llvm] [LoopVectorize] Enhance Vectorization decisions for predicate tail-folded loops with low trip counts (PR #69588)   David Green via llvm-commits
• [llvm] [LoopVectorize] Enhance Vectorization decisions for predicate tail-folded loops with low trip counts (PR #69588)   David Green via llvm-commits
• [llvm] 3fe8fd7 - [AArch64] Fix st2 check for nearby store with debug info.   David Green via llvm-commits
• [llvm] [AArch64][TTI] Improve `LegalVF` when computing gather-loads cost (PR #69617)   David Green via llvm-commits
• [llvm] 58bdd16 - [ARM] Add a test for incorrect demand bits / undef fold. NFC   David Green via llvm-commits
• [llvm] [AArch64][TTI] Improve `LegalVF` when computing gather-loads cost (PR #69617)   David Green via llvm-commits
• [llvm] [ARM] Fix for undef elements from demanded elements (PR #70504)   David Green via llvm-commits
• [llvm] 7d225bf - [AArch64] Clarify that Anyext is OK for MOPS instructions. NFC   David Green via llvm-commits
• [llvm] [AArch64] Clarify that Anyext is OK for MOPS instructions. NFC (PR #70298)   David Green via llvm-commits
• [llvm] [ConstantHoisting] Add a TTI hook to prevent hoisting. (PR #69004)   David Green via llvm-commits
• [llvm] 072a7ed - [AArch64] Add additional concat trunc -> UZP1 patterns   David Green via llvm-commits
• [compiler-rt] [Profile] Add binary profile correlation to offload profile metadata at runtime. (PR #69493)   David Li via llvm-commits
• [llvm] [llvm-profdata] Emit warning when counter value is greater than 2^56. (PR #69513)   David Li via llvm-commits
• [compiler-rt] [IRPGO][ValueProfile] Instrument virtual table address that could be used to do virtual table address comparision for indirect-call-promotion. (PR #66825)   David Li via llvm-commits
• [compiler-rt] [IRPGO][ValueProfile] Instrument virtual table address that could be used to do virtual table address comparision for indirect-call-promotion. (PR #66825)   David Li via llvm-commits
• [compiler-rt] [IRPGO][ValueProfile] Instrument virtual table address that could be used to do virtual table address comparision for indirect-call-promotion. (PR #66825)   David Li via llvm-commits
• [llvm] [IRPGO][ValueProfile] Instrument virtual table address that could be used to do virtual table address comparision for indirect-call-promotion. (PR #66825)   David Li via llvm-commits
• [llvm] [IRPGO][ValueProfile] Instrument virtual table address that could be used to do virtual table address comparision for indirect-call-promotion. (PR #66825)   David Li via llvm-commits
• [llvm] [llvm-profdata] Emit warning when counter value is greater than 2^56. (PR #69513)   David Li via llvm-commits
• [llvm] [PGO] Sampled instrumentation in PGO to speed up instrumentation binary (PR #69535)   David Li via llvm-commits
• [llvm] [Profile] Refactor profile correlation. (PR #69656)   David Li via llvm-commits
• [llvm] [Profile] Refactor profile correlation. (PR #69656)   David Li via llvm-commits
• [compiler-rt] [Profile] Refactor profile correlation. (PR #69656)   David Li via llvm-commits
• [llvm] [Profile] Refactor profile correlation. (PR #69656)   David Li via llvm-commits
• [llvm] Bfi precision (PR #66285)   David Li via llvm-commits
• [compiler-rt] Bfi precision (PR #66285)   David Li via llvm-commits
• [llvm] [NFC]Rename collectPGOFuncNameStrings to collectGlobalVariableNameStrings (PR #70287)   David Li via llvm-commits
• [llvm] [NFC]Rename collectPGOFuncNameStrings to collectGlobalObjectNameStrings (PR #70287)   David Li via llvm-commits
• [llvm] Bfi precision (PR #66285)   David Li via llvm-commits
• [compiler-rt] Bfi precision (PR #66285)   David Li via llvm-commits
• [llvm] Bfi precision (PR #66285)   David Li via llvm-commits
• [llvm] [NFC] In InstrProf, generalize helper functions to take 'GlobalObject'. They currently take 'Functions' as function parameters or have 'Func' in the name. (PR #70287)   David Li via llvm-commits
• [compiler-rt] Bfi precision (PR #66285)   David Li via llvm-commits
• [llvm] Bfi precision (PR #66285)   David Li via llvm-commits
• [llvm] [AArch64][SVE2] Use rshrnb for masked stores (PR #70026)   David Sherwood via llvm-commits
• [llvm] [AArch64][SVE2] Use rshrnb for masked stores (PR #70026)   David Sherwood via llvm-commits
• [llvm] [AArch64][SVE2] Use rshrnb for masked stores (PR #70026)   David Sherwood via llvm-commits
• [llvm] [AArch64][SVE2] Use rshrnb for masked stores (PR #70026)   David Sherwood via llvm-commits
• [llvm] [CodeGen] Improve ExpandMemCmp for more efficient non-register aligned sizes handling (PR #69942)   David Sherwood via llvm-commits
• [llvm] [CodeGen] Improve ExpandMemCmp for more efficient non-register aligned sizes handling (PR #69942)   David Sherwood via llvm-commits
• [llvm] [SVE] Fix incorrect offset calculation when rewriting an instruction's frame index. (PR #70315)   David Sherwood via llvm-commits
• [llvm] [AArch64] Allow SVE code generation for fixed-width vectors (PR #67122)   David Spickett via llvm-commits
• [llvm] [llvm][Release] Add note about binaries to Github release description (PR #69698)   David Spickett via llvm-commits
• [llvm] [llvm][TableGen] Add a README to the main TableGen folder (PR #69943)   David Spickett via llvm-commits
• [llvm] [llvm][TableGen] Add a README to the main TableGen folder (PR #69943)   David Spickett via llvm-commits
• [llvm] [llvm][TableGen] Add a README to the main TableGen folder (PR #69943)   David Spickett via llvm-commits
• [llvm] [llvm][TableGen] Add a README to the main TableGen folder (PR #69943)   David Spickett via llvm-commits
• [llvm] [llvm][TableGen] Add a README to the main TableGen folder (PR #69943)   David Spickett via llvm-commits
• [llvm] [llvm][TableGen] Add a README to the main TableGen folder (PR #69943)   David Spickett via llvm-commits
• [llvm] [llvm][TableGen] Add a README to the main TableGen folder (PR #69943)   David Spickett via llvm-commits
• [llvm] [llvm][TableGen] Add a README to the main TableGen folder (PR #69943)   David Spickett via llvm-commits
• [llvm] [lldb][AArch64] Read mte_ctrl register from core files (PR #69689)   David Spickett via llvm-commits
• [llvm] [CodeGen] Improve ExpandMemCmp for more efficient non-register aligned sizes handling (PR #69942)   David Spickett via llvm-commits
• [llvm] [CodeGen] Improve ExpandMemCmp for more efficient non-register aligned sizes handling (PR #69942)   David Spickett via llvm-commits
• [llvm] [SelectionDAG] Salvage debug info for non-constant ADDs (PR #68981)   David Stenberg via llvm-commits
• [llvm] 6b25890 - Revert "[SelectionDAG] Salvage debug info for non-constant ADDs (#68981)"   David Stenberg via llvm-commits
• [llvm] [SelectionDAG] Salvage debug info for non-constant ADDs (PR #68981)   David Stenberg via llvm-commits
• [llvm] 22f1217 - [SelectionDAG] Salvage debug info for non-constant ADDs (2nd try) (#68981)   David Stenberg via llvm-commits
• [llvm] [SelectionDAG] Salvage debug info for non-constant ADDs (PR #68981)   David Stenberg via llvm-commits
• [llvm] Fix comment in wasm unreachable test (PR #70340)   Derek Schuff via llvm-commits
• [llvm] Fix comment in wasm unreachable test (PR #70340)   Derek Schuff via llvm-commits
• [llvm] VectorWiden pass to widen aleady vectorized instrctions (PR #67029)   Dinar Temirbulatov via llvm-commits
• [llvm] VectorWiden pass to widen aleady vectorized instrctions (PR #67029)   Dinar Temirbulatov via llvm-commits
• [llvm] VectorWiden pass to widen aleady vectorized instrctions (PR #67029)   Dinar Temirbulatov via llvm-commits
• [llvm] VectorWiden pass to widen aleady vectorized instrctions (PR #67029)   Dinar Temirbulatov via llvm-commits
• [llvm] [SVE2.1][Clang][LLVM]Int/FP reduce builtin in Clang and LLVM intrinsic (PR #69926)   Dinar Temirbulatov via llvm-commits
• [llvm] Add Scorecard Action (PR #69933)   Diogo Teles Sant'Anna via llvm-commits
• [llvm] Add Scorecard Action (PR #69933)   Diogo Teles Sant'Anna via llvm-commits
• [llvm] Changed default value of slp-max-vf to 192 (PR #70479)   Dmitriy Smirnov via llvm-commits
• [compiler-rt] [TSAN] Add __tsan_check_no_mutexes_held helper (PR #69372)   Dmitry Vyukov via llvm-commits
• [compiler-rt] [TSAN] Add __tsan_check_no_mutexes_held helper (PR #69372)   Dmitry Vyukov via llvm-commits
• [compiler-rt] [TSAN] Add __tsan_check_no_mutexes_held helper (PR #69372)   Dmitry Vyukov via llvm-commits
• [compiler-rt] [TSAN] Add __tsan_check_no_mutexes_held helper (PR #69372)   Dmitry Vyukov via llvm-commits
• [compiler-rt] [TSAN] Add __tsan_check_no_mutexes_held helper (PR #69372)   Dmitry Vyukov via llvm-commits
• [compiler-rt] [TSAN] Add __tsan_check_no_mutexes_held helper (PR #69372)   Dmitry Vyukov via llvm-commits
• [compiler-rt] [TSAN] Add __tsan_check_no_mutexes_held helper (PR #69372)   Dmitry Vyukov via llvm-commits
• [compiler-rt] [tsan] Increase size of shadow mappings for C/C++ on linux/x86_64 (PR #70517)   Dmitry Vyukov via llvm-commits
• [llvm] [OpenMP][OMPIRBuilder] Add support to omp target parallel (PR #67000)   Dominik Adamski via llvm-commits
• [llvm] [OpenMP][OMPIRBuilder] Add support to omp target parallel (PR #67000)   Dominik Adamski via llvm-commits
• [llvm] [OpenMP][OMPIRBuilder] Add support to omp target parallel (PR #67000)   Dominik Adamski via llvm-commits
• [llvm] [OpenMP][OMPIRBuilder] Add support to omp target parallel (PR #67000)   Dominik Adamski via llvm-commits
• [llvm] [OpenMP][OMPIRBuilder] Add support to omp target parallel (PR #67000)   Dominik Adamski via llvm-commits
• [llvm] [OpenMP][OMPIRBuilder] Add support to omp target parallel (PR #67000)   Dominik Adamski via llvm-commits
• [llvm] [OpenMP][OMPIRBuilder] Add support to omp target parallel (PR #67000)   Dominik Adamski via llvm-commits
• [llvm] [OpenMP][OMPIRBuilder] Add support to omp target parallel (PR #67000)   Dominik Adamski via llvm-commits
• [llvm] [OpenMP][OMPIRBuilder] Add support to omp target parallel (PR #67000)   Dominik Adamski via llvm-commits
• [llvm] [OpenMP][OMPIRBuilder] Add support to omp target parallel (PR #67000)   Dominik Adamski via llvm-commits
• [llvm] [OpenMP][OMPIRBuilder] Add support to omp target parallel (PR #67000)   Dominik Adamski via llvm-commits
• [PATCH] D141060: [opt] Infer DataLayout from triple if not specified   Douglas Yung via Phabricator via llvm-commits
• [PATCH] D141060: [opt] Infer DataLayout from triple if not specified   Douglas Yung via Phabricator via llvm-commits
• [llvm] Bfi precision (PR #66285)   Duncan P. N. Exon Smith via llvm-commits
• [compiler-rt] Bfi precision (PR #66285)   Duncan P. N. Exon Smith via llvm-commits
• [llvm] Bfi precision (PR #66285)   Duncan P. N. Exon Smith via llvm-commits
• [llvm] [DAGCombiner] Fix misuse of getZeroExtendInReg in SimplifySelectCC. (PR #70066)   Eli Friedman via llvm-commits
• [llvm] [ARM] Fix access to dso_preemptable __stack_chk_guard with static relocation model (PR #70014)   Eli Friedman via llvm-commits
• [llvm] [ARM] Fix access to dso_preemptable __stack_chk_guard with static relocation model (PR #70014)   Eli Friedman via llvm-commits
• [llvm] [ARM, ELF] Fix access to dso_preemptable __stack_chk_guard with static relocation model (PR #70014)   Eli Friedman via llvm-commits
• [llvm] [AArch64] Stack probing for function prologues (PR #66524)   Eli Friedman via llvm-commits
• [llvm] [AArch64] Stack probing for function prologues (PR #66524)   Eli Friedman via llvm-commits
• [llvm] [AArch64] Stack probing for function prologues (PR #66524)   Eli Friedman via llvm-commits
• [llvm] [AArch64] Stack probing for function prologues (PR #66524)   Eli Friedman via llvm-commits
• [llvm] [PassBuilder] Add a mechanism for adding passbuilder callbacks for static builds (PR #70171)   Eli Friedman via llvm-commits
• [llvm] [AArch64][SME] Remove immediate argument restriction for svldr and svstr (PR #68565)   Eli Friedman via llvm-commits
• [llvm] [AArch64][SME] Remove immediate argument restriction for svldr and svstr (PR #68565)   Eli Friedman via llvm-commits
• [llvm] [AArch64][SME] Remove immediate argument restriction for svldr and svstr (PR #68565)   Eli Friedman via llvm-commits
• [llvm] [AArch64][SME] Remove immediate argument restriction for svldr and svstr (PR #68565)   Eli Friedman via llvm-commits
• [compiler-rt] [Profile] Refactor profile correlation. (PR #69656)   Ellis Hoag via llvm-commits
• [llvm] [Profile] Refactor profile correlation. (PR #69656)   Ellis Hoag via llvm-commits
• [llvm] [Profile] Refactor profile correlation. (PR #69656)   Ellis Hoag via llvm-commits
• [llvm] [Profile] Refactor profile correlation. (PR #69656)   Ellis Hoag via llvm-commits
• [llvm] [Profile] Refactor profile correlation. (PR #69656)   Ellis Hoag via llvm-commits
• [compiler-rt] [Profile] Refactor profile correlation. (PR #69656)   Ellis Hoag via llvm-commits
• [llvm] [Profile] Refactor profile correlation. (PR #69656)   Ellis Hoag via llvm-commits
• [llvm] [Profile] Refactor profile correlation. (PR #69656)   Ellis Hoag via llvm-commits
• [compiler-rt] [Profile] Refactor profile correlation. (PR #69656)   Ellis Hoag via llvm-commits
• [llvm] [clang]Transform uninstantiated ExceptionSpec in TemplateInstantiator (PR #68878)   Erich Keane via llvm-commits
• [llvm] [clang]Transform uninstantiated ExceptionSpec in TemplateInstantiator (PR #68878)   Erich Keane via llvm-commits
• [llvm] [clang]improve diagnosing redefined defaulted constructor with different exception specs (PR #69688)   Erich Keane via llvm-commits
• [llvm] [OpenACC] Initial commits to support OpenACC (PR #70234)   Erich Keane via llvm-commits
• [llvm] [OpenACC] Initial commits to support OpenACC (PR #70234)   Erich Keane via llvm-commits
• [lld] [OpenACC] Initial commits to support OpenACC (PR #70234)   Erich Keane via llvm-commits
• [llvm] Let M68kMCCodeEmitter set Scratch size. (PR #69898)   Erik Jonsson via llvm-commits
• [llvm] Let M68kMCCodeEmitter set Scratch size. (PR #69898)   Erik Jonsson via llvm-commits
• [llvm] Let M68kMCCodeEmitter set Scratch size. (PR #69898)   Erik Jonsson via llvm-commits
• [llvm] Let M68kMCCodeEmitter set Scratch size. (PR #69898)   Erik Jonsson via llvm-commits
• [llvm] [X86][GlobalISel] Reorganize shift scalar tests (NFC) (PR #68232)   Evgenii Kudriashov via llvm-commits
• [llvm] [X86][GlobalISel] Add legalization of 64-bit G_ICMP for i686 (PR #69478)   Evgenii Kudriashov via llvm-commits
• [llvm] [X86][GlobalISel] Add legalization of 64-bit G_ICMP for i686 (PR #69478)   Evgenii Kudriashov via llvm-commits
• [llvm] [X86][GlobalISel] Add legalization of 64-bit G_ICMP for i686 (PR #69478)   Evgenii Kudriashov via llvm-commits
• [llvm] [GISel] Restrict G_BSWAP to multiples of 16 bits. (PR #70245)   Evgenii Kudriashov via llvm-commits
• [llvm] [GISel] Restrict G_BSWAP to multiples of 16 bits. (PR #70245)   Evgenii Kudriashov via llvm-commits
• [compiler-rt] [HWASan] Prevent same tag for adjacent heap objects (PR #69337)   Evgenii Stepanov via llvm-commits
• [llvm] [JITLink][AArch32] Unittest for error paths of readAddend functionality (PR #69636)   Eymen Ünay via llvm-commits
• [llvm] [JITLink][AArch32] Unittest for error paths of readAddend functionality (PR #69636)   Eymen Ünay via llvm-commits
• [llvm] [JITLink][AArch32] Unittest for error paths of readAddend functionality (PR #69636)   Eymen Ünay via llvm-commits
• [llvm] [JITLink][AArch32] Unittest for error paths of readAddend functionality (PR #69636)   Eymen Ünay via llvm-commits
• [llvm] [JITLink][AArch32] Unittest for error paths of readAddend functionality (PR #69636)   Eymen Ünay via llvm-commits
• [llvm] [JITLink][AArch32] Unittest for error paths of readAddend and applyFixup functionality (PR #69636)   Eymen Ünay via llvm-commits
• [llvm] [JITLink][AArch32] Add test for ELF::R_ARM_THM_MOV{W_ABS_NC,T_ABS} (PR #70346)   Eymen Ünay via llvm-commits
• [llvm] [JITLink][AArch32] Add support for ELF::R_ARM_THM_MOV{W_PREL_NC,T_ABS} (PR #70364)   Eymen Ünay via llvm-commits
• [llvm] [JITLink][AArch32] Add support for ELF::R_ARM_THM_MOV{W_PREL_NC,T_ABS} (PR #70364)   Eymen Ünay via llvm-commits
• [llvm] [JITLink][AArch32] Add support for ELF::R_ARM_THM_MOV{W_PREL_NC,T_ABS} (PR #70364)   Eymen Ünay via llvm-commits
• [llvm] [MLIR] SPIRV Target Attribute (PR #69949)   Fabian Mora via llvm-commits
• [llvm] -fstack-usage: fix filename for functions in an included file (PR #69896)   Fangrui Song via llvm-commits
• [llvm] -fstack-usage: fix filename for functions in an included file (PR #69896)   Fangrui Song via llvm-commits
• [llvm] [ARM] Fix __stack_chk_guard access when non-zero "PIC Level" is used with static relocation model (PR #70014)   Fangrui Song via llvm-commits
• [llvm] [ARM] Fix __stack_chk_guard access when non-zero "PIC Level" is used with static relocation model (PR #70014)   Fangrui Song via llvm-commits
• [llvm] [ARM] Fix __stack_chk_guard access when non-zero "PIC Level" is used with static relocation model (PR #70014)   Fangrui Song via llvm-commits
• [llvm] [ARM] Fix access to dso_preemptable __stack_chk_guard with static relocation model (PR #70014)   Fangrui Song via llvm-commits
• [lld] [ELF] Suppress --no-allow-shlib-undefined diagnostic when a SharedSymbol is overridden by a hidden visibility Defined which is later discarded (PR #70130)   Fangrui Song via llvm-commits
• [llvm] [ARM] Fix access to dso_preemptable __stack_chk_guard with static relocation model (PR #70014)   Fangrui Song via llvm-commits
• [llvm] [ARM] Fix access to dso_preemptable __stack_chk_guard with static relocation model (PR #70014)   Fangrui Song via llvm-commits
• [llvm] [ARM] Fix access to dso_preemptable __stack_chk_guard with static relocation model (PR #70014)   Fangrui Song via llvm-commits
• [llvm] [ARM] Fix access to dso_preemptable __stack_chk_guard with static relocation model (PR #70014)   Fangrui Song via llvm-commits
• [llvm] [CodeLayout] Faster basic block reordering, ext-tsp (PR #68617)   Fangrui Song via llvm-commits
• [llvm] [CodeLayout] Faster basic block reordering, ext-tsp (PR #68617)   Fangrui Song via llvm-commits
• [llvm] [CodeLayout] Faster basic block reordering, ext-tsp (PR #68617)   Fangrui Song via llvm-commits
• [llvm] [CodeLayout] Faster basic block reordering, ext-tsp (PR #68617)   Fangrui Song via llvm-commits
• [llvm] [ARM] Fix access to dso_preemptable __stack_chk_guard with static relocation model (PR #70014)   Fangrui Song via llvm-commits
• [llvm] [ARM] Fix access to dso_preemptable __stack_chk_guard with static relocation model (PR #70014)   Fangrui Song via llvm-commits
• [llvm] [ARM, ELF] Fix access to dso_preemptable __stack_chk_guard with static relocation model (PR #70014)   Fangrui Song via llvm-commits
• [llvm] [ARM, ELF] Fix access to dso_preemptable __stack_chk_guard with static relocation model (PR #70014)   Fangrui Song via llvm-commits
• [llvm] [ARM, ELF] Fix access to dso_preemptable __stack_chk_guard with static relocation model (PR #70014)   Fangrui Song via llvm-commits
• [llvm] [ARM, ELF] Fix access to dso_preemptable __stack_chk_guard with static relocation model (PR #70014)   Fangrui Song via llvm-commits
• [llvm] [ARM, ELF] Fix access to dso_preemptable __stack_chk_guard with static relocation model (PR #70014)   Fangrui Song via llvm-commits
• [llvm] [ARM, ELF] Fix access to dso_preemptable __stack_chk_guard with static relocation model (PR #70014)   Fangrui Song via llvm-commits
• [llvm] [ARM, ELF] Fix access to dso_preemptable __stack_chk_guard with static relocation model (PR #70014)   Fangrui Song via llvm-commits
• [llvm] [ARM, ELF] Fix access to dso_preemptable __stack_chk_guard with static relocation model (PR #70014)   Fangrui Song via llvm-commits
• [llvm] [ARM, ELF] Fix access to dso_preemptable __stack_chk_guard with static relocation model (PR #70014)   Fangrui Song via llvm-commits
• [llvm] [ARM, ELF] Fix access to dso_preemptable __stack_chk_guard with static relocation model (PR #70014)   Fangrui Song via llvm-commits
• [lld] lld allow hidden symbols shared with dso (PR #70163)   Fangrui Song via llvm-commits
• [llvm] [ARM, ELF] Fix access to dso_preemptable __stack_chk_guard with static relocation model (PR #70014)   Fangrui Song via llvm-commits
• [llvm] [ARM, ELF] Fix access to dso_preemptable __stack_chk_guard with static relocation model (PR #70014)   Fangrui Song via llvm-commits
• [lld] [ELF] Suppress --no-allow-shlib-undefined diagnostic when a SharedSymbol is overridden by a hidden visibility Defined which is later discarded (PR #70130)   Fangrui Song via llvm-commits
• [lld] lld allow hidden symbols shared with dso (PR #70163)   Fangrui Song via llvm-commits
• [llvm] [AArch64,ELF] Restrict MOVZ/MOVK to non-PIC large code model (PR #70178)   Fangrui Song via llvm-commits
• [llvm] [AArch64,ELF] Restrict MOVZ/MOVK to non-PIC large code model (PR #70178)   Fangrui Song via llvm-commits
• [llvm] [ARM, ELF] Fix access to dso_preemptable __stack_chk_guard with static relocation model (PR #70014)   Fangrui Song via llvm-commits
• [llvm] [ARM, ELF] Fix access to dso_preemptable __stack_chk_guard with static relocation model (PR #70014)   Fangrui Song via llvm-commits
• [llvm] [X86] Treat all data under large code model as large (PR #70265)   Fangrui Song via llvm-commits
• [llvm] [X86] Treat all data under large code model as large (PR #70265)   Fangrui Song via llvm-commits
• [llvm] [Github] Add lld to docs CI (PR #69821)   Fangrui Song via llvm-commits
• [llvm] [AIX][TOC] Add -mtocdata/-mno-tocdata options on AIX (PR #67999)   Fangrui Song via llvm-commits
• [llvm] [AIX][TOC] Add -mtocdata/-mno-tocdata options on AIX (PR #67999)   Fangrui Song via llvm-commits
• [llvm] [PowerPC] Support local-dynamic TLS relocation on AIX (PR #66316)   Fangrui Song via llvm-commits
• [llvm] [PowerPC] Support local-dynamic TLS relocation on AIX (PR #66316)   Fangrui Song via llvm-commits
• [llvm] [PowerPC] Support local-dynamic TLS relocation on AIX (PR #66316)   Fangrui Song via llvm-commits
• [llvm] [RISCV] Add sched model for XiangShan-NanHu (PR #70232)   Fangrui Song via llvm-commits
• [llvm] [PowerPC] Add an alias for -mregnames so that full register names used in assembly. (PR #70255)   Fangrui Song via llvm-commits
• [llvm] [PowerPC] Add an alias for -mregnames so that full register names used in assembly. (PR #70255)   Fangrui Song via llvm-commits
• [llvm] [Support] Better error msg when cache dir can't be created. (PR #69575)   Fangrui Song via llvm-commits
• [lld] [Support] Better error msg when cache dir can't be created. (PR #69575)   Fangrui Song via llvm-commits
• [llvm] [Support] Better error msg when cache dir can't be created. (PR #69575)   Fangrui Song via llvm-commits
• [llvm] [CodeLayout] Changed option names cds to cdsort (PR #69668)   Fangrui Song via llvm-commits
• [llvm] [X86] Print 'l' section flag for SHF_X86_64_LARGE (PR #70380)   Fangrui Song via llvm-commits
• [lld] Fix build failure of lld/ELF/OutputSections.cpp (PR #70368)   Fangrui Song via llvm-commits
• [lld] [lld/ELF] Place large executable sections at the end (PR #70358)   Fangrui Song via llvm-commits
• [lld] [lld/ELF] Place large executable sections at the end (PR #70358)   Fangrui Song via llvm-commits
• [llvm] [Linker] Do not keep a private member of a non-prevailing comdat group (PR #69143)   Fangrui Song via llvm-commits
• [llvm] [Linker] Do not keep a private member of a non-prevailing comdat group (PR #69143)   Fangrui Song via llvm-commits
• [llvm] [Linker] Do not keep a private member of a non-prevailing comdat group (PR #69143)   Fangrui Song via llvm-commits
• [llvm] [RISCV] Add processor definition for XiangShan-NanHu (PR #70294)   Fangrui Song via llvm-commits
• [llvm] [RISCV] Add processor definition for XiangShan-NanHu (PR #70294)   Fangrui Song via llvm-commits
• [llvm] [RISCV] Add processor definition for XiangShan-NanHu (PR #70294)   Fangrui Song via llvm-commits
• [llvm] [RISCV][GISEL] Add legalizer for G_BSWAP (PR #70226)   Fangrui Song via llvm-commits
• [llvm] [RISCV][GISEL] Add legalizer for G_BSWAP (PR #70226)   Fangrui Song via llvm-commits
• [llvm] [RISCV][GISEL] Add legalizer for G_BSWAP (PR #70226)   Fangrui Song via llvm-commits
• [llvm] 8e247b8 - Replace TypeSize::{getFixed,getScalable} with canonical TypeSize::{Fixed,Scalable}. NFC   Fangrui Song via llvm-commits
• [llvm] ccc5713 - TypeSize: remove redundant getFixed and getScalable   Fangrui Song via llvm-commits
• [llvm] 547a507 - TypeSize: remove unused deprecated methods   Fangrui Song via llvm-commits
• [llvm] [Linker] Do not keep a private member of a non-prevailing comdat group (PR #69143)   Fangrui Song via llvm-commits
• [llvm] 19c0c0b - TypeSize: remove unused deprecated methods   Fangrui Song via llvm-commits
• [lld] [LLD][ELF] Change default flags for NOBITS sections with no inputs (PR #70447)   Fangrui Song via llvm-commits
• [PATCH] D141060: [opt] Infer DataLayout from triple if not specified   Fangrui Song via Phabricator via llvm-commits
• [compiler-rt] Changes to support running tests for Windows arm64 asan (PR #66973)   Farzon Lotfi via llvm-commits
• [compiler-rt] Changes to support running tests for Windows arm64 asan (PR #66973)   Farzon Lotfi via llvm-commits
• [llvm] Changes to support running tests for Windows arm64 asan (PR #66973)   Farzon Lotfi via llvm-commits
• [llvm] [SROA] Fix incorrect offsets for structured binding variables (PR #69007)   Felipe de Azevedo Piovezan via llvm-commits
• [llvm] [NFC] Allow fragment expressions in extractIfOffset (PR #69006)   Felipe de Azevedo Piovezan via llvm-commits
• [llvm] [LLVM[NFC] Refactor to allow debug_names entries to conatain DIE offset (PR #69399)   Felipe de Azevedo Piovezan via llvm-commits
• [llvm] [LLVM[NFC] Refactor to allow debug_names entries to conatain DIE offset (PR #69399)   Felipe de Azevedo Piovezan via llvm-commits
• [llvm] [indvars] Missing variables at Og: (PR #69920)   Felipe de Azevedo Piovezan via llvm-commits
• [llvm] [indvars] Missing variables at Og: (PR #69920)   Felipe de Azevedo Piovezan via llvm-commits
• [llvm] [indvars] Missing variables at Og: (PR #69920)   Felipe de Azevedo Piovezan via llvm-commits
• [llvm] [indvars] Missing variables at Og: (PR #69920)   Felipe de Azevedo Piovezan via llvm-commits
• [llvm] [indvars] Missing variables at Og: (PR #69920)   Felipe de Azevedo Piovezan via llvm-commits
• [llvm] [indvars] Missing variables at Og: (PR #69920)   Felipe de Azevedo Piovezan via llvm-commits
• [llvm] [indvars] Missing variables at Og: (PR #69920)   Felipe de Azevedo Piovezan via llvm-commits
• [llvm] [indvars] Missing variables at Og: (PR #69920)   Felipe de Azevedo Piovezan via llvm-commits
• [llvm] [indvars] Missing variables at Og: (PR #69920)   Felipe de Azevedo Piovezan via llvm-commits
• [PATCH] D146543: [Coroutines] Look for dbg.declare for temp spills   Felipe de Azevedo Piovezan via Phabricator via llvm-commits
• [PATCH] D146543: [Coroutines] Look for dbg.declare for temp spills   Felipe de Azevedo Piovezan via Phabricator via llvm-commits
• [llvm] [PowerPC] Support local-dynamic TLS relocation on AIX (PR #66316)   Felix via llvm-commits
• [llvm] [PowerPC] Support local-dynamic TLS relocation on AIX (PR #66316)   Felix via llvm-commits
• [llvm] [PowerPC] Support local-dynamic TLS relocation on AIX (PR #66316)   Felix via llvm-commits
• [llvm] [PowerPC] Support local-dynamic TLS relocation on AIX (PR #66316)   Felix via llvm-commits
• [llvm] [PowerPC] Support local-dynamic TLS relocation on AIX (PR #66316)   Felix via llvm-commits
• [llvm] [PowerPC] Support local-dynamic TLS relocation on AIX (PR #66316)   Felix via llvm-commits
• [llvm] [PowerPC] Support local-dynamic TLS relocation on AIX (PR #66316)   Felix via llvm-commits
• [llvm] [PowerPC] Support local-dynamic TLS relocation on AIX (PR #66316)   Felix via llvm-commits
• [llvm] [LV] Invalidate SCEV values in the scalar loop after loop vectorization (PR #69886)   Florian Hahn via llvm-commits
• [llvm] [LV] Invalidate SCEV values in the scalar loop after loop vectorization (PR #69886)   Florian Hahn via llvm-commits
• [llvm] [LV] Invalidate SCEV values in the scalar loop after loop vectorization (PR #69886)   Florian Hahn via llvm-commits
• [llvm] [LV] Invalidate SCEV values in the scalar loop after loop vectorization (PR #69886)   Florian Hahn via llvm-commits
• [llvm] [LV] Invalidate SCEV values in the scalar loop after loop vectorization (PR #69886)   Florian Hahn via llvm-commits
• [llvm] [LV] Invalidate SCEV values in the scalar loop after loop vectorization (PR #69886)   Florian Hahn via llvm-commits
• [llvm] [LV] Invalidate SCEV values in the scalar loop after loop vectorization (PR #69886)   Florian Hahn via llvm-commits
• [llvm] [LV] Invalidate SCEV values in the scalar loop after loop vectorization (PR #69886)   Florian Hahn via llvm-commits
• [llvm] [LV] Invalidate SCEV values in the scalar loop after loop vectorization (PR #69886)   Florian Hahn via llvm-commits
• [llvm] [DominanceFrontier] make DominanceFrontierBase::find iterator deterministic (PR #69711)   Florian Hahn via llvm-commits
• [llvm] [LV] Stability fix for outerloop vectorization (PR #68118)   Florian Hahn via llvm-commits
• [llvm] [LV] Stability fix for outerloop vectorization (PR #68118)   Florian Hahn via llvm-commits
• [llvm] [LV] Stability fix for outerloop vectorization (PR #68118)   Florian Hahn via llvm-commits
• [llvm] [LV] Stability fix for outerloop vectorization (PR #68118)   Florian Hahn via llvm-commits
• [llvm] [LV] Stability fix for outerloop vectorization (PR #68118)   Florian Hahn via llvm-commits
• [llvm] [LV] Stability fix for outerloop vectorization (PR #68118)   Florian Hahn via llvm-commits
• [llvm] [LV] Stability fix for outerloop vectorization (PR #68118)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] 159614a - [LV] Use variable instead of value number in vplan-dot-printing.ll test.   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] [DominanceFrontier] make iterating dereferenced DominanceFrontierBase::find deterministic (PR #69711)   Florian Hahn via llvm-commits
• [llvm] [DiagnosticInfo] Output full file path instead of relative path (PR #68027)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Introduce ComputeReductionResult VPInstruction opcode. (PR #70253)   Florian Hahn via llvm-commits
• [llvm] LoopVectorize/test: clean up intrinsic.ll, regen using UTC (NFC) (PR #70202)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] [LV] Pre-committing tests for changing loop interleaving count computation (PR #70272)   Florian Hahn via llvm-commits
• [llvm] [LV] Pre-committing tests for changing loop interleaving count computation (PR #70272)   Florian Hahn via llvm-commits
• [llvm] [LV] Pre-committing tests for changing loop interleaving count computation (PR #70272)   Florian Hahn via llvm-commits
• [llvm] [LV] Pre-committing tests for changing loop interleaving count computation (PR #70272)   Florian Hahn via llvm-commits
• [llvm] [LV] Pre-committing tests for changing loop interleaving count computation (PR #70272)   Florian Hahn via llvm-commits
• [llvm] [LV] Pre-committing tests for changing loop interleaving count computation (PR #70272)   Florian Hahn via llvm-commits
• [llvm] [LV] Pre-committing tests for changing loop interleaving count computation (PR #70272)   Florian Hahn via llvm-commits
• [llvm] LoopVectorize/test: add missing CHECK lines, cleanup intrinsic.ll (PR #70202)   Florian Hahn via llvm-commits
• [llvm] LoopVectorize/test: add missing CHECK lines, cleanup intrinsic.ll (PR #70202)   Florian Hahn via llvm-commits
• [llvm] LoopVectorize/test: add missing CHECK lines, cleanup intrinsic.ll (PR #70202)   Florian Hahn via llvm-commits
• [llvm] LoopVectorize/test: add missing CHECK lines, cleanup intrinsic.ll (PR #70202)   Florian Hahn via llvm-commits
• [llvm] LoopVectorize/test: add missing CHECK lines, cleanup intrinsic.ll (PR #70202)   Florian Hahn via llvm-commits
• [llvm] LoopVectorize/test: add missing CHECK lines, cleanup intrinsic.ll (PR #70202)   Florian Hahn via llvm-commits
• [llvm] LoopVectorize/test: add missing CHECK lines, cleanup intrinsic.ll (PR #70202)   Florian Hahn via llvm-commits
• [llvm] LoopVectorize/test: add missing CHECK lines, cleanup intrinsic.ll (PR #70202)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] cff6652 - [VPlan] Handle VPValues without underlying values in getTypeForVPValue.   Florian Hahn via llvm-commits
• [llvm] Port Swift's merge function pass to llvm: merging functions that differ in constants (PR #68235)   Florian Hahn via llvm-commits
• [llvm] Port Swift's merge function pass to llvm: merging functions that differ in constants (PR #68235)   Florian Hahn via llvm-commits
• [llvm] Port Swift's merge function pass to llvm: merging functions that differ in constants (PR #68235)   Florian Hahn via llvm-commits
• [llvm] Port Swift's merge function pass to llvm: merging functions that differ in constants (PR #68235)   Florian Hahn via llvm-commits
• [llvm] Port Swift's merge function pass to llvm: merging functions that differ in constants (PR #68235)   Florian Hahn via llvm-commits
• [llvm] Port Swift's merge function pass to llvm: merging functions that differ in constants (PR #68235)   Florian Hahn via llvm-commits
• [llvm] Port Swift's merge function pass to llvm: merging functions that differ in constants (PR #68235)   Florian Hahn via llvm-commits
• [llvm] Port Swift's merge function pass to llvm: merging functions that differ in constants (PR #68235)   Florian Hahn via llvm-commits
• [llvm] Port Swift's merge function pass to llvm: merging functions that differ in constants (PR #68235)   Florian Hahn via llvm-commits
• [llvm] Port Swift's merge function pass to llvm: merging functions that differ in constants (PR #68235)   Florian Hahn via llvm-commits
• [llvm] Port Swift's merge function pass to llvm: merging functions that differ in constants (PR #68235)   Florian Hahn via llvm-commits
• [llvm] Port Swift's merge function pass to llvm: merging functions that differ in constants (PR #68235)   Florian Hahn via llvm-commits
• [llvm] Port Swift's merge function pass to llvm: merging functions that differ in constants (PR #68235)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] cdc5e00 - [LV] Add test case to scalarize ptrtoint instructions.   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Florian Hahn via llvm-commits
• [llvm] [LoopDist] Update the pragma info of loop distribute, NFC (PR #69825)   Florian Hahn via llvm-commits
• [PATCH] D99750: [LV, VP]VP intrinsics support for the Loop Vectorizer   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D159202: [VPlan] Simplify redundant trunc (zext A) pairs to A.   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D99750: [LV, VP]VP intrinsics support for the Loop Vectorizer   Florian Hahn via Phabricator via llvm-commits
• [llvm] [TableGen][NFC] Add record kind to `Record` class (PR #69919)   Francesco Petrogalli via llvm-commits
• [llvm] [AMDGPU] Shrink to SOPK with 32-bit signed literals (PR #70263)   Georg Lehmann via llvm-commits
• [llvm] [mlir][tosa] Check for unranked tensors during validation (PR #68509)   Georgios Pinitas via llvm-commits
• [llvm] [mlir][tosa] Check for unranked tensors during validation (PR #68509)   Georgios Pinitas via llvm-commits
• [PATCH] D158124: [dsymutil] Add support for mergeable libraries   Gheorghe-Teodor Bercea via Phabricator via llvm-commits
• [PATCH] D158124: [dsymutil] Add support for mergeable libraries   Gheorghe-Teodor Bercea via Phabricator via llvm-commits
• [llvm] [gn build] Guard the BLAKE3 assembly sources with platform (PR #70110)   Gowtham Tammana via llvm-commits
• [llvm] [gn build] Guard the BLAKE3 assembly sources with platform (PR #70110)   Gowtham Tammana via llvm-commits
• [llvm] [AArch64] Sink vscale calls into loops for better isel (PR #70304)   Graham Hunter via llvm-commits
• [llvm] [AArch64] Sink vscale calls into loops for better isel (PR #70304)   Graham Hunter via llvm-commits
• [llvm] [LV] Increase max VF if vectorized function variants exist (PR #66639)   Graham Hunter via llvm-commits
• [llvm] [LV] Increase max VF if vectorized function variants exist (PR #66639)   Graham Hunter via llvm-commits
• [llvm] [libc][bazel] Prevent LIBC_NAMESPACE leakeage (PR #70455)   Guillaume Chatelet via llvm-commits
• [llvm] 9a091de - [X86, Peephole] Enable FoldImmediate for X86   Guozhi Wei via llvm-commits
• [PATCH] D151848: [X86, Peephole] Enable FoldImmediate for X86   Guozhi Wei via Phabricator via llvm-commits
• [PATCH] D151848: [X86, Peephole] Enable FoldImmediate for X86   Guozhi Wei via Phabricator via llvm-commits
• [llvm] [MLIR] Add SyclRuntimeWrapper (PR #69648)   Guray Ozen via llvm-commits
• [llvm] [MLIR] Add SyclRuntimeWrapper (PR #69648)   Guray Ozen via llvm-commits
• [llvm] [MLIR] Add SyclRuntimeWrapper (PR #69648)   Guray Ozen via llvm-commits
• [llvm] [MLIR] Add SyclRuntimeWrapper (PR #69648)   Guray Ozen via llvm-commits
• [llvm] [MLIR] Add SyclRuntimeWrapper (PR #69648)   Guray Ozen via llvm-commits
• [llvm] e2fc68c - Typos: 'maxium', 'minium'   Hans Wennborg via llvm-commits
• [llvm] [Analysis] Add Scalable field in MemoryLocation.h (PR #69716)   Harvin Iriawan via llvm-commits
• [llvm] [Analysis] Add Scalable field in MemoryLocation.h (PR #69716)   Harvin Iriawan via llvm-commits
• [llvm] [Analysis] Add Scalable field in MemoryLocation.h (PR #69716)   Harvin Iriawan via llvm-commits
• [llvm] [Analysis] Add Scalable field in MemoryLocation.h (PR #69716)   Harvin Iriawan via llvm-commits
• [llvm] [Analysis] Add Scalable field in MemoryLocation.h (PR #69716)   Harvin Iriawan via llvm-commits
• [llvm] [Analysis] Add Scalable field in MemoryLocation.h (PR #69716)   Harvin Iriawan via llvm-commits
• [llvm] [Analysis] Add Scalable field in MemoryLocation.h (PR #69716)   Harvin Iriawan via llvm-commits
• [llvm] [Analysis] Add Scalable field in MemoryLocation.h (PR #69716)   Harvin Iriawan via llvm-commits
• [llvm] [Analysis] Add Scalable field in MemoryLocation.h (PR #69716)   Harvin Iriawan via llvm-commits
• [llvm] [Analysis] Add Scalable field in MemoryLocation.h (PR #69716)   Harvin Iriawan via llvm-commits
• [llvm] [Analysis] Add Scalable field in MemoryLocation.h (PR #69716)   Harvin Iriawan via llvm-commits
• [llvm] [Analysis] Add Scalable field in MemoryLocation.h (PR #69716)   Harvin Iriawan via llvm-commits
• [llvm] [Analysis] Add Scalable field in MemoryLocation.h (PR #69716)   Harvin Iriawan via llvm-commits
• [llvm] [BasicAA] Add Vscale GEP decomposition on variable index (PR #69152)   Harvin Iriawan via llvm-commits
• [llvm] [BasicAA] Add Vscale GEP decomposition on variable index (PR #69152)   Harvin Iriawan via llvm-commits
• [llvm] [Analysis] Add Scalable field in MemoryLocation.h (PR #69716)   Harvin Iriawan via llvm-commits
• [llvm] [Analysis] Add Scalable field in MemoryLocation.h (PR #69716)   Harvin Iriawan via llvm-commits
• [llvm] [Analysis] Add Scalable field in MemoryLocation.h (PR #69716)   Harvin Iriawan via llvm-commits
• [llvm] [Analysis] Add Scalable field in MemoryLocation.h (PR #69716)   Harvin Iriawan via llvm-commits
• [llvm] [Analysis] Add Scalable field in MemoryLocation.h (PR #69716)   Harvin Iriawan via llvm-commits
• [llvm] [Analysis] Add Scalable field in MemoryLocation.h (PR #69716)   Harvin Iriawan via llvm-commits
• [llvm] [Analysis] Add Scalable field in MemoryLocation.h (PR #69716)   Harvin Iriawan via llvm-commits
• [llvm] [Analysis] Add Scalable field in MemoryLocation.h (PR #69716)   Harvin Iriawan via llvm-commits
• [llvm] [BasicAA] Add Vscale GEP decomposition on variable index (PR #69152)   Harvin Iriawan via llvm-commits
• [llvm] [BasicAA] Add Vscale GEP decomposition on variable index (PR #69152)   Harvin Iriawan via llvm-commits
• [llvm] [BasicAA] Add Vscale GEP decomposition on variable index (PR #69152)   Harvin Iriawan via llvm-commits
• [llvm] [BasicAA] Add Vscale GEP decomposition on variable index (PR #69152)   Harvin Iriawan via llvm-commits
• [llvm] [BasicAA] Add Vscale GEP decomposition on variable index (PR #69152)   Harvin Iriawan via llvm-commits
• [llvm] [BasicAA] Add Vscale GEP decomposition on variable index (PR #69152)   Harvin Iriawan via llvm-commits
• [llvm] [SelectionDAG] Update for scalable MemoryType in MMO (PR #70452)   Harvin Iriawan via llvm-commits
• [llvm] [BasicAA] Add Vscale GEP decomposition on variable index (PR #69152)   Harvin Iriawan via llvm-commits
• [llvm] [BasicAA] Add Vscale GEP decomposition on variable index (PR #69152)   Harvin Iriawan via llvm-commits
• [llvm] [UTC] Recognise CHECK lines with globals matched literally (PR #70050)   Henrik G. Olsson via llvm-commits
• [llvm] [UTC] Recognise CHECK lines with globals matched literally (PR #70050)   Henrik G. Olsson via llvm-commits
• [llvm] [UTC] Recognise CHECK lines with globals matched literally (PR #70050)   Henrik G. Olsson via llvm-commits
• [llvm] a8913f8 - [X86] Regenerate pr38539.ll   Hongtao Yu via llvm-commits
• [llvm] [AArch64] Allow SVE code generation for fixed-width vectors (PR #67122)   Igor Kirillov via llvm-commits
• [llvm] [AArch64] Allow SVE code generation for fixed-width vectors (PR #67122)   Igor Kirillov via llvm-commits
• [llvm] [CodeGen] Improve ExpandMemCmp for more efficient non-register aligned sizes handling (PR #69942)   Igor Kirillov via llvm-commits
• [llvm] [ExpandMemCmp] Optimize ExpandMemCmp to reduce instruction count on x86 (PR #69609)   Igor Kirillov via llvm-commits
• [llvm] [ExpandMemCmp] Optimize ExpandMemCmp to reduce instruction count on x86 (PR #69609)   Igor Kirillov via llvm-commits
• [llvm] [LoopVectorize] Enhance Vectorization decisions for predicate tail-folded loops with low trip counts (PR #69588)   Igor Kirillov via llvm-commits
• [llvm] [LoopVectorize] Enhance Vectorization decisions for predicate tail-folded loops with low trip counts (PR #69588)   Igor Kirillov via llvm-commits
• [llvm] [CodeGen] Improve ExpandMemCmp for more efficient non-register aligned sizes handling (PR #69942)   Igor Kirillov via llvm-commits
• [llvm] [CodeGen] Improve ExpandMemCmp for more efficient non-register aligned sizes handling (PR #69942)   Igor Kirillov via llvm-commits
• [llvm] [CodeGen] Improve ExpandMemCmp for more efficient non-register aligned sizes handling (PR #69942)   Igor Kirillov via llvm-commits
• [llvm] deb429e - Revert "[CodeGen] Improve ExpandMemCmp for more efficient non-register aligned sizes handling (#69942)"   Igor Kirillov via llvm-commits
• [llvm] [CodeGen] Improve ExpandMemCmp for more efficient non-register aligned sizes handling (PR #69942)   Igor Kirillov via llvm-commits
• [llvm] [CodeGen] Improve ExpandMemCmp for more efficient non-register aligned sizes handling (PR #70469)   Igor Kirillov via llvm-commits
• [llvm] [ThinLTOBitcodeWriter] Do not crash on a typed declaration (PR #69564)   Igor Kudrin via llvm-commits
• [llvm] [ThinLTOBitcodeWriter] Do not crash on a typed declaration (PR #69564)   Igor Kudrin via llvm-commits
• [llvm] [Linker] Do not keep a private member of a non-prevailing comdat group (PR #69143)   Igor Kudrin via llvm-commits
• [llvm] [Linker] Do not keep a private member of a non-prevailing comdat group (PR #69143)   Igor Kudrin via llvm-commits
• [llvm] [Linker] Do not keep a private member of a non-prevailing comdat group (PR #69143)   Igor Kudrin via llvm-commits
• [llvm] [Linker] Do not keep a private member of a non-prevailing comdat group (PR #69143)   Igor Kudrin via llvm-commits
• [llvm] [Linker] Do not keep a private member of a non-prevailing comdat group (PR #69143)   Igor Kudrin via llvm-commits
• [llvm] [Linker] Do not keep a private member of a non-prevailing comdat group (PR #69143)   Igor Kudrin via llvm-commits
• [llvm] [Linker] Do not keep a private member of a non-prevailing comdat group (PR #69143)   Igor Kudrin via llvm-commits
• [llvm] [Linker] Do not keep a private member of a non-prevailing comdat group (PR #69143)   Igor Kudrin via llvm-commits
• [llvm] [Linker] Do not keep a private member of a non-prevailing comdat group (PR #69143)   Igor Kudrin via llvm-commits
• [llvm] [Linker] Do not keep a private member of a non-prevailing comdat group (PR #69143)   Igor Kudrin via llvm-commits
• [llvm] [Linker] Do not keep a private member of a non-prevailing comdat group (PR #69143)   Igor Kudrin via llvm-commits
• [llvm] [SystemZ] Enable AtomicExpand pass (PR #70398)   Ilya Leoshkevich via llvm-commits
• [llvm] [MLIR] Add SyclRuntimeWrapper (PR #69648)   Ivan Butygin via llvm-commits
• [llvm] [MLIR] Add SyclRuntimeWrapper (PR #69648)   Ivan Butygin via llvm-commits
• [llvm] [MLIR] Add SyclRuntimeWrapper (PR #69648)   Ivan Butygin via llvm-commits
• [llvm] [MLIR] Add SyclRuntimeWrapper (PR #69648)   Ivan Butygin via llvm-commits
• [llvm] [MLIR] Add SyclRuntimeWrapper (PR #69648)   Ivan Butygin via llvm-commits
• [llvm] [MLIR] Add SyclRuntimeWrapper (PR #69648)   Ivan Butygin via llvm-commits
• [llvm] [AMDGPU][NFCI] Decouple actual register encodings from HWEncoding values. (PR #69452)   Ivan Kosarev via llvm-commits
• [llvm] [AMDGPU] Give some of the VI V_PK_* instructions a subtarget predicate. (PR #70334)   Ivan Kosarev via llvm-commits
• [llvm] [AMDGPU] Give some of the VI V_PK_* instructions a subtarget predicate. (PR #70334)   Ivan Kosarev via llvm-commits
• [llvm] [AMDGPU] Give some of the VI V_PK_* instructions a subtarget predicate. (PR #70334)   Ivan Kosarev via llvm-commits
• [llvm] [AMDGPU] Fix subtarget predicates for some V_MFMA instructions. (PR #70450)   Ivan Kosarev via llvm-commits
• [compiler-rt] [builtins] Start to refactor int to fp conversion functions to use a common implementation (PR #66903)   Ivan Tadeu Ferreira Antunes Filho via llvm-commits
• [llvm] [mlir] Add config for PDL (PR #69927)   Jacques Pienaar via llvm-commits
• [compiler-rt] [mlir] Add config for PDL (PR #69927)   Jacques Pienaar via llvm-commits
• [llvm] [mlir] Add config for PDL (PR #69927)   Jacques Pienaar via llvm-commits
• [llvm] [TOSA] Add TosaToMLProgram conversion (PR #69787)   Jacques Pienaar via llvm-commits
• [llvm] [TOSA] Add TosaToMLProgram conversion (PR #69787)   Jacques Pienaar via llvm-commits
• [llvm] [TOSA] Add TosaToMLProgram conversion (PR #69787)   Jacques Pienaar via llvm-commits
• [llvm] [TOSA] Add TosaToMLProgram conversion (PR #69787)   Jacques Pienaar via llvm-commits
• [llvm] [TOSA] Add TosaToMLProgram conversion (PR #69787)   Jacques Pienaar via llvm-commits
• [compiler-rt] [mlir] Add config for PDL (PR #69927)   Jacques Pienaar via llvm-commits
• [llvm] [mlir] Add config for PDL (PR #69927)   Jacques Pienaar via llvm-commits
• [compiler-rt] [mlir] Add config for PDL (PR #69927)   Jacques Pienaar via llvm-commits
• [llvm] [mlir] Add config for PDL (PR #69927)   Jacques Pienaar via llvm-commits
• [PATCH] D140806: Change getProcessTriple to return different archs in universal binary   Jacques Pienaar via Phabricator via llvm-commits
• [PATCH] D149660: [libc++][AIX] Add OS version to target triple   Jake Egan via Phabricator via llvm-commits
• [llvm] [AMDGPU] Defaults for missing dimensions in SYCL required wg size (PR #68872)   Jakub Chlanda via llvm-commits
• [llvm] [AMDGPU] Defaults for missing dimensions in SYCL required wg size (PR #68872)   Jakub Chlanda via llvm-commits
• [llvm] [AMDGPU] Defaults for missing dimensions in SYCL required wg size (PR #68872)   Jakub Chlanda via llvm-commits
• [llvm] [AMDGPU] Defaults for missing dimensions in SYCL required wg size (PR #68872)   Jakub Chlanda via llvm-commits
• [llvm] [AMDGPU] Defaults for missing dimensions in SYCL required wg size (PR #68872)   Jakub Chlanda via llvm-commits
• [llvm] [AMDGPU] Defaults for missing dimensions in SYCL required wg size (PR #68872)   Jakub Chlanda via llvm-commits
• [llvm] [AMDGPU] Defaults for missing dimensions in SYCL required wg size (PR #68872)   Jakub Chlanda via llvm-commits
• [llvm] [DominanceFrontier] make iterating dereferenced DominanceFrontierBase::find deterministic (PR #69711)   Jakub Kuderski via llvm-commits
• [llvm] [DominanceFrontier] make iterating dereferenced DominanceFrontierBase::find deterministic (PR #69711)   Jakub Kuderski via llvm-commits
• [llvm] [DominanceFrontier] make iterating dereferenced DominanceFrontierBase::find deterministic (PR #69711)   Jakub Kuderski via llvm-commits
• [llvm] [ADT] Support appending multiple values (PR #69891)   Jakub Kuderski via llvm-commits
• [llvm] [DominanceFrontier] make iterating dereferenced DominanceFrontierBase::find deterministic (PR #69711)   Jakub Kuderski via llvm-commits
• [llvm] [DominanceFrontier] make iterating dereferenced DominanceFrontierBase::find deterministic (PR #69711)   Jakub Kuderski via llvm-commits
• [llvm] [DominanceFrontier] make iterating dereferenced DominanceFrontierBase::find deterministic (PR #69711)   Jakub Kuderski via llvm-commits
• [llvm] [NFC][DominanceFrontier] Replace std::map with DenseMap for DomSetMapType (PR #70403)   Jakub Kuderski via llvm-commits
• [compiler-rt] [libc++] Implement ranges::iota (PR #68494)   James E T Smith via llvm-commits
• [llvm] [libc++] Implement ranges::iota (PR #68494)   James E T Smith via llvm-commits
• [compiler-rt] [libc++] Implement ranges::iota (PR #68494)   James E T Smith via llvm-commits
• [llvm] [libc++] Implement ranges::iota (PR #68494)   James E T Smith via llvm-commits
• [compiler-rt] [libc++] Implement ranges::iota (PR #68494)   James E T Smith via llvm-commits
• [llvm] [libc++] Implement ranges::iota (PR #68494)   James E T Smith via llvm-commits
• [llvm] [libc++] Implement ranges::iota (PR #68494)   James E T Smith via llvm-commits
• [compiler-rt] [libc++] Implement ranges::iota (PR #68494)   James E T Smith via llvm-commits
• [llvm] [libc++] Implement ranges::iota (PR #68494)   James E T Smith via llvm-commits
• [compiler-rt] [libc++] Implement ranges::iota (PR #68494)   James E T Smith via llvm-commits
• [llvm] [libc++] Implement ranges::iota (PR #68494)   James E T Smith via llvm-commits
• [compiler-rt] [libc++] Implement ranges::iota (PR #68494)   James E T Smith via llvm-commits
• [compiler-rt] [libc++] Implement ranges::iota (PR #68494)   James E T Smith via llvm-commits
• [compiler-rt] [libc++] Implement ranges::iota (PR #68494)   James E T Smith via llvm-commits
• [llvm] [libc++] Implement ranges::iota (PR #68494)   James E T Smith via llvm-commits
• [llvm] [libc++] Implement ranges::iota (PR #68494)   James E T Smith via llvm-commits
• [compiler-rt] [libc++] Implement ranges::iota (PR #68494)   James E T Smith via llvm-commits
• [llvm] [libc++] Implement ranges::iota (PR #68494)   James E T Smith via llvm-commits
• [compiler-rt] [libc++] Implement ranges::iota (PR #68494)   James E T Smith via llvm-commits
• [compiler-rt] [libc++] Implement ranges::iota (PR #68494)   James E T Smith via llvm-commits
• [llvm] [libc++] Implement ranges::iota (PR #68494)   James E T Smith via llvm-commits
• [compiler-rt] [libc++] Implement ranges::iota (PR #68494)   James E T Smith via llvm-commits
• [llvm] [libc++] Implement ranges::iota (PR #68494)   James E T Smith via llvm-commits
• [llvm] [libc++] Implement ranges::iota (PR #68494)   James E T Smith via llvm-commits
• [llvm] [llvm-symbolizer] nfc, use map instead of vector (PR #69552)   James Henderson via llvm-commits
• [llvm] [llvm-symbolizer] nfc, use map instead of vector (PR #69552)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy] Add --gap-fill and --pad-to options (PR #65815)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy] Add --gap-fill and --pad-to options (PR #65815)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy] Add --gap-fill and --pad-to options (PR #65815)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy] Add --gap-fill and --pad-to options (PR #65815)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy] Add --gap-fill and --pad-to options (PR #65815)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy] Add --gap-fill and --pad-to options (PR #65815)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy] Add --gap-fill and --pad-to options (PR #65815)   James Henderson via llvm-commits
• [llvm] [llvm-symbolizer] nfc, use map instead of vector (PR #69552)   James Henderson via llvm-commits
• [llvm] [XCOFF] make related SD symbols as isFunction (PR #69553)   James Henderson via llvm-commits
• [llvm] [XCOFF] make related SD symbols as isFunction (PR #69553)   James Henderson via llvm-commits
• [llvm] [test] Align behavior of interrupts.test on different platforms (PR #68556)   James Henderson via llvm-commits
• [llvm] [test] Align behavior of interrupts.test on different platforms (PR #68556)   James Henderson via llvm-commits
• [llvm] [XCOFF] make related SD symbols as isFunction (PR #69553)   James Henderson via llvm-commits
• [llvm] [XCOFF] make related SD symbols as isFunction (PR #69553)   James Henderson via llvm-commits
• [llvm] [XCOFF] make related SD symbols as isFunction (PR #69553)   James Henderson via llvm-commits
• [llvm] [XCOFF] make related SD symbols as isFunction (PR #69553)   James Henderson via llvm-commits
• [PATCH] D151187: [doc] Add casting style preference to coding standards   James Henderson via Phabricator via llvm-commits
• [PATCH] D151187: [doc] Add casting style preference to coding standards   James Henderson via Phabricator via llvm-commits
• [lld] [libc++] Fix the behavior of throwing `operator new` under -fno-exceptions (PR #69498)   James Y Knight via llvm-commits
• [llvm] clarify NaN propagation in fptrunc (PR #68554)   James Y Knight via llvm-commits
• [llvm] clarify NaN propagation in fptrunc (PR #68554)   James Y Knight via llvm-commits
• [llvm] clarify NaN propagation in fptrunc (PR #68554)   James Y Knight via llvm-commits
• [llvm] [libc++] Ensure that `std::expected` has no tail padding (PR #69673)   Jan Kokemüller via llvm-commits
• [llvm] [libc++] Ensure that `std::expected` has no tail padding (PR #69673)   Jan Kokemüller via llvm-commits
• [PATCH] D158124: [dsymutil] Add support for mergeable libraries   Jan-Patrick Lehr via Phabricator via llvm-commits
• [llvm] [IR] Use `const Type*` in DataLayout (PR #70009)   Jannik Silvanus via llvm-commits
• [llvm] [IR] Use `const Type*` in DataLayout (PR #70009)   Jannik Silvanus via llvm-commits
• [llvm] [IR] Use `const Type*` in DataLayout (PR #70009)   Jannik Silvanus via llvm-commits
• [llvm] [IR] Use `const Type*` in DataLayout (PR #70009)   Jannik Silvanus via llvm-commits
• [PATCH] D150083: [clang-format] ObjCPropertyAttributeOrder to sort ObjC property attributes   Jared Grubb via Phabricator via llvm-commits
• [PATCH] D150083: [clang-format] ObjCPropertyAttributeOrder to sort ObjC property attributes   Jared Grubb via Phabricator via llvm-commits
• [llvm] [AMDGPU] - Generate s_bitreplicate_b64_b32 (PR #69209)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Remove unnecessary conditionality on atomic CSUB pseudo-ops (PR #69914)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] - Generate s_bitreplicate_b64_b32 (PR #69209)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] - Generate s_bitreplicate_b64_b32 (PR #69209)   Jay Foad via llvm-commits
• [llvm] [LiveDebugVariables] Add basic verification (PR #68703)   Jay Foad via llvm-commits
• [llvm] [LiveDebugVariables] Add basic verification (PR #68703)   Jay Foad via llvm-commits
• [llvm] [LiveDebugVariables] Add basic verification (PR #68703)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] - Generate s_bitreplicate_b64_b32 (PR #69209)   Jay Foad via llvm-commits
• [llvm] [IR] Require that ptrmask mask matches pointer index size (PR #69343)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fix subreg check in the SIFixSGPRCopies (PR #70007)   Jay Foad via llvm-commits
• [llvm] 1e3a344 - [CodeGen] Update a comment from NoSSA to IsSSA   Jay Foad via llvm-commits
• [llvm] [IR] Require index width to be ule pointer width (PR #70015)   Jay Foad via llvm-commits
• [llvm] [LowerSwitch] Implement verifyAnalysis (PR #68294)   Jay Foad via llvm-commits
• [llvm] [LowerSwitch] Implement verifyAnalysis (PR #68294)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Set SchedRW = Write64Bit on V_MOV_B64 (PR #70135)   Jay Foad via llvm-commits
• [llvm] c82ebfb - Revert "[AMDGPU] Accept arbitrary sized sources in CalculateByteProvider"   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Use `S_BFE_U64` for uniform i1 ext (PR #69703)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Use `S_BFE_U64` for uniform i1 ext (PR #69703)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] New ttracedata intrinsics (PR #70235)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Shrink to SOPK with 32-bit signed literals (PR #70263)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Shrink to SOPK with 32-bit signed literals (PR #70263)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Shrink to SOPK with 32-bit signed literals (PR #70263)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fold uniform readfirstlane + cndmask (PR #70188)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Use `S_CSELECT` for uniform i1 ext (PR #69703)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Use `S_CSELECT` for uniform i1 ext (PR #69703)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Use `S_CSELECT` for uniform i1 ext (PR #69703)   Jay Foad via llvm-commits
• [llvm] [IR] Require index width to be ule pointer width (PR #70015)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Add writelane and readlane pseudos for SGPR spilling (PR #69923)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Prevent folding of the negative i32 literals as i64 (PR #70274)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Prevent folding of the negative i32 literals as i64 (PR #70274)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] New ttracedata intrinsics (PR #70235)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fold uniform readfirstlane + cndmask (PR #70188)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Use `S_CSELECT` for uniform i1 ext (PR #69703)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Cleanup hasUnwantedEffectsWhenEXECEmpty function (PR #70206)   Jay Foad via llvm-commits
• [llvm] e9c4dc1 - Revert "[AMDGPU] Use `S_CSELECT` for uniform i1 ext (#69703)"   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Assert that we can find subregs in copyPhysReg. NFC. (PR #70332)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Assert that we can find subregs in copyPhysReg. NFC. (PR #70332)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Assert that we can find subregs in copyPhysReg. NFC. (PR #70332)   Jay Foad via llvm-commits
• [llvm] 3c58e53 - [AMDGPU] Use const reference in SIInstrInfo::buildExtractSubReg. NFC.   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Implement moveToVALU for S_CSELECT_B64 (PR #70352)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Implement moveToVALU for S_CSELECT_B64 (PR #70352)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Implement moveToVALU for S_CSELECT_B64 (PR #70352)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Set Size to 4 for V_MOV_B64_PSEUDO and S_MOV_B64_IMM_PSEUDO (PR #70376)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] - Add s_bitreplicate intrinsic (PR #69209)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] - Add s_bitreplicate intrinsic (PR #69209)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] - Add s_bitreplicate intrinsic (PR #69209)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] - Add s_bitreplicate intrinsic (PR #69209)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] - Add s_bitreplicate intrinsic (PR #69209)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] GCNRegPressure printing pass for testing. (PR #70031)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Shrink to SOPK with 32-bit signed literals (PR #70263)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Prevent folding of the negative i32 literals as i64 (PR #70274)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Prevent folding of the negative i32 literals as i64 (PR #70274)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Prevent folding of the negative i32 literals as i64 (PR #70274)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Select 64-bit moves (PR #70395)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Select 64-bit moves (PR #70395)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Select 64-bit moves (PR #70395)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Select 64-bit moves (PR #70395)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fix legalization of frem(-0.0, y) (PR #70448)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fix legalization of frem(-0.0, y) (PR #70448)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fix legalization of frem(-0.0, y) (PR #70448)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][wmma] - Add tied wmma intrinsic (PR #69903)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][wmma] - Add tied wmma intrinsic (PR #69903)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][wmma] - Add tied wmma intrinsic (PR #69903)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fix legalization of frem(-0.0, y) (PR #70448)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] GCNRegPressure printing pass for testing. (PR #70031)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] GCNRegPressure printing pass for testing. (PR #70031)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] GCNRegPressure printing pass for testing. (PR #70031)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] GCNRegPressure printing pass for testing. (PR #70031)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] GCNRegPressure printing pass for testing. (PR #70031)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] CodeGen for 64-bit buffer atomic cmpswap intrinsics (PR #70475)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] make w32i16/w32f16 legal (PR #70484)   Jay Foad via llvm-commits
• [PATCH] D159036: [AMDGPU] Accept arbitrary sized sources in CalculateByteProvider   Jay Foad via Phabricator via llvm-commits
• [PATCH] D159036: [AMDGPU] Accept arbitrary sized sources in CalculateByteProvider   Jay Foad via Phabricator via llvm-commits
• [PATCH] D159036: [AMDGPU] Accept arbitrary sized sources in CalculateByteProvider   Jay Foad via Phabricator via llvm-commits
• [PATCH] D159036: [AMDGPU] Accept arbitrary sized sources in CalculateByteProvider   Jay Foad via Phabricator via llvm-commits
• [llvm] ef33659 - [AMDGPU] Accept arbitrary sized sources in CalculateByteProvider   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Add documentation for scheduler intrinsics (PR #69854)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Add documentation for scheduler intrinsics (PR #69854)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Add documentation for scheduler intrinsics (PR #69854)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Add documentation for scheduler intrinsics (PR #69854)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Add documentation for scheduler intrinsics (PR #69854)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Add documentation for scheduler intrinsics (PR #69854)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Make getDWordFromOffset robust against exotic types (PR #70153)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Make getDWordFromOffset robust against exotic types (PR #70153)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Make getDWordFromOffset robust against exotic types (PR #70153)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Make getDWordFromOffset robust against exotic types (PR #70153)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Accept arbitrary sized sources in CalculateByteProvider (PR #70240)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Fix gcc -Wparentheses warning. NFC (PR #70239)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU]: Accept constant zero bytes in v_perm OrCombine (PR #66533)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Rework dot4 signedness checks (PR #68757)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Rework dot4 signedness checks (PR #68757)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Rework dot4 signedness checks (PR #68757)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Rework dot4 signedness checks (PR #68757)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Rework dot4 signedness checks (PR #68757)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Rework dot4 signedness checks (PR #68757)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU]: Accept constant zero bytes in v_perm OrCombine (PR #66533)   Jeffrey Byrnes via llvm-commits
• [llvm] [ValueTracking] NFC: Allow tracking values through AddrSpaceCasts (PR #70483)   Jeffrey Byrnes via llvm-commits
• [llvm] [ValueTracking] NFC: Allow tracking values through AddrSpaceCasts (PR #70483)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Rework dot4 signedness checks (PR #68757)   Jeffrey Byrnes via llvm-commits
• [PATCH] D159036: [AMDGPU] Accept arbitrary sized sources in CalculateByteProvider   Jeffrey Byrnes via Phabricator via llvm-commits
• [PATCH] D159036: [AMDGPU] Accept arbitrary sized sources in CalculateByteProvider   Jeffrey Byrnes via Phabricator via llvm-commits
• [llvm] add bazel build rule for IndexToSPIRV (PR #69743)   Jeremy Kun via llvm-commits
• [llvm] [SROA] Fix incorrect offsets for structured binding variables (PR #69007)   Jeremy Morse via llvm-commits
• [llvm] [NFC] Allow fragment expressions in extractIfOffset (PR #69006)   Jeremy Morse via llvm-commits
• [llvm] [NFC] Allow fragment expressions in extractIfOffset (PR #69006)   Jeremy Morse via llvm-commits
• [PATCH] D153990: [DebugInfo][RemoveDIs] Add prototype storage classes for non-instruction variable debug-info   Jeremy Morse via Phabricator via llvm-commits
• [PATCH] D153990: [DebugInfo][RemoveDIs] Add prototype storage classes for non-instruction variable debug-info   Jeremy Morse via Phabricator via llvm-commits
• [PATCH] D154080: [DebugInfo][RemoveDIs] Add conversion utilities between dbg.value form and DPValue new-debug-info form   Jeremy Morse via Phabricator via llvm-commits
• [PATCH] D154080: [DebugInfo][RemoveDIs] Add conversion utilities between dbg.value form and DPValue new-debug-info form   Jeremy Morse via Phabricator via llvm-commits
• [llvm] [IR] Require that ptrmask mask matches pointer index size (PR #69343)   Jessica Clarke via llvm-commits
• [llvm] [llvm][MC] Fix missing SubArch information when calling lookupTarget (PR #69902)   Jessica Clarke via llvm-commits
• [llvm] [RISCV] Initial ISel support for the experimental zacas extension (PR #67918)   Jessica Clarke via llvm-commits
• [llvm] [RISCV][SDAG] Prefer ShortForwardBranch to lower sdiv by pow2 (PR #67364)   Jessica Clarke via llvm-commits
• [llvm] [llvm][MC] Fix missing SubArch information when calling lookupTarget (PR #69902)   Jessica Clarke via llvm-commits
• [llvm] [RISCV][GlobalISel] Select G_GLOBAL_VALUE (PR #70091)   Jessica Clarke via llvm-commits
• [llvm] [RISCV][GlobalISel] Select G_GLOBAL_VALUE (PR #70091)   Jessica Clarke via llvm-commits
• [llvm] [RISCV][GlobalISel] Select G_GLOBAL_VALUE (PR #70091)   Jessica Clarke via llvm-commits
• [llvm] [AMDGPU][wmma] - Add tied wmma intrinsic (PR #69903)   Jessica Del via llvm-commits
• [llvm] [AMDGPU] - Generate s_bitreplicate_b64_b32 (PR #69209)   Jessica Del via llvm-commits
• [llvm] [AMDGPU][wmma] - Add tied wmma intrinsic (PR #69903)   Jessica Del via llvm-commits
• [llvm] [AMDGPU] - Generate s_bitreplicate_b64_b32 (PR #69209)   Jessica Del via llvm-commits
• [llvm] [AMDGPU] - Generate s_bitreplicate_b64_b32 (PR #69209)   Jessica Del via llvm-commits
• [llvm] [AMDGPU] - Add s_bitreplicate intrinsic (PR #69209)   Jessica Del via llvm-commits
• [llvm] [AMDGPU] - Add s_bitreplicate intrinsic (PR #69209)   Jessica Del via llvm-commits
• [llvm] [AMDGPU] - Add s_bitreplicate intrinsic (PR #69209)   Jessica Del via llvm-commits
• [llvm] [AMDGPU] - Add s_bitreplicate intrinsic (PR #69209)   Jessica Del via llvm-commits
• [llvm] [AMDGPU][wmma] - Add tied wmma intrinsic (PR #69903)   Jessica Del via llvm-commits
• [llvm] [AMDGPU][wmma] - Add tied wmma intrinsic (PR #69903)   Jessica Del via llvm-commits
• [llvm] [AMDGPU] - Add s_bitreplicate intrinsic (PR #69209)   Jessica Del via llvm-commits
• [llvm] [AMDGPU] - Add s_bitreplicate intrinsic (PR #69209)   Jessica Del via llvm-commits
• [llvm] [AMDGPU][wmma] - Add tied wmma intrinsic (PR #69903)   Jessica Del via llvm-commits
• [llvm] [AMDGPU] - Add s_bitreplicate intrinsic (PR #69209)   Jessica Del via llvm-commits
• [llvm] [AMDGPU] - Add s_bitreplicate intrinsic (PR #69209)   Jessica Del via llvm-commits
• [llvm] [AMDGPU/VOP3P][NFC] - Simplify wmma instruction defs (PR #70622)   Jessica Del via llvm-commits
• [llvm] [AMDGPU][wmma] - Add tied wmma intrinsic (PR #69903)   Jessica Del via llvm-commits
• [llvm] [AMDGPU][wmma] - Add tied wmma intrinsic (PR #69903)   Jessica Del via llvm-commits
• [llvm] [RISCV] Support Strict FP arithmetic Op when only have Zvfhmin (PR #68867)   Jianjian Guan via llvm-commits
• [llvm] 49893fb - [AMDGPU] Fix -Wunused-variable in SIISelLowering.cpp (NFC)   Jie Fu via llvm-commits
• [llvm] c249e27 - [RISCV] Add missing break in switch-case in convertToThreeAddress function. NFC.   Jim Lin via llvm-commits
• [llvm] [RFC][RISCV] Support the large code model. (PR #70308)   Jim Lin via llvm-commits
• [llvm] [Github] Fix libc docs build (PR #70363)   Jinsong Ji via llvm-commits
• [llvm] [Github] Fix libc docs build (PR #70363)   Jinsong Ji via llvm-commits
• [llvm] [Github] Fix libc docs build (PR #70363)   Jinsong Ji via llvm-commits
• [llvm] [BOLT][RISCV] Set minimum function alignment to 2 for RVC (PR #69837)   Job Noorman via llvm-commits
• [llvm] [BOLT] Fix incorrect basic block output addresses (PR #70000)   Job Noorman via llvm-commits
• [llvm] [BOLT] Fix incorrect basic block output addresses (PR #70000)   Job Noorman via llvm-commits
• [llvm] [BOLT] Fix incorrect basic block output addresses (PR #70000)   Job Noorman via llvm-commits
• [llvm] [JITLink][RISCV] Implement eh_frame handling (PR #68253)   Job Noorman via llvm-commits
• [llvm] [BOLT] Use direct storage for Label annotations. NFCI. (PR #70147)   Job Noorman via llvm-commits
• [llvm] [BOLT] Use direct storage for Label annotations. NFCI. (PR #70147)   Job Noorman via llvm-commits
• [llvm] [BOLT] Reduce the number of emitted symbols. NFCI. (PR #70175)   Job Noorman via llvm-commits
• [llvm] [BOLT] Use Label annotation instead of EHLabel pseudo. NFCI. (PR #70179)   Job Noorman via llvm-commits
• [llvm] [BOLT] Use direct storage for Label annotations. NFCI. (PR #70147)   Job Noorman via llvm-commits
• [llvm] [AMDGPU][NFCI] Decouple actual register encodings from HWEncoding values. (PR #69452)   Joe Nash via llvm-commits
• [llvm] [AMDGPU] Set Size to 4 for V_MOV_B64_PSEUDO and S_MOV_B64_IMM_PSEUDO (PR #70376)   Joe Nash via llvm-commits
• [llvm] [AMDGPU] Set Size to 4 for V_MOV_B64_PSEUDO and S_MOV_B64_IMM_PSEUDO (PR #70376)   Joe Nash via llvm-commits
• [llvm] [AMDGPU] Set Size to 4 for V_MOV_B64_PSEUDO and S_MOV_B64_IMM_PSEUDO (PR #70376)   Joe Nash via llvm-commits
• [llvm] [OpenMP][OMPIRBuilder] Add support to omp target parallel (PR #67000)   Johannes Doerfert via llvm-commits
• [llvm] [OpenMP][OMPIRBuilder] Add support to omp target parallel (PR #67000)   Johannes Doerfert via llvm-commits
• [llvm] [OpenMP][OMPIRBuilder] Add support to omp target parallel (PR #67000)   Johannes Doerfert via llvm-commits
• [llvm] [OpenMP][OMPIRBuilder] Add support to omp target parallel (PR #67000)   Johannes Doerfert via llvm-commits
• [llvm] [OpenMP][OMPIRBuilder] Add support to omp target parallel (PR #67000)   Johannes Doerfert via llvm-commits
• [llvm] [OpenMP][OMPIRBuilder] Add support to omp target parallel (PR #67000)   Johannes Doerfert via llvm-commits
• [llvm] [OpenMP][OMPIRBuilder] Add support to omp target parallel (PR #67000)   Johannes Doerfert via llvm-commits
• [llvm] [OpenMP][OMPIRBuilder] Add support to omp target parallel (PR #67000)   Johannes Doerfert via llvm-commits
• [llvm] [OpenMPIRBuilder] Remove wrapper function in `createTask`, `createTeams` (PR #67723)   Johannes Doerfert via llvm-commits
• [llvm] [OpenMPIRBuilder] Remove wrapper function in `createTask`, `createTeams` (PR #67723)   Johannes Doerfert via llvm-commits
• [llvm] [OpenMPIRBuilder] Remove wrapper function in `createTask`, `createTeams` (PR #67723)   Johannes Doerfert via llvm-commits
• [compiler-rt] [OpenMPIRBuilder] Remove wrapper function in `createTask`, `createTeams` (PR #67723)   Johannes Doerfert via llvm-commits
• [compiler-rt] [OpenMPIRBuilder] Remove wrapper function in `createTask`, `createTeams` (PR #67723)   Johannes Doerfert via llvm-commits
• [lld] [OpenMPIRBuilder] Remove wrapper function in `createTask`, `createTeams` (PR #67723)   Johannes Doerfert via llvm-commits
• [lld] [OpenMPIRBuilder] Remove wrapper function in `createTask`, `createTeams` (PR #67723)   Johannes Doerfert via llvm-commits
• [lld] [OpenMPIRBuilder] Remove wrapper function in `createTask`, `createTeams` (PR #67723)   Johannes Doerfert via llvm-commits
• [llvm] [PassBuilder] Add a mechanism for adding passbuilder callbacks for static builds (PR #70171)   Johannes Doerfert via llvm-commits
• [llvm] [OpenMP] Pass min/max thread and team count to the OMPIRBuilder (PR #70247)   Johannes Doerfert via llvm-commits
• [llvm] [Attributor] New attribute to identify what byte ranges are alive for an allocation (PR #66148)   Johannes Doerfert via llvm-commits
• [llvm] [Attributor] New attribute to identify what byte ranges are alive for an allocation (PR #66148)   Johannes Doerfert via llvm-commits
• [llvm] [Attributor] New attribute to identify what byte ranges are alive for an allocation (PR #66148)   Johannes Doerfert via llvm-commits
• [llvm] [Attributor] New attribute to identify what byte ranges are alive for an allocation (PR #66148)   Johannes Doerfert via llvm-commits
• [llvm] [Attributor] New attribute to identify what byte ranges are alive for an allocation (PR #66148)   Johannes Doerfert via llvm-commits
• [llvm] [Attributor] New attribute to identify what byte ranges are alive for an allocation (PR #66148)   Johannes Doerfert via llvm-commits
• [llvm] [Attributor] New attribute to identify what byte ranges are alive for an allocation (PR #66148)   Johannes Doerfert via llvm-commits
• [llvm] [Attributor] New attribute to identify what byte ranges are alive for an allocation (PR #66148)   Johannes Doerfert via llvm-commits
• [llvm] [OpenMP][NFC] Add min/max threads/teams count into the KernelEnvironment (PR #70257)   Johannes Doerfert via llvm-commits
• [llvm] [OpenMP][NFC] Add min/max threads/teams count into the KernelEnvironment (PR #70257)   Johannes Doerfert via llvm-commits
• [llvm] [OpenMP] Unify the min/max thread/teams pathways (PR #70273)   Johannes Doerfert via llvm-commits
• [llvm] [OpenMP] Unify the min/max thread/teams pathways (PR #70273)   Johannes Doerfert via llvm-commits
• [llvm] [OpenMP] Pass min/max thread and team count to the OMPIRBuilder (PR #70247)   Johannes Doerfert via llvm-commits
• [llvm] [OpenMP] Pass min/max thread and team count to the OMPIRBuilder (PR #70247)   Johannes Doerfert via llvm-commits
• [llvm] [OpenMP] Pass min/max thread and team count to the OMPIRBuilder (PR #70247)   Johannes Doerfert via llvm-commits
• [llvm] [OpenMP][NFC] Add min/max threads/teams count into the KernelEnvironment (PR #70257)   Johannes Doerfert via llvm-commits
• [llvm] [OpenMP][NFC] Add min/max threads/teams count into the KernelEnvironment (PR #70257)   Johannes Doerfert via llvm-commits
• [llvm] [OpenMP] Associate the KernelEnvironment with the GenericKernelTy (PR #70383)   Johannes Doerfert via llvm-commits
• [llvm] [OpenMP] Associate the KernelEnvironment with the GenericKernelTy (PR #70383)   Johannes Doerfert via llvm-commits
• [llvm] [OpenMP] Unify the min/max thread/teams pathways (PR #70273)   Johannes Doerfert via llvm-commits
• [llvm] [SCEV] Infer loop max trip count from memory accesses (PR #70361)   Johannes Doerfert via llvm-commits
• [llvm] [SCEV] Infer loop max trip count from memory accesses (PR #70361)   Johannes Doerfert via llvm-commits
• [llvm] [SCEV] Infer loop max trip count from memory accesses (PR #70361)   Johannes Doerfert via llvm-commits
• [llvm] [SCEV] Infer loop max trip count from memory accesses (PR #70361)   Johannes Doerfert via llvm-commits
• [llvm] [SCEV] Infer loop max trip count from memory accesses (PR #70361)   Johannes Doerfert via llvm-commits
• [llvm] [SCEV] Infer loop max trip count from memory accesses (PR #70361)   Johannes Doerfert via llvm-commits
• [llvm] [OpenMP] Introduce the KernelLaunchEnvironment as implicit argument (PR #70401)   Johannes Doerfert via llvm-commits
• [llvm] [OpenMP] Unify the min/max thread/teams pathways (PR #70273)   Johannes Doerfert via llvm-commits
• [llvm] [OpenMP] Unify the min/max thread/teams pathways (PR #70273)   Johannes Doerfert via llvm-commits
• [llvm] [OpenMP] Unify the min/max thread/teams pathways (PR #70273)   Johannes Doerfert via llvm-commits
• [llvm] [UTC] Recognise CHECK lines with globals matched literally (PR #70050)   Johannes Doerfert via llvm-commits
• [llvm] [IPO] Remove unused function getAndUpdateAAFor (PR #69544)   Johannes Doerfert via llvm-commits
• [llvm] update_analyze_test_checks: support output from LAA (PR #67584)   Johannes Doerfert via llvm-commits
• [llvm] [OpenMP] Associate the KernelEnvironment with the GenericKernelTy (PR #70383)   Johannes Doerfert via llvm-commits
• [llvm] [OpenMP] Introduce the KernelLaunchEnvironment as implicit argument (PR #70401)   Johannes Doerfert via llvm-commits
• [llvm] 31b9121 - [OpenMP] Unify the min/max thread/teams pathways   Johannes Doerfert via llvm-commits
• [llvm] [OpenMP] Associate the KernelEnvironment with the GenericKernelTy (PR #70383)   Johannes Doerfert via llvm-commits
• [llvm] [OpenMP] Associate the KernelEnvironment with the GenericKernelTy (PR #70383)   Johannes Doerfert via llvm-commits
• [llvm] [OpenMP] Associate the KernelEnvironment with the GenericKernelTy (PR #70383)   Johannes Doerfert via llvm-commits
• [llvm] [OpenMP] Associate the KernelEnvironment with the GenericKernelTy (PR #70383)   Johannes Doerfert via llvm-commits
• [llvm] [OpenMP] Introduce the KernelLaunchEnvironment as implicit argument (PR #70401)   Johannes Doerfert via llvm-commits
• [llvm] [AArch64][GlobalISel] Add support for post-indexed loads/stores. (PR #69532)   Jon Roelofs via llvm-commits
• [llvm] [AArch64][GlobalISel] Add support for pre-indexed loads/stores. (PR #70185)   Jon Roelofs via llvm-commits
• [llvm] [AArch64][GlobalISel] Add support for pre-indexed loads/stores. (PR #70185)   Jon Roelofs via llvm-commits
• [llvm] Update llvm/docs/MyFirstTypoFix.rst for post-Phabricator / Pull-requests world (PR #70310)   Jon Roelofs via llvm-commits
• [llvm] [AArch64][GlobalISel] Add support for extending indexed loads. (PR #70373)   Jon Roelofs via llvm-commits
• [llvm] 122c89b - [dsymutil] Add support for mergeable libraries   Jonas Devlieghere via llvm-commits
• [llvm] Always use pthread_rwlock on Apple platforms (PR #70151)   Jonas Devlieghere via llvm-commits
• [llvm] [LLVM[NFC] Refactor to allow debug_names entries to conatain DIE offset (PR #69399)   Jonas Devlieghere via llvm-commits
• [llvm] Reland [dsymutil] Add support for mergeable libraries (PR #70256)   Jonas Devlieghere via llvm-commits
• [llvm] [CMake] Correctly handle LLVM_ENABLE_RUNTIMES in targets (PR #69869)   Jonas Devlieghere via llvm-commits
• [llvm] [CMake] Correctly handle LLVM_ENABLE_RUNTIMES in targets (PR #69869)   Jonas Devlieghere via llvm-commits
• [llvm] Reland [dsymutil] Add support for mergeable libraries (PR #70256)   Jonas Devlieghere via llvm-commits
• [llvm] [LLVM][DWARF] Add support for monolithic types in .debug_names (PR #70512)   Jonas Devlieghere via llvm-commits
• [PATCH] D158124: [dsymutil] Add support for mergeable libraries   Jonas Devlieghere via Phabricator via llvm-commits
• [llvm] [JITLink][RISCV] Implement eh_frame handling (PR #68253)   Jonas Hahnfeld via llvm-commits
• [llvm] [JITLink][RISCV] Implement eh_frame handling (PR #68253)   Jonas Hahnfeld via llvm-commits
• [llvm] [JITLink][RISCV] Implement eh_frame handling (PR #68253)   Jonas Hahnfeld via llvm-commits
• [llvm] [JITLink][RISCV] Implement eh_frame handling (PR #68253)   Jonas Hahnfeld via llvm-commits
• [llvm] [JITLink][RISCV] Implement .eh_frame handling (PR #66067)   Jonas Hahnfeld via llvm-commits
• [llvm] {BOLT} Add itrace aggregation for AUX data (PR #70426)   Jonathan Davies via llvm-commits
• [llvm] {BOLT} Add itrace aggregation for AUX data (PR #70426)   Jonathan Davies via llvm-commits
• [llvm] {BOLT} Add itrace aggregation for AUX data (PR #70426)   Jonathan Davies via llvm-commits
• [llvm] [OpenMP] Introduce support for OMPX extensions and taskgraph frontend (PR #66919)   Jose Manuel Monsalve Diaz via llvm-commits
• [llvm] [OpenMP] Introduce support for OMPX extensions and taskgraph frontend (PR #66919)   Jose Manuel Monsalve Diaz via llvm-commits
• [llvm] [OpenMP] Introduce support for OMPX extensions and taskgraph frontend (PR #66919)   Jose Manuel Monsalve Diaz via llvm-commits
• [llvm] [OpenMP] Introduce support for OMPX extensions and taskgraph frontend (PR #66919)   Jose Manuel Monsalve Diaz via llvm-commits
• [llvm] [Offloading][NFC] Move creation of offloading entries from OpenMP (PR #70116)   Joseph Huber via llvm-commits
• [llvm] [Offloading][NFC] Move creation of offloading entries from OpenMP (PR #70116)   Joseph Huber via llvm-commits
• [llvm] [Offloading][NFC] Move creation of offloading entries from OpenMP (PR #70116)   Joseph Huber via llvm-commits
• [llvm] [Offloading][NFC] Move creation of offloading entries from OpenMP (PR #70116)   Joseph Huber via llvm-commits
• [llvm] [Offloading][NFC] Move creation of offloading entries from OpenMP (PR #70116)   Joseph Huber via llvm-commits
• [llvm] [Offloading][NFC] Move creation of offloading entries from OpenMP (PR #70116)   Joseph Huber via llvm-commits
• [llvm] [Offloading][NFC] Move creation of offloading entries from OpenMP (PR #70116)   Joseph Huber via llvm-commits
• [llvm] [Offloading][NFC] Move creation of offloading entries from OpenMP (PR #70116)   Joseph Huber via llvm-commits
• [llvm] [Offloading][NFC] Move creation of offloading entries from OpenMP (PR #70116)   Joseph Huber via llvm-commits
• [llvm] [OpenMP][NFC] Add min/max threads/teams count into the KernelEnvironment (PR #70257)   Joseph Huber via llvm-commits
• [llvm] [OpenMP] Pass min/max thread and team count to the OMPIRBuilder (PR #70247)   Joseph Huber via llvm-commits
• [llvm] [OpenMP] Pass min/max thread and team count to the OMPIRBuilder (PR #70247)   Joseph Huber via llvm-commits
• [llvm] [OpenMP] Pass min/max thread and team count to the OMPIRBuilder (PR #70247)   Joseph Huber via llvm-commits
• [llvm] [OpenMP] Pass min/max thread and team count to the OMPIRBuilder (PR #70247)   Joseph Huber via llvm-commits
• [llvm] [OpenMP] Associate the KernelEnvironment with the GenericKernelTy (PR #70383)   Joseph Huber via llvm-commits
• [llvm] [OpenMP] Associate the KernelEnvironment with the GenericKernelTy (PR #70383)   Joseph Huber via llvm-commits
• [llvm] [OpenMP] Associate the KernelEnvironment with the GenericKernelTy (PR #70383)   Joseph Huber via llvm-commits
• [llvm] [OpenMP] Associate the KernelEnvironment with the GenericKernelTy (PR #70383)   Joseph Huber via llvm-commits
• [llvm] Fix IfConversion UpdatePredRedefs method documentation (PR #69918)   João Andrade via llvm-commits
• [llvm] [WIP][AMDGPU][SIInsertWaitcnts] Do not add s_waitcnt when the counters are known to be 0 already (PR #65735)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [llvm] Followup fix for "Use XMACROS for MachO platforms" (PR #70140)   Juergen Ributzka via llvm-commits
• [llvm] [llvm] Followup fix for "Use XMACROS for MachO platforms" (PR #70140)   Juergen Ributzka via llvm-commits
• [llvm] [AMDGPU] Emit a waitcnt instruction after each memory instruction (PR #68932)   Jun Wang via llvm-commits
• [llvm] [AMDGPU] Add inreg support for SGPR arguments (PR #67182)   Jun Wang via llvm-commits
• [llvm] [AMDGPU] Add inreg support for SGPR arguments (PR #67182)   Jun Wang via llvm-commits
• [llvm] [AMDGPU] Add inreg support for SGPR arguments (PR #67182)   Jun Wang via llvm-commits
• [llvm] [MLIR][scf.parallel] Don't allow a tile size of 0 (PR #68762)   Justin Fargnoli via llvm-commits
• [llvm] [AArch64] Prevent argument promotion of vector with size > 128 bits (PR #70034)   KAWASHIMA Takahiro via llvm-commits
• [llvm] [AArch64] Prevent argument promotion of vector with size > 128 bits (PR #70034)   KAWASHIMA Takahiro via llvm-commits
• [llvm] [AArch64] Prevent argument promotion of vector with size > 128 bits (PR #70034)   KAWASHIMA Takahiro via llvm-commits
• [llvm] [AArch64] Prevent argument promotion of vector with size > 128 bits (PR #70034)   KAWASHIMA Takahiro via llvm-commits
• [llvm] [AArch64] Prevent argument promotion of vector with size > 128 bits (PR #70034)   KAWASHIMA Takahiro via llvm-commits
• [llvm] [AArch64][ABI] Pass v8f32 on the stack (PR #69729)   KAWASHIMA Takahiro via llvm-commits
• [llvm] [AArch64] Prevent argument promotion of vector with size > 128 bits (PR #70034)   KAWASHIMA Takahiro via llvm-commits
• [llvm] [PowerPC] Support tail call optimization on AIX (PR #70016)   Kai Luo via llvm-commits
• [llvm] [PowerPC] Support tail call optimization on AIX (PR #70016)   Kai Luo via llvm-commits
• [llvm] [PowerPC] Support tail call optimization on AIX (PR #70016)   Kai Luo via llvm-commits
• [llvm] [PowerPC] Support tail call optimization on AIX (PR #70016)   Kai Luo via llvm-commits
• [llvm] [PowerPC] Support tail call optimization on AIX (PR #70016)   Kai Luo via llvm-commits
• [llvm] [PowerPC] Support tail call optimization on AIX (PR #70016)   Kai Luo via llvm-commits
• [llvm] [PowerPC] Support tail call optimization on AIX (PR #70016)   Kai Luo via llvm-commits
• [llvm] [PowerPC] Initial support of tail call optimization on AIX (PR #70016)   Kai Luo via llvm-commits
• [llvm] [PowerPC] Initial support of tail call optimization on AIX (PR #70016)   Kai Luo via llvm-commits
• [llvm] [PowerPC] Initial support of tail call optimization on AIX (PR #70016)   Kai Luo via llvm-commits
• [llvm] [PowerPC] Initial support of tail call optimization on AIX (PR #70016)   Kai Luo via llvm-commits
• [llvm] [PowerPC] Initial support of tail call optimization on AIX (PR #70016)   Kai Luo via llvm-commits
• [llvm] [SystemZ][NFC] Fix a couple of style issues (PR #69958)   Kai Nacke via llvm-commits
• [llvm] [SystemZ][NFC] Fix a couple of style issues (PR #69958)   Kai Nacke via llvm-commits
• [llvm] [SystemZ][NFC] Fix a couple of style issues (PR #69958)   Kai Nacke via llvm-commits
• [llvm] [ModuleInliner] Remove an extraneous pair of std::push_heap and std::pop_heap (NFC) (PR #69672)   Kazu Hirata via llvm-commits
• [llvm] d72aa10 - [ADT] Remove an extraneous ternary operator (NFC)   Kazu Hirata via llvm-commits
• [polly] [ADT] Rename llvm::erase_value to llvm::erase (NFC) (PR #70156)   Kazu Hirata via llvm-commits
• [llvm] [InstCombine] Remove scalable vector extracts to and from the same type (PR #69702)   Kerry McLaughlin via llvm-commits
• [llvm] [InstCombine] Remove scalable vector extracts to and from the same type (PR #69702)   Kerry McLaughlin via llvm-commits
• [PATCH] D159283: Add intrinsic to count trailing zero elements in a vector   Kerry McLaughlin via Phabricator via llvm-commits
• [PATCH] D159283: Add intrinsic to count trailing zero elements in a vector   Kerry McLaughlin via Phabricator via llvm-commits
• [PATCH] D159283: Add intrinsic to count trailing zero elements in a vector   Kerry McLaughlin via Phabricator via llvm-commits
• [PATCH] D159283: Add intrinsic to count trailing zero elements in a vector   Kerry McLaughlin via Phabricator via llvm-commits
• [PATCH] D159283: Add intrinsic to count trailing zero elements in a vector   Kerry McLaughlin via Phabricator via llvm-commits
• [PATCH] D159283: Add intrinsic to count trailing zero elements in a vector   Kerry McLaughlin via Phabricator via llvm-commits
• [PATCH] D159283: Add intrinsic to count trailing zero elements in a vector   Kerry McLaughlin via Phabricator via llvm-commits
• [compiler-rt] [HWASAN] Enable memcpy, memmove and memset interceptors (PR #70387)   Kirill Stoimenov via llvm-commits
• [llvm] [MemCpyOpt] Combine alias metadatas when replacing byval arguments (PR #70580)   Kohei Asano via llvm-commits
• [llvm] [MemCpyOpt] Combine alias metadatas when replacing byval arguments (PR #70580)   Kohei Asano via llvm-commits
• [llvm] [MemCpyOpt] Combine alias metadatas when replacing byval arguments (PR #70580)   Kohei Asano via llvm-commits
• [llvm] [RFC][LV] VPlan-based cost model (PR #67647)   Kolya Panchenko via llvm-commits
• [llvm] [libc++][hardening] Rework macros for enabling the hardening mode. (PR #70575)   Konstantin Varlamov via llvm-commits
• [llvm] [libc++][hardening] Rework macros for enabling the hardening mode. (PR #70575)   Konstantin Varlamov via llvm-commits
• [llvm] [libc++][hardening] Rework macros for enabling the hardening mode. (PR #70575)   Konstantin Varlamov via llvm-commits
• [llvm] [libc++][hardening] Rework macros for enabling the hardening mode. (PR #70575)   Konstantin Varlamov via llvm-commits
• [llvm] [libc++][hardening] Rework macros for enabling the hardening mode. (PR #70575)   Konstantin Varlamov via llvm-commits
• [llvm] [NewGVN][1/3] Load coercion between load and store (PR #68659)   Konstantina Mitropoulou via llvm-commits
• [llvm] [NewGVN][2/3] Load coercion between loads that have live-on-entry definitions (PR #68666)   Konstantina Mitropoulou via llvm-commits
• [llvm] [NewGVN][1/3] Load coercion between load and store (PR #68659)   Konstantina Mitropoulou via llvm-commits
• [llvm] [NewGVN][1/3] Load coercion between load and store (PR #68659)   Konstantina Mitropoulou via llvm-commits
• [llvm] [NewGVN][1/3] Load coercion between load and store (PR #68659)   Konstantina Mitropoulou via llvm-commits
• [llvm] [NewGVN][1/3] Load coercion between load and store (PR #68659)   Konstantina Mitropoulou via llvm-commits
• [llvm] [NewGVN][1/3] Load coercion between load and store (PR #68659)   Konstantina Mitropoulou via llvm-commits
• [llvm] [NewGVN][1/3] Load coercion between load and store (PR #68659)   Konstantina Mitropoulou via llvm-commits
• [llvm] [NewGVN][2/3] Load coercion between loads that have live-on-entry definitions (PR #68666)   Konstantina Mitropoulou via llvm-commits
• [llvm] [NewGVN][3/3] Load coercion for loads that can be replaced by a phi (PR #68669)   Konstantina Mitropoulou via llvm-commits
• [llvm] [AArch64] Fix tryMergeAdjacentSTG function in PrologEpilog pass (PR #68873)   Kristof Beyls via llvm-commits
• [llvm] [AArch64] Fix tryMergeAdjacentSTG function in PrologEpilog pass (PR #68873)   Kristof Beyls via llvm-commits
• [llvm] [AArch64] Fix tryMergeAdjacentSTG function in PrologEpilog pass (PR #68873)   Kristof Beyls via llvm-commits
• [llvm] [AArch64] Fix tryMergeAdjacentSTG function in PrologEpilog pass (PR #68873)   Kristof Beyls via llvm-commits
• [llvm] [AArch64] Fix tryMergeAdjacentSTG function in PrologEpilog pass (PR #68873)   Kristof Beyls via llvm-commits
• [llvm] [Security Group] add github names of security group members. (PR #69304)   Kristof Beyls via llvm-commits
• [llvm] [docs] Improve README: point to office hours and online sync-ups (PR #69323)   Kristof Beyls via llvm-commits
• [llvm] [docs] Improve README: point to office hours and online sync-ups (PR #69323)   Kristof Beyls via llvm-commits
• [PATCH] D158511: [AArch64] Move SLS later in pass pipeline   Kristof Beyls via Phabricator via llvm-commits
• [PATCH] D158511: [AArch64] Move SLS later in pass pipeline   Kristof Beyls via Phabricator via llvm-commits
• [llvm] [FunctionAttrs] Improve handling of alias-preserving intrinsic calls (PR #68453)   Krzysztof Drewniak via llvm-commits
• [llvm] [FunctionAttrs] Improve handling of alias-preserving intrinsic calls (PR #68453)   Krzysztof Drewniak via llvm-commits
• [llvm] [FunctionAttrs] Improve handling of alias-preserving intrinsic calls (PR #68453)   Krzysztof Drewniak via llvm-commits
• [llvm] [FunctionAttrs] Improve handling of alias-preserving intrinsic calls (PR #68453)   Krzysztof Drewniak via llvm-commits
• [llvm] [FunctionAttrs] Improve handling of alias-preserving intrinsic calls (PR #68453)   Krzysztof Drewniak via llvm-commits
• [llvm] [FunctionAttrs] Improve handling of alias-preserving intrinsic calls (PR #68453)   Krzysztof Drewniak via llvm-commits
• [PATCH] D158463: [AMDGPU] Add IR-level pass to rewrite away address space 7   Krzysztof Drewniak via Phabricator via llvm-commits
• [PATCH] D158463: [AMDGPU] Add IR-level pass to rewrite away address space 7   Krzysztof Drewniak via Phabricator via llvm-commits
• [llvm] Reapply inline spiller subranges (PR #70194)   Krzysztof Parzyszek via llvm-commits
• [llvm] 4343c4e - [gn build] Port 5d7f346bd398   LLVM GN Syncbot via llvm-commits
• [llvm] a3e5c94 - [gn build] Port 109aa586f073   LLVM GN Syncbot via llvm-commits
• [llvm] 3b59b3e - [gn build] Port 897cc8a7d7c0   LLVM GN Syncbot via llvm-commits
• [llvm] 86d0715 - [gn build] Port a3490920615e   LLVM GN Syncbot via llvm-commits
• [llvm] 02fcae8 - [gn build] Port 88d00a6897d7   LLVM GN Syncbot via llvm-commits
• [llvm] c131455 - [gn build] Port b0b88643a1fa   LLVM GN Syncbot via llvm-commits
• [llvm] [MLIR] SPIRV Target Attribute (PR #69949)   Lei Zhang via llvm-commits
• [llvm] [MLIR] Update convert-gpu-to-spirv pass to prepare using GPU compilat… (PR #69941)   Lei Zhang via llvm-commits
• [llvm] [MLIR] SPIRV Target Attribute (PR #69949)   Lei Zhang via llvm-commits
• [llvm] [MLIR] SPIRV Target Attribute (PR #69949)   Lei Zhang via llvm-commits
• [llvm] [MLIR] SPIRV Target Attribute (PR #69949)   Lei Zhang via llvm-commits
• [llvm] [MLIR] SPIRV Target Attribute (PR #69949)   Lei Zhang via llvm-commits
• [llvm] [MLIR] SPIRV Target Attribute (PR #69949)   Lei Zhang via llvm-commits
• [llvm] [MLIR] SPIRV Target Attribute (PR #69949)   Lei Zhang via llvm-commits
• [llvm] [MLIR] SPIRV Target Attribute (PR #69949)   Lei Zhang via llvm-commits
• [llvm] [MLIR] SPIRV Target Attribute (PR #69949)   Lei Zhang via llvm-commits
• [llvm] [MLIR] SPIRV Target Attribute (PR #69949)   Lei Zhang via llvm-commits
• [llvm] [MLIR] SPIRV Target Attribute (PR #69949)   Lei Zhang via llvm-commits
• [compiler-rt] bac3808 - Reapply "[compiler-rt] Allow Fuchsia to use 64-bit allocator for RISCV (#68343)"   Leonard Chan via llvm-commits
• [llvm] [ModuleInliner] Remove an extraneous pair of std::push_heap and std::pop_heap (NFC) (PR #69672)   Liqiang TAO via llvm-commits
• [llvm] StackProtector: use isInTailCallPosition to verify tail call position (PR #68997)   Liqiang TAO via llvm-commits
• [llvm] StackProtector: use isInTailCallPosition to verify tail call position (PR #68997)   Liqiang TAO via llvm-commits
• [PATCH] D133860: StackProtector: enable tail call optimization even without musttail   Liqiang Tao via Phabricator via llvm-commits
• [llvm] [Github] Add libcxx docs to CI (PR #69828)   Louis Dionne via llvm-commits
• [llvm] [Github] Add libunwind to docs CI (PR #69830)   Louis Dionne via llvm-commits
• [llvm] [libc++] Fix the behavior of throwing `operator new` under -fno-exceptions (PR #69498)   Louis Dionne via llvm-commits
• [llvm] [CMake] Correctly handle LLVM_ENABLE_RUNTIMES in targets (PR #69869)   Louis Dionne via llvm-commits
• [llvm] [libc++] Fix complexity guarantee in std::clamp (PR #68413)   Louis Dionne via llvm-commits
• [lld] [lld][LoongArch] Print error when encountering R_LARCH_ALIGN (PR #67424)   Lu Weining via llvm-commits
• [lld] [lld][LoongArch] Print error when encountering R_LARCH_ALIGN (PR #67424)   Lu Weining via llvm-commits
• [compiler-rt] [test][compiler-rt] Mark several tests as UNSUPPORTED on LoongArch (PR #69699)   Lu Weining via llvm-commits
• [llvm] [llvm][AArch64][Assembly]: Add FP8FMA assembly and disassembly. (PR #70134)   Lucas Duarte Prates via llvm-commits
• [llvm] [LLVM][AArch64][Assembly]: Add FAMINMAX assembly/disasse… (PR #70115)   Lucas Duarte Prates via llvm-commits
• [llvm] [llvm][AArch64][Assembly]: Add FP8FMA assembly and disassembly. (PR #70134)   Lucas Duarte Prates via llvm-commits
• [llvm] [RISCV] Add tests for vmadd for VP intrinsics. NFC (PR #70042)   Luke Lau via llvm-commits
• [llvm] [RISCV] Mark V0 regclasses as larger superclasses of non-V0 classes (PR #70109)   Luke Lau via llvm-commits
• [llvm] [RISCV] Mark V0 regclasses as larger superclasses of non-V0 classes (PR #70109)   Luke Lau via llvm-commits
• [llvm] [RISCV][GISel] Falling back to SDISel for scalable vector type values (PR #70133)   Luke Lau via llvm-commits
• [llvm] [RISCV] Add tests for vmadd for VP intrinsics. NFC (PR #70042)   Luke Lau via llvm-commits
• [llvm] [RISCV] Keep same SEW/LMUL ratio if possible in forward transfer (PR #69788)   Luke Lau via llvm-commits
• [llvm] [VP] Check if VP ops with functional intrinsics are speculatable (PR #69504)   Luke Lau via llvm-commits
• [llvm] [RISCV] Keep same SEW/LMUL ratio if possible in forward transfer (PR #69788)   Luke Lau via llvm-commits
• [llvm] [VP] Check if VP ops with functional intrinsics are speculatable (PR #69504)   Luke Lau via llvm-commits
• [llvm] [RISCV] Begin moving post-isel vector peepholes to a MF pass (PR #70342)   Luke Lau via llvm-commits
• [llvm] [RISCV] Keep same SEW/LMUL ratio if possible in forward transfer (PR #69788)   Luke Lau via llvm-commits
• [llvm] [RISCV] Keep same SEW/LMUL ratio if possible in forward transfer (PR #69788)   Luke Lau via llvm-commits
• [llvm] [VP][RISCV] Add llvm.experimental.vp.reverse. (PR #70405)   Luke Lau via llvm-commits
• [llvm] [RISCV] Begin moving post-isel vector peepholes to a MF pass (PR #70342)   Luke Lau via llvm-commits
• [llvm] [RISCV][sanitizer] Fix sanitizer support for different virtual memory layout (PR #66743)   Luís Marques via llvm-commits
• [llvm] [llvm][support] Show name of overlapping cl option (PR #70108)   Maksim Levental via llvm-commits
• [llvm] [llvm][support] Show name of overlapping cl option (PR #70108)   Maksim Levental via llvm-commits
• [llvm] [llvm][support] Show name of overlapping cl option (PR #70108)   Maksim Levental via llvm-commits
• [llvm] [llvm][support] Show name of overlapping cl option (PR #70108)   Maksim Levental via llvm-commits
• [llvm] [llvm][support] Show name of overlapping cl option (PR #70108)   Maksim Levental via llvm-commits
• [llvm] [llvm][support] Show name of overlapping cl option (PR #70108)   Maksim Levental via llvm-commits
• [llvm] [llvm][support] Show name of overlapping cl option (PR #70108)   Maksim Levental via llvm-commits
• [llvm] [llvm][support] Show name of overlapping cl option (PR #70108)   Maksim Levental via llvm-commits
• [llvm] [llvm][support] Show name of overlapping cl option (PR #70108)   Maksim Levental via llvm-commits
• [llvm] [llvm][support] Show name of overlapping cl option (PR #70108)   Maksim Levental via llvm-commits
• [llvm] [llvm][support] Show name of overlapping cl option (PR #70108)   Maksim Levental via llvm-commits
• [llvm] [llvm][support] Show name of overlapping cl option (PR #70108)   Maksim Levental via llvm-commits
• [llvm] [llvm][support] Show name of overlapping cl option (PR #70108)   Maksim Levental via llvm-commits
• [llvm] [llvm][support] Show name of overlapping cl option (PR #70108)   Maksim Levental via llvm-commits
• [llvm] [llvm][support] Show name of overlapping cl option (PR #70108)   Maksim Levental via llvm-commits
• [llvm] [llvm][support] Show name of overlapping cl option (PR #70108)   Maksim Levental via llvm-commits
• [llvm] [llvm][support] Show name of overlapping cl option (PR #70108)   Maksim Levental via llvm-commits
• [llvm] Port Swift's merge function pass to llvm: merging functions that differ in constants (PR #68235)   Manman Ren via llvm-commits
• [llvm] Port Swift's merge function pass to llvm: merging functions that differ in constants (PR #68235)   Manman Ren via llvm-commits
• [llvm] Port Swift's merge function pass to llvm: merging functions that differ in constants (PR #68235)   Manman Ren via llvm-commits
• [llvm] Port Swift's merge function pass to llvm: merging functions that differ in constants (PR #68235)   Manman Ren via llvm-commits
• [llvm] Port Swift's merge function pass to llvm: merging functions that differ in constants (PR #68235)   Manman Ren via llvm-commits
• [compiler-rt] Support MemProf on darwin (PR #69640)   Manman Ren via llvm-commits
• [llvm] [mlir][LLVM] Verify too many indices in GEP verifier (PR #70174)   Markus Böck via llvm-commits
• [llvm] [mlir][LLVM] Verify too many indices in GEP verifier (PR #70174)   Markus Böck via llvm-commits
• [lld] [lld][COFF]Expose UnifiedLTO options (PR #69904)   Martin Storsjö via llvm-commits
• [llvm] [llvm-rc] Concatenate consecutive string tokens in windres mode (PR #68685)   Martin Storsjö via llvm-commits
• [lld] [LLD] [MinGW] Hook up --icf=safe to -opt:safeicf (PR #70037)   Martin Storsjö via llvm-commits
• [lld] [LLD] [MinGW] Hook up --icf=safe to -opt:safeicf (PR #70037)   Martin Storsjö via llvm-commits
• [lld] [LLD] [COFF] Recognize Itanium vtables for ICF (PR #70196)   Martin Storsjö via llvm-commits
• [lld] [LLD] [MinGW] Hook up --icf=safe to -opt:safeicf (PR #70037)   Martin Storsjö via llvm-commits
• [lld] [LLD] [COFF] Recognize Itanium vtables for ICF (PR #70196)   Martin Storsjö via llvm-commits
• [lld] [LLD] [COFF] Handle undefined weak symbols in LTO (PR #70430)   Martin Storsjö via llvm-commits
• [llvm] [Docs][LTO] Updated HowToSubmitABug.rst for LTO crashes (PR #68389)   Matheus Izvekov via llvm-commits
• [llvm] [Docs][LTO] Updated HowToSubmitABug.rst for LTO crashes (PR #68389)   Matheus Izvekov via llvm-commits
• [llvm] [Docs][LTO] Updated HowToSubmitABug.rst for LTO crashes (PR #68389)   Matheus Izvekov via llvm-commits
• [llvm] [AMDGPU][wmma] - Add tied wmma intrinsic (PR #69903)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Improve isBasicBlockPrologue helper function (PR #69924)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix GCNRewritePartialRegUses pass: vector regclass is selected instead of scalar. (PR #69957)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Fold selection between less than zero and one (PR #69961)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Fold selection between less than zero and one (PR #69961)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add documentation for scheduler intrinsics (PR #69854)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add writelane and readlane pseudos for SGPR spilling (PR #69923)   Matt Arsenault via llvm-commits
• [llvm] [RISCV][GISel][NFC] Correct the test case in constant32.mir (PR #70003)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add dynamic LDS size implicit kernel argument to CO-v5 (PR #65273)   Matt Arsenault via llvm-commits
• [llvm] [GISel] Pass MPO and VA to assignValueToAddress by const reference. NFC (PR #69810)   Matt Arsenault via llvm-commits
• [llvm] [DAG] Constant Folding for U/SMUL_LOHI (PR #69437)   Matt Arsenault via llvm-commits
• [llvm] [DAG] Constant Folding for U/SMUL_LOHI (PR #69437)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Rematerialize scalar loads (PR #68778)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add an option to disable unsafe uses of atomic xor (PR #69229)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] optimize powi(X,Y) * X with Ofast (PR #69998)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] optimize powi(X,Y) * X with Ofast (PR #69998)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] - Generate s_bitreplicate_b64_b32 (PR #69209)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] - Generate s_bitreplicate_b64_b32 (PR #69209)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] - Generate s_bitreplicate_b64_b32 (PR #69209)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] - Generate s_bitreplicate_b64_b32 (PR #69209)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Defaults for missing dimensions in SYCL required wg size (PR #68872)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Defaults for missing dimensions in SYCL required wg size (PR #68872)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Defaults for missing dimensions in SYCL required wg size (PR #68872)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Defaults for missing dimensions in SYCL required wg size (PR #68872)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Defaults for missing dimensions in SYCL required wg size (PR #68872)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Quit PromoteAllocaToVector if intrinsic is used (PR #68744)   Matt Arsenault via llvm-commits
• [llvm] Improve selection of conditional branch on amdgcn.ballot!=0 condition in SelectionDAG. (PR #68714)   Matt Arsenault via llvm-commits
• [llvm] Improve selection of conditional branch on amdgcn.ballot!=0 condition in SelectionDAG. (PR #68714)   Matt Arsenault via llvm-commits
• [llvm] Improve selection of conditional branch on amdgcn.ballot!=0 condition in SelectionDAG. (PR #68714)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Emit a waitcnt instruction after each memory instruction (PR #68932)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Rework dot4 signedness checks (PR #68757)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Rework dot4 signedness checks (PR #68757)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Generic lowering for rint and nearbyint (PR #69596)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Generic lowering for rint and nearbyint (PR #69596)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Generic lowering for rint and nearbyint (PR #69596)   Matt Arsenault via llvm-commits
• [llvm] [DiagnosticInfo] Output full file path instead of relative path (PR #68027)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] convergence control tokens and intrinsics (PR #67006)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] convergence control tokens and intrinsics (PR #67006)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] optimize powi(X,Y) * X with Ofast (PR #69998)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] optimize powi(X,Y) * X with Ofast (PR #69998)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Make getDWordFromOffset robust against exotic types (PR #70153)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Make getDWordFromOffset robust against exotic types (PR #70153)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add inreg support for SGPR arguments (PR #67182)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add inreg support for SGPR arguments (PR #67182)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add inreg support for SGPR arguments (PR #67182)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add inreg support for SGPR arguments (PR #67182)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add inreg support for SGPR arguments (PR #67182)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add inreg support for SGPR arguments (PR #67182)   Matt Arsenault via llvm-commits
• [llvm] [RISCV][GlobalISel] Select G_GLOBAL_VALUE (PR #70091)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fold uniform readfirstlane + cndmask (PR #70188)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fold uniform readfirstlane + cndmask (PR #70188)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fold uniform readfirstlane + cndmask (PR #70188)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fold uniform readfirstlane + cndmask (PR #70188)   Matt Arsenault via llvm-commits
• [llvm] Reapply inline spiller subranges (PR #70194)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][GlobalISel] Add support for pre-indexed loads/stores. (PR #70185)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][GlobalISel] Add support for pre-indexed loads/stores. (PR #70185)   Matt Arsenault via llvm-commits
• [llvm] STACK: GlobalISel: indexed load/stores support for AArch64 (PR #69533)   Matt Arsenault via llvm-commits
• [llvm] STACK: GlobalISel: indexed load/stores support for AArch64 (PR #69533)   Matt Arsenault via llvm-commits
• [llvm] [Offloading][NFC] Move creation of offloading entries from OpenMP (PR #70116)   Matt Arsenault via llvm-commits
• [llvm] [Offloading][NFC] Move creation of offloading entries from OpenMP (PR #70116)   Matt Arsenault via llvm-commits
• [llvm] [Mips][GISel] Fix a couple issues with passing f64 in 32-bit GPRs. (PR #69131)   Matt Arsenault via llvm-commits
• [llvm] [SjLjEHPrepare] Fix callsite problem (PR #67264)   Matt Arsenault via llvm-commits
• [llvm] [DAGCombine] Fold setcc_eq infinity into is.fpclass (PR #67829)   Matt Arsenault via llvm-commits
• [llvm] [DAGCombine] Fold setcc_eq infinity into is.fpclass (PR #67829)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Cleanup hasUnwantedEffectsWhenEXECEmpty function (PR #70206)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add writelane and readlane pseudos for SGPR spilling (PR #69923)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add writelane and readlane pseudos for SGPR spilling (PR #69923)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add writelane and readlane pseudos for SGPR spilling (PR #69923)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Improve isBasicBlockPrologue helper function (PR #69924)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Improve isBasicBlockPrologue helper function (PR #69924)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Improve isBasicBlockPrologue helper function (PR #69924)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] GCNRegPressure printing pass for testing. (PR #70031)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] GCNRegPressure printing pass for testing. (PR #70031)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] GCNRegPressure printing pass for testing. (PR #70031)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] GCNRegPressure printing pass for testing. (PR #70031)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] GCNRegPressure printing pass for testing. (PR #70031)   Matt Arsenault via llvm-commits
• [llvm] [GISel] Restrict G_BSWAP to multiples of 16 bits. (PR #70245)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Use alloca address space in rewrite-out-arguments.ll (PR #70269)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fold uniform readfirstlane + cndmask (PR #70188)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fold uniform readfirstlane + cndmask (PR #70188)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Add `GITypeOf` special type (PR #66079)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Add `GITypeOf` special type (PR #66079)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Add `GITypeOf` special type (PR #66079)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add writelane and readlane pseudos for SGPR spilling (PR #69923)   Matt Arsenault via llvm-commits
• [llvm] [X86][NFC] Reorder the registers to reduce unnecessary iterations (PR #70222)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Correct assert that incorrectly chained multiple == operators. (PR #70291)   Matt Arsenault via llvm-commits
• [llvm] [X86][NFC] Reorder the registers to reduce unnecessary iterations (PR #70222)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][wmma] - Add tied wmma intrinsic (PR #69903)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Prevent folding of the negative i32 literals as i64 (PR #70274)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Prevent folding of the negative i32 literals as i64 (PR #70274)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Prevent folding of the negative i32 literals as i64 (PR #70274)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Prevent folding of the negative i32 literals as i64 (PR #70274)   Matt Arsenault via llvm-commits
• [llvm] [OpenMP] Pass min/max thread and team count to the OMPIRBuilder (PR #70247)   Matt Arsenault via llvm-commits
• [llvm] [OpenMP] Pass min/max thread and team count to the OMPIRBuilder (PR #70247)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] New ttracedata intrinsics (PR #70235)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Defaults for missing dimensions in SYCL required wg size (PR #68872)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Defaults for missing dimensions in SYCL required wg size (PR #68872)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Defaults for missing dimensions in SYCL required wg size (PR #68872)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU]: Accept constant zero bytes in v_perm OrCombine (PR #66533)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Give some of the VI V_PK_* instructions a subtarget predicate. (PR #70334)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Assert that we can find subregs in copyPhysReg. NFC. (PR #70332)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Improve isBasicBlockPrologue helper function (PR #69924)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Select 64-bit moves (PR #70395)   Matt Arsenault via llvm-commits
• [llvm] Enable exp10 libcall on linux (PR #68736)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Improve isBasicBlockPrologue helper function (PR #69924)   Matt Arsenault via llvm-commits
• [llvm] b8b491c - AMDGPU: Add infinite looping testcase after subrange spilling change   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] - Add s_bitreplicate intrinsic (PR #69209)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] GCNRegPressure printing pass for testing. (PR #70031)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Move WWM register pre-allocation to during regalloc (PR #70618)   Matt Arsenault via llvm-commits
• [PATCH] D141060: [opt] Infer DataLayout from triple if not specified   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D141060: [opt] Infer DataLayout from triple if not specified   Matt Arsenault via Phabricator via llvm-commits
• [llvm] Add Wasm peephole optimisation to remove dead code around `unreachable`s (PR #66062)   Matt Harding via llvm-commits
• [llvm] Fix comment in wasm unreachable test (PR #70340)   Matt Harding via llvm-commits
• [llvm] [AArch64][SVE2] Use rshrnb for masked stores (PR #70026)   Matthew Devereau via llvm-commits
• [llvm] [AArch64][SVE2] Use rshrnb for masked stores (PR #70026)   Matthew Devereau via llvm-commits
• [llvm] [AArch64][SVE2] Use rshrnb for masked stores (PR #70026)   Matthew Devereau via llvm-commits
• [llvm] [AArch64][SVE2] Use rshrnb for masked stores (PR #70026)   Matthew Devereau via llvm-commits
• [llvm] [AArch64][SVE2] Use rshrnb for masked stores (PR #70026)   Matthew Devereau via llvm-commits
• [llvm] MachineBlockPlacement: Add tolerance to comparisons (PR #67197)   Matthias Braun via llvm-commits
• [llvm] [PHIElimination] Handle subranges in LiveInterval updates (PR #69429)   Matthias Braun via llvm-commits
• [llvm] [PHIElimination] Handle subranges in LiveInterval updates (PR #69429)   Matthias Braun via llvm-commits
• [llvm] [PHIElimination] Handle subranges in LiveInterval updates (PR #69429)   Matthias Braun via llvm-commits
• [llvm] [PHIElimination] Handle subranges in LiveInterval updates (PR #69429)   Matthias Braun via llvm-commits
• [llvm] [PHIElimination] Handle subranges in LiveInterval updates (PR #69429)   Matthias Braun via llvm-commits
• [llvm] [AArch64] Only clear kill flags if necessary when merging str (PR #69680)   Matthias Braun via llvm-commits
• [llvm] [AArch64] Only clear kill flags if necessary when merging str (PR #69680)   Matthias Braun via llvm-commits
• [llvm] [AArch64] Only clear kill flags if necessary when merging str (PR #69680)   Matthias Braun via llvm-commits
• [llvm] [AArch64] Only clear kill flags if necessary when merging str (PR #69680)   Matthias Braun via llvm-commits
• [llvm] [BasicBlockSections] Apply path cloning with -basic-block-sections. (PR #68860)   Matthias Braun via llvm-commits
• [llvm] [BasicBlockSections] Apply path cloning with -basic-block-sections. (PR #68860)   Matthias Braun via llvm-commits
• [llvm] [BasicBlockSections] Apply path cloning with -basic-block-sections. (PR #68860)   Matthias Braun via llvm-commits
• [llvm] [BasicBlockSections] Apply path cloning with -basic-block-sections. (PR #68860)   Matthias Braun via llvm-commits
• [llvm] [BasicBlockSections] Apply path cloning with -basic-block-sections. (PR #68860)   Matthias Braun via llvm-commits
• [llvm] [BasicBlockSections] Apply path cloning with -basic-block-sections. (PR #68860)   Matthias Braun via llvm-commits
• [llvm] [BasicBlockSections] Apply path cloning with -basic-block-sections. (PR #68860)   Matthias Braun via llvm-commits
• [llvm] [BasicBlockSections] Apply path cloning with -basic-block-sections. (PR #68860)   Matthias Braun via llvm-commits
• [llvm] Bfi precision (PR #66285)   Matthias Braun via llvm-commits
• [llvm] Bfi precision (PR #66285)   Matthias Braun via llvm-commits
• [llvm] Bfi precision (PR #66285)   Matthias Braun via llvm-commits
• [compiler-rt] Bfi precision (PR #66285)   Matthias Braun via llvm-commits
• [compiler-rt] Bfi precision (PR #66285)   Matthias Braun via llvm-commits
• [llvm] 94aaaf4 - Update m68k tests to new block placement   Matthias Braun via llvm-commits
• [llvm] MachineBlockPlacement: Avoid overflow problems in scaleThreshold() (PR #68272)   Matthias Braun via llvm-commits
• [llvm] MachineBlockPlacement: Avoid overflow problems in scaleThreshold() (PR #68272)   Matthias Braun via llvm-commits
• [llvm] Bfi precision (PR #66285)   Matthias Braun via llvm-commits
• [compiler-rt] Bfi precision (PR #66285)   Matthias Braun via llvm-commits
• [llvm] Bfi precision (PR #66285)   Matthias Braun via llvm-commits
• [llvm] Bfi precision (PR #66285)   Matthias Braun via llvm-commits
• [llvm] Bfi precision (PR #66285)   Matthias Braun via llvm-commits
• [llvm] [MachineInstr] add insert method for variadic instructions (PR #67699)   Matthias Braun via llvm-commits
• [llvm] [MachineInstr] add insert method for variadic instructions (PR #67699)   Matthias Braun via llvm-commits
• [llvm] [MachineInstr] add insert method for variadic instructions (PR #67699)   Matthias Braun via llvm-commits
• [llvm] [MachineInstr] add insert method for variadic instructions (PR #67699)   Matthias Braun via llvm-commits
• [llvm] [MachineInstr] add insert method for variadic instructions (PR #67699)   Matthias Braun via llvm-commits
• [llvm] [MachineInstr] add insert method for variadic instructions (PR #67699)   Matthias Braun via llvm-commits
• [llvm] [MachineInstr] add insert method for variadic instructions (PR #67699)   Matthias Braun via llvm-commits
• [llvm] [MachineInstr] add insert method for variadic instructions (PR #67699)   Matthias Braun via llvm-commits
• [llvm] [MachineInstr] add insert method for variadic instructions (PR #67699)   Matthias Braun via llvm-commits
• [llvm] [MachineInstr] add insert method for variadic instructions (PR #67699)   Matthias Braun via llvm-commits
• [llvm] [MachineInstr] add insert method for variadic instructions (PR #67699)   Matthias Braun via llvm-commits
• [llvm] [mlir][Interfaces][NFC] Move `SubsetInsertionOpInterface` to `mlir/Interfaces` (PR #70615)   Matthias Springer via llvm-commits
• [llvm] [mlir][Interfaces][NFC] Move `SubsetInsertionOpInterface` to `mlir/Interfaces` (PR #70615)   Matthias Springer via llvm-commits
• [llvm] [mlir][Interfaces] Add `SubsetOpInterface` and `SubsetExtractionOpInterface` (PR #70617)   Matthias Springer via llvm-commits
• [llvm] [mlir][Transforms] Add loop-invariant subset hoisting pass (PR #70619)   Matthias Springer via llvm-commits
• [llvm] [mlir][Interfaces] Loop-invariant subset hoisting: Improve bypass analysis (PR #70623)   Matthias Springer via llvm-commits
• [llvm] [mlir][Interfaces] LISH: Improve bypass analysis for loop-like ops (PR #70623)   Matthias Springer via llvm-commits
• [llvm] [mlir][Interfaces] LISH: Add helpers for hyperrectangular subsets (PR #70628)   Matthias Springer via llvm-commits
• [llvm] [mlir][Transforms] Add loop-invariant subset hoisting transformation (LISH) (PR #70619)   Matthias Springer via llvm-commits
• [llvm] [mlir][Transforms] Add loop-invariant subset hoisting (LISH) transformation (PR #70619)   Matthias Springer via llvm-commits
• [llvm] [mlir][Transforms] LISH: Improve bypass analysis for loop-like ops (PR #70623)   Matthias Springer via llvm-commits
• [llvm] [mlir][vector] LISH: Implement `SubsetOpInterface` for transfer_read/write (PR #70629)   Matthias Springer via llvm-commits
• [llvm] [mlir][vector] LISH: Implement `SubsetOpInterface` for transfer_read/write (PR #70629)   Matthias Springer via llvm-commits
• [llvm] [mlir][transform] LISH: Add transform op (PR #70630)   Matthias Springer via llvm-commits
• [PATCH] D150674: [RISCV] Set GenCrashDialog=false for various report_fatal_error calls in lib/Target/RISCV   Mehdi AMINI via Phabricator via llvm-commits
• [llvm] [llvm][TableGen] Add a README to the main TableGen folder (PR #69943)   Mehdi Amini via llvm-commits
• [llvm] [llvm][TableGen] Add a README to the main TableGen folder (PR #69943)   Mehdi Amini via llvm-commits
• [llvm] [ExceptionDemo] Correct and update example ExceptionDemo (PR #69485)   Mehdi Amini via llvm-commits
• [llvm] [mlir][doc] Improve Destination-passing-style documentation (PR #70283)   Mehdi Amini via llvm-commits
• [llvm] [mlir][doc] Improve Destination-passing-style documentation (PR #70283)   Mehdi Amini via llvm-commits
• [llvm] [mlir][doc] Improve Destination-passing-style documentation (PR #70283)   Mehdi Amini via llvm-commits
• [llvm] Update llvm/docs/MyFirstTypoFix.rst for post-Phabricator / Pull-requests world (PR #70310)   Mehdi Amini via llvm-commits
• [llvm] Update llvm/docs/MyFirstTypoFix.rst for post-Phabricator / Pull-requests world (PR #70310)   Mehdi Amini via llvm-commits
• [llvm] [OpenMP][NFC] Add min/max threads/teams count into the KernelEnvironment (PR #70257)   Mehdi Amini via llvm-commits
• [llvm] ddbaa11 - Revert "[OpenMP][NFC] Add min/max threads/teams count into the KernelEnvironment (#70257)"   Mehdi Amini via llvm-commits
• [llvm] f390a76 - Revert "Revert "[OpenMP][NFC] Add min/max threads/teams count into the KernelEnvironment (#70257)""   Mehdi Amini via llvm-commits
• [compiler-rt] [mlir] Add config for PDL (PR #69927)   Mehdi Amini via llvm-commits
• [llvm] fix: asan support aarch64be (PR #70536)   Mehdi Amini via llvm-commits
• [llvm] [mlir][Interfaces][NFC] Move `SubsetInsertionOpInterface` to `mlir/Interfaces` (PR #70615)   Mehdi Amini via llvm-commits
• [llvm] [RISCV][GISel] Select G_SELECT (G_ICMP, A, B) (PR #68247)   Michael Maitland via llvm-commits
• [llvm] [RISCV][GISel] Select G_SELECT (G_ICMP, A, B) (PR #68247)   Michael Maitland via llvm-commits
• [llvm] [RISCV][GlobalISel] Select G_GLOBAL_VALUE (PR #70091)   Michael Maitland via llvm-commits
• [llvm] [RISCV][GlobalISel] Select G_GLOBAL_VALUE (PR #70091)   Michael Maitland via llvm-commits
• [llvm] [RISCV][GlobalISel] Select G_GLOBAL_VALUE (PR #70091)   Michael Maitland via llvm-commits
• [llvm] [RISCV][GlobalISel] Select G_GLOBAL_VALUE (PR #70091)   Michael Maitland via llvm-commits
• [llvm] [RISCV][GlobalISel] Select G_GLOBAL_VALUE (PR #70091)   Michael Maitland via llvm-commits
• [llvm] [RISCV][GlobalISel] Select G_GLOBAL_VALUE (PR #70091)   Michael Maitland via llvm-commits
• [llvm] [RISCV][GlobalISel] Select G_GLOBAL_VALUE (PR #70091)   Michael Maitland via llvm-commits
• [llvm] [RISCV][GlobalISel] Select G_GLOBAL_VALUE (PR #70091)   Michael Maitland via llvm-commits
• [llvm] [RISCV][GlobalISel] Select G_GLOBAL_VALUE (PR #70091)   Michael Maitland via llvm-commits
• [llvm] [RISCV][GlobalISel] Select G_GLOBAL_VALUE (PR #70091)   Michael Maitland via llvm-commits
• [llvm] [RISCV][GlobalISel] Select G_GLOBAL_VALUE (PR #70091)   Michael Maitland via llvm-commits
• [llvm] [RISCV][GISEL] Add legalizer for G_BSWAP (PR #70226)   Michael Maitland via llvm-commits
• [llvm] [RISCV][GISEL] Add legalizer for G_BSWAP (PR #70226)   Michael Maitland via llvm-commits
• [llvm] [RISCV][GISEL] Add legalizer for G_BSWAP (PR #70226)   Michael Maitland via llvm-commits
• [llvm] [RISCV][GISEL] Add legalizer for G_BSWAP (PR #70226)   Michael Maitland via llvm-commits
• [llvm] [RISCV] Add sched model for XiangShan-NanHu (PR #70232)   Michael Maitland via llvm-commits
• [llvm] [RISCV] Add sched model for XiangShan-NanHu (PR #70232)   Michael Maitland via llvm-commits
• [llvm] [RISCV][GISEL] Add legalizer for G_BSWAP (PR #70226)   Michael Maitland via llvm-commits
• [llvm] [RISCV][GISEL] Add legalizer for G_BSWAP (PR #70226)   Michael Maitland via llvm-commits
• [llvm] [RISCV][GISEL] Add legalizer for G_BSWAP (PR #70226)   Michael Maitland via llvm-commits
• [llvm] [RISCV][GISEL] Add legalizer for G_BSWAP (PR #70226)   Michael Maitland via llvm-commits
• [llvm] [GISel] Restrict G_BSWAP to multiples of 16 bits. (PR #70245)   Michael Maitland via llvm-commits
• [llvm] [GISel] Restrict G_BSWAP to multiples of 16 bits. (PR #70245)   Michael Maitland via llvm-commits
• [llvm] [GISel] Restrict G_BSWAP to multiples of 16 bits. (PR #70245)   Michael Maitland via llvm-commits
• [llvm] [RISCV][GISEL] Add legalizer for G_BSWAP (PR #70226)   Michael Maitland via llvm-commits
• [llvm] [RISCV][GISEL] Add legalizer for G_BSWAP (PR #70226)   Michael Maitland via llvm-commits
• [llvm] [RISCV] SiFive7 VLDS Sched should not depend on VL when stride is x0. (PR #70266)   Michael Maitland via llvm-commits
• [llvm] [RISCV] SiFive7 VLDS Sched should not depend on VL when stride is x0. (PR #70266)   Michael Maitland via llvm-commits
• [llvm] [RISCV] SiFive7 VLDS Sched should not depend on VL when stride is x0. (PR #70266)   Michael Maitland via llvm-commits
• [llvm] [RISCV] SiFive7 VLDS Sched should not depend on VL when stride is x0. (PR #70266)   Michael Maitland via llvm-commits
• [llvm] [RISCV] SiFive7 VLDS Sched should not depend on VL when stride is x0. (PR #70266)   Michael Maitland via llvm-commits
• [llvm] [RISCV] SiFive7 VLDS Sched should not depend on VL when stride is x0. (PR #70266)   Michael Maitland via llvm-commits
• [llvm] [RISCV][GISEL] Add legalizer for G_BSWAP (PR #70226)   Michael Maitland via llvm-commits
• [llvm] [RISCV][GISel] Rename XLenVT sXLen to be consistent with other LLTs. (PR #70288)   Michael Maitland via llvm-commits
• [llvm] [RISCV][GISEL] Add legalizer for G_BSWAP (PR #70226)   Michael Maitland via llvm-commits
• [llvm] [RISCV][GISEL] Add legalizer for G_BSWAP (PR #70226)   Michael Maitland via llvm-commits
• [llvm] [RISCV][GISel] Rename XLenVT sXLen to be consistent with other LLTs. (PR #70288)   Michael Maitland via llvm-commits
• [llvm] [RISCV][GISEL] Add legalizer for G_BSWAP (PR #70226)   Michael Maitland via llvm-commits
• [llvm] [RISCV][GISEL] Add legalizer for G_BSWAP (PR #70226)   Michael Maitland via llvm-commits
• [llvm] [RISCV][GISEL] Add legalizer for G_BSWAP (PR #70226)   Michael Maitland via llvm-commits
• [llvm] [RISCV][GISEL] Add legalizer for G_BSWAP (PR #70226)   Michael Maitland via llvm-commits
• [llvm] [RISCV][GlobalISel] Select G_GLOBAL_VALUE (PR #70091)   Michael Maitland via llvm-commits
• [llvm] 4b58112 - [RISCV][GISel] Fix failing test case for G_BSWAP   Michael Maitland via llvm-commits
• [llvm] [RISCV] SiFive7 VLDS Sched should not depend on VL when stride is x0. (PR #70266)   Michael Maitland via llvm-commits
• [llvm] [RISCV] Add an experimental pseudoinstruction to represent a rematerializable constant materialization sequence. (PR #69983)   Michal Terepeta via llvm-commits
• [llvm] 34fe8be - [test][AggressiveInstCombine] Precommit testcase for #69925   Mikael Holmen via llvm-commits
• [llvm] ce0a750 - [AggressiveInstCombine] Ignore debug instructions when load combining (#70200)   Mikael Holmen via llvm-commits
• [PATCH] D127392: [AggressiveInstCombine] Combine consecutive loads which are being merged to form a wider load.   Mikael Holmén via Phabricator via llvm-commits
• [PATCH] D159202: [VPlan] Simplify redundant trunc (zext A) pairs to A.   Mikael Holmén via Phabricator via llvm-commits
• [PATCH] D159202: [VPlan] Simplify redundant trunc (zext A) pairs to A.   Mikael Holmén via Phabricator via llvm-commits
• [PATCH] D159202: [VPlan] Simplify redundant trunc (zext A) pairs to A.   Mikael Holmén via Phabricator via llvm-commits
• [llvm] [ValueTracking] Analyze `Select` in `isKnownNonEqual`. (PR #68427)   Mikhail Gudim via llvm-commits
• [llvm] [RISCV] Macro-fusion support for veyron-v1 CPU. (PR #70012)   Mikhail Gudim via llvm-commits
• [llvm] [RISCV] Macro-fusion support for veyron-v1 CPU. (PR #70012)   Mikhail Gudim via llvm-commits
• [llvm] [RISCV] Macro-fusion support for veyron-v1 CPU. (PR #70012)   Mikhail Gudim via llvm-commits
• [llvm] [RISCV] Macro-fusion support for veyron-v1 CPU. (PR #70012)   Mikhail Gudim via llvm-commits
• [llvm] [ValueTracking] Analyze `Select` in `isKnownNonEqual`. (PR #68427)   Mikhail Gudim via llvm-commits
• [llvm] [RISCV] Macro-fusion support for veyron-v1 CPU. (PR #70012)   Mikhail Gudim via llvm-commits
• [llvm] [ValueTracking] Analyze `Select` in `isKnownNonEqual`. (PR #68427)   Mikhail Gudim via llvm-commits
• [llvm] [RISCV] Macro-fusion support for veyron-v1 CPU. (PR #70012)   Mikhail Gudim via llvm-commits
• [llvm] [RISCV] Macro-fusion support for veyron-v1 CPU. (PR #70012)   Mikhail Gudim via llvm-commits
• [llvm] [RISCV] Macro-fusion support for veyron-v1 CPU. (PR #70012)   Mikhail Gudim via llvm-commits
• [llvm] [RISCV] Macro-fusion support for veyron-v1 CPU. (PR #70012)   Mikhail Gudim via llvm-commits
• [llvm] [RISCV] Macro-fusion support for veyron-v1 CPU. (PR #70012)   Mikhail Gudim via llvm-commits
• [llvm] [RISCV] Add `TuneVentanaVeyron` subtarget feature. (PR #70414)   Mikhail Gudim via llvm-commits
• [llvm] [RISCV] Add `TuneVentanaVeyron` subtarget feature. (PR #70414)   Mikhail Gudim via llvm-commits
• [llvm] [RISCV] Add `TuneVentanaVeyron` subtarget feature. (PR #70414)   Mikhail Gudim via llvm-commits
• [llvm] [RISCV] Macro-fusion support for veyron-v1 CPU. (PR #70012)   Mikhail Gudim via llvm-commits
• [llvm] [RISCV] Macro-fusion support for veyron-v1 CPU. (PR #70012)   Mikhail Gudim via llvm-commits
• [llvm] [RISCV] Macro-fusion support for veyron-v1 CPU. (PR #70012)   Mikhail Gudim via llvm-commits
• [llvm] [RISCV] Add `TuneVentanaVeyron` subtarget feature. (PR #70414)   Mikhail Gudim via llvm-commits
• [llvm] [RISCV] Add `TuneVentanaVeyron` subtarget feature. (PR #70414)   Mikhail Gudim via llvm-commits
• [llvm] [RISCV][GISel] Add ISel support for SHXADD_UW and SLLI.UW (PR #69972)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV][GISel] Add ISel support for SHXADD_UW and SLLI.UW (PR #69972)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV][GISel] Add ISel support for SHXADD_UW and SLLI.UW (PR #69972)   Min-Yih Hsu via llvm-commits
• [llvm] [llvm][TableGen] Add a README to the main TableGen folder (PR #69943)   Min-Yih Hsu via llvm-commits
• [llvm] [llvm][TableGen] Add a README to the main TableGen folder (PR #69943)   Min-Yih Hsu via llvm-commits
• [llvm] [llvm][TableGen] Add a README to the main TableGen folder (PR #69943)   Min-Yih Hsu via llvm-commits
• [llvm] Let M68kMCCodeEmitter set Scratch size. (PR #69898)   Min-Yih Hsu via llvm-commits
• [llvm] Let M68kMCCodeEmitter set Scratch size. (PR #69898)   Min-Yih Hsu via llvm-commits
• [llvm] Let M68kMCCodeEmitter set Scratch size. (PR #69898)   Min-Yih Hsu via llvm-commits
• [llvm] Let M68kMCCodeEmitter set Scratch size. (PR #69898)   Min-Yih Hsu via llvm-commits
• [llvm] [GISel] Make assignValueToReg take CCValAssign by const reference. (PR #70086)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV][GISel] Falling back to SDISel for scalable vector type values (PR #70133)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV][GISel] Add ISel support for SHXADD_UW and SLLI.UW (PR #69972)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV][GISel] Falling back to SDISel for scalable vector type values (PR #70133)   Min-Yih Hsu via llvm-commits
• [llvm] Let M68kMCCodeEmitter set Scratch size. (PR #69898)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV][GISel] Rename XLenVT sXLen to be consistent with other LLTs. (PR #70288)   Min-Yih Hsu via llvm-commits
• [llvm] [NFC]Rename collectPGOFuncNameStrings to collectGlobalVariableNameStrings (PR #70287)   Mingming Liu via llvm-commits
• [llvm] [NFC]Rename collectPGOFuncNameStrings to collectGlobalVariableNameStrings (PR #70287)   Mingming Liu via llvm-commits
• [llvm] [NFC]Rename collectPGOFuncNameStrings to collectGlobalVariableNameStrings (PR #70287)   Mingming Liu via llvm-commits
• [llvm] [NFC]Rename collectPGOFuncNameStrings to collectGlobalObjectNameStrings (PR #70287)   Mingming Liu via llvm-commits
• [llvm] [NFC]Rename collectPGOFuncNameStrings to collectGlobalObjectNameStrings (PR #70287)   Mingming Liu via llvm-commits
• [llvm] [NFC]Rename collectPGOFuncNameStrings to collectGlobalObjectNameStrings (PR #70287)   Mingming Liu via llvm-commits
• [llvm] [NFC]Rename collectPGOFuncNameStrings to collectGlobalObjectNameStrings (PR #70287)   Mingming Liu via llvm-commits
• [llvm] [NFC]Rename collectPGOFuncNameStrings to collectGlobalObjectNameStrings (PR #70287)   Mingming Liu via llvm-commits
• [compiler-rt] Bfi precision (PR #66285)   Mingming Liu via llvm-commits
• [llvm] [NFC]Rename collectPGOFuncNameStrings to collectGlobalObjectNameStrings (PR #70287)   Mingming Liu via llvm-commits
• [llvm] [NFC]Rename collectPGOFuncNameStrings to collectGlobalObjectNameStrings (PR #70287)   Mingming Liu via llvm-commits
• [llvm] [NFC] In InstrProf, generalize helper functions to take 'GlobalObject'. They currently take 'Functions' as function parameters or have 'Func' in the name. (PR #70287)   Mingming Liu via llvm-commits
• [llvm] [NFC] In InstrProf, generalize helper functions to take 'GlobalObject'. They currently take 'Functions' as function parameters or have 'Func' in the name. (PR #70287)   Mingming Liu via llvm-commits
• [llvm] [NFC] In InstrProf, generalize helper functions to take 'GlobalObject'. They currently take 'Functions' as function parameters or have 'Func' in the name. (PR #70287)   Mingming Liu via llvm-commits
• [llvm] [NFC] In InstrProf, generalize helper functions to take 'GlobalObject'. They currently take 'Functions' as function parameters or have 'Func' in the name. (PR #70287)   Mingming Liu via llvm-commits
• [llvm] [NFC] In InstrProf, generalize helper functions to take 'GlobalObject'. They currently take 'Functions' as function parameters or have 'Func' in the name. (PR #70287)   Mingming Liu via llvm-commits
• [llvm] [NFC] In InstrProf, generalize helper functions to take 'GlobalObject'. They currently take 'Functions' as function parameters or have 'Func' in the name. (PR #70287)   Mingming Liu via llvm-commits
• [llvm] [NFC] In InstrProf, generalize helper functions to take 'GlobalObject'. They currently take 'Functions' as function parameters or have 'Func' in the name. (PR #70287)   Mingming Liu via llvm-commits
• [PATCH] D135929: [profile] Add binary ids into indexed profiles   Mingming Liu via Phabricator via llvm-commits
• [llvm] ec06459 - Revert "[mlgo] Fix tests post 760e7d0"   Mircea Trofin via llvm-commits
• [llvm] c362cc2 - [mlgo][regalloc] Fix reference file post e3cf80c   Mircea Trofin via llvm-commits
• [llvm] 840bf2a - [mlgo][regalloc] Fix tests post 9a091de7   Mircea Trofin via llvm-commits
• [llvm] Disable memtag sanitization for global fnptrs going into .ctors (PR #70186)   Mitch Phillips via llvm-commits
• [llvm] Disable memtag sanitization for global fnptrs going into .ctors (PR #70186)   Mitch Phillips via llvm-commits
• [compiler-rt] [scudo] Enable "Delayed release to OS" feature for Android (PR #65942)   Mitch Phillips via llvm-commits
• [llvm] Disable memtag sanitization for global fnptrs going into .ctors (PR #70186)   Mitch Phillips via llvm-commits
• [llvm] [ASAN] For Asan instrumented global, emit two symbols, one with actual size and other with instrumented size. (PR #70166)   Mitch Phillips via llvm-commits
• [llvm] [AArch64] Disable by default MachineSink sink-and-fold (PR #70101)   Momchil Velikov via llvm-commits
• [llvm] [AArch64] Disable by default MachineSink sink-and-fold (PR #70101)   Momchil Velikov via llvm-commits
• [llvm] [AArch64] Stack probing for function prologues (PR #66524)   Momchil Velikov via llvm-commits
• [llvm] [AArch64] Disable by default MachineSink sink-and-fold (PR #70101)   Momchil Velikov via llvm-commits
• [llvm] [AArch64] Stack probing for function prologues (PR #66524)   Momchil Velikov via llvm-commits
• [llvm] [AArch64][SVE2.1] Add intrinsics for quadword loads/stores with unscaled offset (PR #70474)   Momchil Velikov via llvm-commits
• [llvm] [AArch64] Add SVE2.1 intrinsics for indexed quadword gather loads and scatter stores (PR #70476)   Momchil Velikov via llvm-commits
• [llvm] [CFIFixup] Allow function prologues to span more than one basic block (PR #68984)   Momchil Velikov via llvm-commits
• [llvm] [clang][AArch64] Pass down stack clash protection options to LLVM/Backend (PR #68993)   Momchil Velikov via llvm-commits
• [llvm] [AArch64] Stack probing for function prologues (PR #66524)   Momchil Velikov via llvm-commits
• [llvm] [AArch64] Stack probing for dynamic allocas in SelectionDAG (PR #66525)   Momchil Velikov via llvm-commits
• [llvm] [AArch64] Stack probing for dynamic allocas in GlobalISel (PR #67123)   Momchil Velikov via llvm-commits
• [llvm] [clang][AArch64] Pass down stack clash protection options to LLVM/Backend (PR #68993)   Momchil Velikov via llvm-commits
• [llvm] [Verifier] Check function attributes related to branch protection (NFC) (PR #70565)   Momchil Velikov via llvm-commits
• [PATCH] D145706: [MachineSink] Sink instruction copies when they can replace copy into hard register   Momchil Velikov via Phabricator via llvm-commits
• [PATCH] D158084: [AArch64] Stack probing for function prologues   Momchil Velikov via Phabricator via llvm-commits
• [llvm] [VectorCombine] Add special handling for truncating shuffles (PR #70013)   Nabeel Omer via llvm-commits
• [llvm] [VectorCombine] Add special handling for truncating shuffles (PR #70013)   Nabeel Omer via llvm-commits
• [llvm] [SLP] Fix condition for avoiding scheduling of instructions (PR #70035)   Nabeel Omer via llvm-commits
• [llvm] [SLP] Fix condition for avoiding scheduling of instructions (PR #70035)   Nabeel Omer via llvm-commits
• [llvm] [VectorCombine] Add special handling for truncating shuffles (PR #70013)   Nabeel Omer via llvm-commits
• [llvm] [VectorCombine] Add special handling for truncating shuffles (PR #70013)   Nabeel Omer via llvm-commits
• [llvm] [VectorCombine] Add special handling for truncating shuffles (PR #70013)   Nabeel Omer via llvm-commits
• [llvm] [SLP] Fix condition for avoiding scheduling of instructions (PR #70035)   Nabeel Omer via llvm-commits
• [llvm] [SLP] Fix condition for avoiding scheduling of instructions (PR #70035)   Nabeel Omer via llvm-commits
• [llvm] [SystemZ][z/OS] Implement executePostLayoutBinding for GOFFObjectWriter (PR #67868)   Neumann Hon via llvm-commits
• [llvm] [SystemZ][z/OS] Implement executePostLayoutBinding for GOFFObjectWriter (PR #67868)   Neumann Hon via llvm-commits
• [llvm] [SystemZ][z/OS] Implement executePostLayoutBinding for GOFFObjectWriter (PR #67868)   Neumann Hon via llvm-commits
• [llvm] [SystemZ][z/OS] Implement executePostLayoutBinding for GOFFObjectWriter (PR #67868)   Neumann Hon via llvm-commits
• [llvm] [SystemZ][z/OS] Implement executePostLayoutBinding for GOFFObjectWriter (PR #67868)   Neumann Hon via llvm-commits
• [llvm] [SystemZ][z/OS] Implement executePostLayoutBinding for GOFFObjectWriter (PR #67868)   Neumann Hon via llvm-commits
• [llvm] [SystemZ][z/OS] Implement executePostLayoutBinding for GOFFObjectWriter (PR #67868)   Neumann Hon via llvm-commits
• [llvm] [SystemZ][z/OS] Implement executePostLayoutBinding for GOFFObjectWriter (PR #67868)   Neumann Hon via llvm-commits
• [llvm] [ARM] Add a method to clear registers (PR #69659)   Nick Desaulniers via llvm-commits
• [llvm] [ARM, ELF] Fix access to dso_preemptable __stack_chk_guard with static relocation model (PR #70014)   Nick Desaulniers via llvm-commits
• [llvm] [PowerPC] Add an alias for -mregnames so that full register names used in assembly. (PR #70255)   Nick Desaulniers via llvm-commits
• [llvm] [PowerPC] Add an alias for -mregnames so that full register names used in assembly. (PR #70255)   Nick Desaulniers via llvm-commits
• [llvm] [ARMISelDAGToDAG] use MO_FrameIndex to represent FrameIndex rather than MO_Register for INLINEASM (PR #69654)   Nick Desaulniers via llvm-commits
• [llvm] [ARMISelDAGToDAG] use MO_FrameIndex to represent FrameIndex rather than MO_Register for INLINEASM (PR #69654)   Nick Desaulniers via llvm-commits
• [llvm] [MachineInstr] add insert method for variadic instructions (PR #67699)   Nick Desaulniers via llvm-commits
• [llvm] [MachineInstr] add insert method for variadic instructions (PR #67699)   Nick Desaulniers via llvm-commits
• [llvm] [MachineInstr] add insert method for variadic instructions (PR #67699)   Nick Desaulniers via llvm-commits
• [llvm] [MachineInstr] add insert method for variadic instructions (PR #67699)   Nick Desaulniers via llvm-commits
• [llvm] [MachineInstr] add insert method for variadic instructions (PR #67699)   Nick Desaulniers via llvm-commits
• [llvm] Revert [clang] Handle templated operators with reversed arguments and [STLExtras] Undo C++20 hack (PR #69937)   Nico Weber via llvm-commits
• [llvm] a3a68e0 - [gn] port f70e39ec1731   Nico Weber via llvm-commits
• [llvm] [AMDGPU] - Generate s_bitreplicate_b64_b32 (PR #69209)   Nicolai Hähnle via llvm-commits
• [llvm] [AMDGPU] - Generate s_bitreplicate_b64_b32 (PR #69209)   Nicolai Hähnle via llvm-commits
• [llvm] [AMDGPU][wmma] - Add tied wmma intrinsic (PR #69903)   Nicolai Hähnle via llvm-commits
• [llvm] [AMDGPU] ISel for @llvm.amdgcn.cs.chain intrinsic (PR #68186)   Nicolai Hähnle via llvm-commits
• [llvm] [AMDGPU] ISel for @llvm.amdgcn.cs.chain intrinsic (PR #68186)   Nicolai Hähnle via llvm-commits
• [llvm] [AMDGPU] ISel for @llvm.amdgcn.cs.chain intrinsic (PR #68186)   Nicolai Hähnle via llvm-commits
• [llvm] [AMDGPU] ISel for @llvm.amdgcn.cs.chain intrinsic (PR #68186)   Nicolai Hähnle via llvm-commits
• [llvm] [AMDGPU] ISel for @llvm.amdgcn.cs.chain intrinsic (PR #68186)   Nicolai Hähnle via llvm-commits
• [llvm] [AMDGPU] - Add s_bitreplicate intrinsic (PR #69209)   Nicolai Hähnle via llvm-commits
• [llvm] [AMDGPU] - Add s_bitreplicate intrinsic (PR #69209)   Nicolai Hähnle via llvm-commits
• [llvm] [AMDGPU] - Add s_bitreplicate intrinsic (PR #69209)   Nicolai Hähnle via llvm-commits
• [llvm] [AMDGPU][wmma] - Add tied wmma intrinsic (PR #69903)   Nicolai Hähnle via llvm-commits
• [llvm] [AMDGPU] ISel for @llvm.amdgcn.cs.chain intrinsic (PR #68186)   Nicolai Hähnle via llvm-commits
• [llvm] [AMDGPU][wmma] - Add tied wmma intrinsic (PR #69903)   Nicolai Hähnle via llvm-commits
• [llvm] [AMDGPU][wmma] - Add tied wmma intrinsic (PR #69903)   Nicolai Hähnle via llvm-commits
• [llvm] [AMDGPU] - Add s_bitreplicate intrinsic (PR #69209)   Nicolai Hähnle via llvm-commits
• [llvm] [AMDGPU] - Add s_bitreplicate intrinsic (PR #69209)   Nicolai Hähnle via llvm-commits
• [llvm] [AMDGPU] Detect kills in register sets when trying to form V_CMPX instructions. (PR #68293)   Nicolai Hähnle via llvm-commits
• [llvm] Improve selection of conditional branch on amdgcn.ballot!=0 condition in SelectionDAG. (PR #68714)   Nicolai Hähnle via llvm-commits
• [llvm] Improve selection of conditional branch on amdgcn.ballot!=0 condition in SelectionDAG. (PR #68714)   Nicolai Hähnle via llvm-commits
• [llvm] Improve selection of conditional branch on amdgcn.ballot!=0 condition in SelectionDAG. (PR #68714)   Nicolai Hähnle via llvm-commits
• [llvm] [MemDep] Use EarliestEscapeInfo (PR #69727)   Nikita Popov via llvm-commits
• [llvm] [IR] Require that ptrmask mask matches pointer index size (PR #69343)   Nikita Popov via llvm-commits
• [llvm] [LV] Invalidate SCEV values in the scalar loop after loop vectorization (PR #69886)   Nikita Popov via llvm-commits
• [llvm] [LV] Invalidate SCEV values in the scalar loop after loop vectorization (PR #69886)   Nikita Popov via llvm-commits
• [llvm] [LV] Invalidate SCEV values in the scalar loop after loop vectorization (PR #69886)   Nikita Popov via llvm-commits
• [llvm] [SCEV][LV] Invalidate LCSSA exit phis more thoroughly (PR #69909)   Nikita Popov via llvm-commits
• [llvm] [LV] Invalidate SCEV values in the scalar loop after loop vectorization (PR #69886)   Nikita Popov via llvm-commits
• [llvm] [indvars] Missing variables at Og: (PR #69920)   Nikita Popov via llvm-commits
• [llvm] [indvars] Missing variables at Og: (PR #69920)   Nikita Popov via llvm-commits
• [llvm] [indvars] Missing variables at Og: (PR #69920)   Nikita Popov via llvm-commits
• [llvm] [indvars] Missing variables at Og: (PR #69920)   Nikita Popov via llvm-commits
• [llvm] [IPSCCP] Variable not visible at Og. (PR #66745)   Nikita Popov via llvm-commits
• [llvm] [Analysis] Add Scalable field in MemoryLocation.h (PR #69716)   Nikita Popov via llvm-commits
• [llvm] [Analysis] Add Scalable field in MemoryLocation.h (PR #69716)   Nikita Popov via llvm-commits
• [llvm] [Analysis] Add Scalable field in MemoryLocation.h (PR #69716)   Nikita Popov via llvm-commits
• [llvm] [Analysis] Add Scalable field in MemoryLocation.h (PR #69716)   Nikita Popov via llvm-commits
• [llvm] a3fb234 - [BasicAA] Return std::optional from getObjectSize() (NFC)   Nikita Popov via llvm-commits
• [llvm] e3adc6a - [ScalarizeMaskedMemIntrin] Add missing lit.local.cfg (NFC)   Nikita Popov via llvm-commits
• [llvm] [AArch64] Allow SVE code generation for fixed-width vectors (PR #67122)   Nikita Popov via llvm-commits
• [llvm] d95d1c3 - [DSE] Return std::optional from getPointerSize() (NFC)   Nikita Popov via llvm-commits
• [llvm] [Analysis] Add Scalable field in MemoryLocation.h (PR #69716)   Nikita Popov via llvm-commits
• [llvm] [Analysis] Add Scalable field in MemoryLocation.h (PR #69716)   Nikita Popov via llvm-commits
• [llvm] [ConstantRange] Handle `Intrinsic::ctpop` (PR #68310)   Nikita Popov via llvm-commits
• [llvm] [ConstantRange] Handle `Intrinsic::ctpop` (PR #68310)   Nikita Popov via llvm-commits
• [llvm] [ConstantRange] Handle `Intrinsic::ctpop` (PR #68310)   Nikita Popov via llvm-commits
• [llvm] [ConstantRange] Handle `Intrinsic::ctpop` (PR #68310)   Nikita Popov via llvm-commits
• [llvm] [ConstantRange] Handle `Intrinsic::ctpop` (PR #68310)   Nikita Popov via llvm-commits
• [llvm] [ConstantRange] Handle `Intrinsic::ctpop` (PR #68310)   Nikita Popov via llvm-commits
• [llvm] [ConstantRange] Handle `Intrinsic::ctpop` (PR #68310)   Nikita Popov via llvm-commits
• [llvm] [ConstantRange] Handle `Intrinsic::cttz` (PR #67917)   Nikita Popov via llvm-commits
• [llvm] 178270b - [GVN] Add additional captured before tests (NFC)   Nikita Popov via llvm-commits
• [llvm] [BasicAA] Make isNotCapturedBeforeOrAt() check for calls more precise (PR #69931)   Nikita Popov via llvm-commits
• [llvm] [BasicAA] Make isNotCapturedBeforeOrAt() check for calls more precise (PR #69931)   Nikita Popov via llvm-commits
• [llvm] [FunctionAttrs] Improve handling of alias-preserving intrinsic calls (PR #68453)   Nikita Popov via llvm-commits
• [llvm] [FunctionAttrs] Improve handling of alias-preserving intrinsic calls (PR #68453)   Nikita Popov via llvm-commits
• [llvm] [CVP] Flip signedness icmp predicate in use level (PR #69948)   Nikita Popov via llvm-commits
• [llvm] [CVP] Flip signedness icmp predicate in use level (PR #69948)   Nikita Popov via llvm-commits
• [llvm] [CVP] Flip signedness icmp predicate in use level (PR #69948)   Nikita Popov via llvm-commits
• [llvm] [IR] Use `const Type*` in DataLayout (PR #70009)   Nikita Popov via llvm-commits
• [llvm] [IR] Require that ptrmask mask matches pointer index size (PR #69343)   Nikita Popov via llvm-commits
• [llvm] [CVP] Flip signedness icmp predicate in use level (PR #69948)   Nikita Popov via llvm-commits
• [llvm] [CVP] Flip signedness icmp predicate in use level (PR #69948)   Nikita Popov via llvm-commits
• [llvm] [CVP] Flip signedness icmp predicate in use level (PR #69948)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] optimize powi(X,Y) * X with Ofast (PR #69998)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold selection between less than zero and one (PR #69961)   Nikita Popov via llvm-commits
• [llvm] [SimplifyCFG] Delete the unnecessary range check for small mask operation (PR #65835)   Nikita Popov via llvm-commits
• [llvm] [IR] Require index width to be ule pointer width (PR #70015)   Nikita Popov via llvm-commits
• [llvm] [IR] Require that ptrmask mask matches pointer index size (PR #69343)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] enable more factorization in SimplifyUsingDistributiveLaws (PR #69892)   Nikita Popov via llvm-commits
• [llvm] 97f1db2 - [LoopIdimo] Use tryZExtValue() instead of getZExtValue()   Nikita Popov via llvm-commits
• [llvm] [IR] Require index width to be ule pointer width (PR #70015)   Nikita Popov via llvm-commits
• [llvm] [IR] Require index width to be ule pointer width (PR #70015)   Nikita Popov via llvm-commits
• [llvm] [CVP] Flip signedness icmp predicate in use level (PR #69948)   Nikita Popov via llvm-commits
• [llvm] [CVP] Flip signedness icmp predicate in use level (PR #69948)   Nikita Popov via llvm-commits
• [llvm] 1a87bdd - [BasicAA] Update comment (NFC)   Nikita Popov via llvm-commits
• [llvm] [ValueTracking] Analyze `Select` in `isKnownNonEqual`. (PR #68427)   Nikita Popov via llvm-commits
• [llvm] [FunctionAttrs] Improve handling of alias-preserving intrinsic calls (PR #68453)   Nikita Popov via llvm-commits
• [llvm] [FunctionAttrs] Improve handling of alias-preserving intrinsic calls (PR #68453)   Nikita Popov via llvm-commits
• [llvm] [FunctionAttrs] Improve handling of alias-preserving intrinsic calls (PR #68453)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Extend Phi-Icmp use to include or (PR #67682)   Nikita Popov via llvm-commits
• [llvm] [Analysis] Add Scalable field in MemoryLocation.h (PR #69716)   Nikita Popov via llvm-commits
• [llvm] [Analysis] Add Scalable field in MemoryLocation.h (PR #69716)   Nikita Popov via llvm-commits
• [llvm] [Analysis] Add Scalable field in MemoryLocation.h (PR #69716)   Nikita Popov via llvm-commits
• [llvm] [Analysis] Add Scalable field in MemoryLocation.h (PR #69716)   Nikita Popov via llvm-commits
• [llvm] [Analysis] Add Scalable field in MemoryLocation.h (PR #69716)   Nikita Popov via llvm-commits
• [llvm] [SimplifyCFG] Improve FoldTwoEntryPHINode when one of phi values is undef (PR #69021)   Nikita Popov via llvm-commits
• [llvm] [Analysis] Add Scalable field in MemoryLocation.h (PR #69716)   Nikita Popov via llvm-commits
• [llvm] [DAG] SimplifyDemandedBits - ensure we demand the high bits for shl nsw/nuw ops (PR #70041)   Nikita Popov via llvm-commits
• [llvm] [DAG] SimplifyDemandedBits - ensure we demand the high bits for shl nsw/nuw ops (PR #70041)   Nikita Popov via llvm-commits
• [llvm] [Analysis] Add Scalable field in MemoryLocation.h (PR #69716)   Nikita Popov via llvm-commits
• [llvm] d3cf00b - [InstCombine] Remove some redundant select folds (NFCI)   Nikita Popov via llvm-commits
• [llvm] 34c33bb - [InstCombine] Remove redundant fold in foldSelectExtConst() (NFCI)   Nikita Popov via llvm-commits
• [llvm] 1a7061c - [InstCombine] Remove redundant logical select fold (NFCI)   Nikita Popov via llvm-commits
• [llvm] b901aca - [InstCombine] Remove unnecessary typed pointer fold (NFCI)   Nikita Popov via llvm-commits
• [llvm] 14b0ae4 - [InstCombine] Remove redundant fold in foldUnsignedUnderflowCheck() (NFCI)   Nikita Popov via llvm-commits
• [llvm] b5c4456 - [InstCombine] Remove redundant folds in foldCastedBitwiseLogic() (NFCI)   Nikita Popov via llvm-commits
• [llvm] 95e4ad3 - [InstCombine] Remove redundant add+and fold (NFCI)   Nikita Popov via llvm-commits
• [llvm] 6e3e21d - [InstCombine] Remove unnecessary removeBitcastsFromLoadStoreOnMinMax() fold (NFCI)   Nikita Popov via llvm-commits
• [llvm] [ValueTracking] isNonZero sub of ptr2int's with recursive GEP (PR #68680)   Nikita Popov via llvm-commits
• [llvm] [IR] Require index width to be ule pointer width (PR #70015)   Nikita Popov via llvm-commits
• [llvm] [AA][ScopedNoAliasAA] Returns ModRef when an alias exists (PR #70159)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Add combines/simplifications for `llvm.ptrmask` (PR #67166)   Nikita Popov via llvm-commits
• [llvm] [IR] Require index width to be ule pointer width (PR #70015)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Add combines/simplifications for `llvm.ptrmask` (PR #67166)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Add combines/simplifications for `llvm.ptrmask` (PR #67166)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Add combines/simplifications for `llvm.ptrmask` (PR #67166)   Nikita Popov via llvm-commits
• [llvm] 7df92fb - [InstCombine] Remove redundant icmp gep fold (NFCI)   Nikita Popov via llvm-commits
• [llvm] 3a39346 - [InstCombine] Remove unnecessary typed pointer handling (NFC)   Nikita Popov via llvm-commits
• [llvm] 4baeed8 - [InstCombine] Remove unnecessary handling of non-canonical predicates (NFCI)   Nikita Popov via llvm-commits
• [llvm] f386045 - [InstCombine] Test extra and use in processUMulZExtIdiom() fold (NFC)   Nikita Popov via llvm-commits
• [llvm] 82aeedc - [InstCombine] Remove unnecessary eq/ne handling from processUMulZExtIdiom() (NFCI)   Nikita Popov via llvm-commits
• [llvm] c912f88 - [InstCombine] Remove false commutativity from processUMulZExtIdiom() (NFCI)   Nikita Popov via llvm-commits
• [llvm] [AggressiveInstCombine] Ignore debug instructions when load combining (PR #70200)   Nikita Popov via llvm-commits
• [llvm] d9cfb82 - [AArch64] Add test for #70207 (NFC)   Nikita Popov via llvm-commits
• [llvm] [AggressiveInstCombine] Ignore debug instructions when load combining (PR #70200)   Nikita Popov via llvm-commits
• [llvm] [AArch64][GlobalISel] Fix incorrect ABI when tail call not supported (PR #70215)   Nikita Popov via llvm-commits
• [llvm] [ValueTracking] isNonZero sub of ptr2int's with recursive GEP (PR #68680)   Nikita Popov via llvm-commits
• [llvm] ea99df2 - [InstCombine] Rename some variables (NFC)   Nikita Popov via llvm-commits
• [llvm] Bfi precision (PR #66285)   Nikita Popov via llvm-commits
• [compiler-rt] Bfi precision (PR #66285)   Nikita Popov via llvm-commits
• [compiler-rt] Bfi precision (PR #66285)   Nikita Popov via llvm-commits
• [llvm] [ValueTracking] isNonZero sub of ptr2int's with recursive GEP (PR #68680)   Nikita Popov via llvm-commits
• [llvm] [AArch64][GlobalISel] Fix incorrect ABI when tail call not supported (PR #70215)   Nikita Popov via llvm-commits
• [llvm] [indvars] Missing variables at Og: (PR #69920)   Nikita Popov via llvm-commits
• [llvm] [AggressiveInstCombine] Ignore debug instructions when load combining (PR #70200)   Nikita Popov via llvm-commits
• [llvm] [MemDep] Use EarliestEscapeInfo (PR #69727)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold xored one-complemented operand comparisons (PR #69882)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold xored one-complemented operand comparisons (PR #69882)   Nikita Popov via llvm-commits
• [llvm] [IR] Require index width to be ule pointer width (PR #70015)   Nikita Popov via llvm-commits
• [llvm] [SimplifyCFG] Delete the unnecessary range check for small mask operation (PR #65835)   Nikita Popov via llvm-commits
• [llvm] cf3ac96 - [InstCombine] Add additional demanded bits tests for shifts (NFC)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold (a != 0) ? abs(a) : 0 (PR #70305)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Drop exact flag instead of increasing demanded bits (PR #70311)   Nikita Popov via llvm-commits
• [llvm] [DAG] SimplifyDemandedBits - ensure we demand the high bits for shl nsw/nuw ops (PR #70041)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Improve eq/ne by parts to handle ult/ugt equality pattern (PR #69884)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold (a != 0) ? abs(a) : 0 (PR #70305)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Drop exact flag instead of increasing demanded bits (PR #70311)   Nikita Popov via llvm-commits
• [llvm] 4638c29 - [InstSimplify] Remove redundant pointer icmp fold (NFCI)   Nikita Popov via llvm-commits
• [llvm] [SimplifyCFG] Delete the unnecessary range check for small mask operation (PR #65835)   Nikita Popov via llvm-commits
• [llvm] [InstSimplify] Fold (a != 0) ? abs(a) : 0 (PR #70305)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Simplify and/or of icmp eq with op replacement (PR #70335)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Simplify and/or of icmp eq with op replacement (PR #70335)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Simplify and/or of icmp eq with op replacement (PR #70335)   Nikita Popov via llvm-commits
• [polly] [InstCombine] Canonicalise SextADD + GEP (PR #69581)   Nikita Popov via llvm-commits
• [polly] [InstCombine] Canonicalise SextADD + GEP (PR #69581)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Canonicalise SextADD + GEP (PR #69581)   Nikita Popov via llvm-commits
• [polly] [InstCombine] Canonicalise SextADD + GEP (PR #69581)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Canonicalise ZextADD + GEP (PR #69818)   Nikita Popov via llvm-commits
• [llvm] [IR] Add zext nneg flag (PR #67982)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Simplify and/or of icmp eq with op replacement (PR #70335)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Simplify and/or of icmp eq with op replacement (PR #70335)   Nikita Popov via llvm-commits
• [llvm] ea1909f - [InstSimplify] Add tests for #69050 and #69091 (NFC)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Simplify and/or of icmp eq with op replacement (PR #70335)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Simplify and/or of icmp eq with op replacement (PR #70335)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Simplify and/or of icmp eq with op replacement (PR #70335)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Simplify and/or of icmp eq with op replacement (PR #70335)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Simplify and/or of icmp eq with op replacement (PR #70335)   Nikita Popov via llvm-commits
• [llvm] e4dc7d4 - [InstCombine] Remove redundant cast of GEP fold (NFC)   Nikita Popov via llvm-commits
• [llvm] [InstSimplify] Fold (a != 0) ? abs(a) : 0 (PR #70305)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Infer loop max trip count from memory accesses (PR #70361)   Nikita Popov via llvm-commits
• [llvm] [BasicAA] Add Vscale GEP decomposition on variable index (PR #69152)   Nikita Popov via llvm-commits
• [llvm] [IR] Add zext nneg flag (PR #67982)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Simplify and/or of icmp eq with op replacement (PR #70335)   Nikita Popov via llvm-commits
• [llvm] [ValueTracking] NFC: Allow tracking values through AddrSpaceCasts (PR #70483)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Add combines/simplifications for `llvm.ptrmask` (PR #67166)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Add folds for (icmp eq/ne (and (add/sub/xor A, P2), P2), 0/P2) (PR #67836)   Nikita Popov via llvm-commits
• [llvm] [SimplifyCFG] Reland transform for redirecting phis between unmergeable BB and SuccBB (PR #68473)   Nikita Popov via llvm-commits
• [llvm] [MemCpyOpt] Combine alias metadatas when replacing byval arguments (PR #70580)   Nikita Popov via llvm-commits
• [llvm] 5eb65ca - [OpenMP] Move function out of !NDEBUG section   Nikita Popov via llvm-commits
• [PATCH] D159283: Add intrinsic to count trailing zero elements in a vector   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D151187: [doc] Add casting style preference to coding standards   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D158081: [IR] Add writable attribute   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D158081: [IR] Add writable attribute   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D159283: Add intrinsic to count trailing zero elements in a vector   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156702: Add support for GEP of GEP instruction combining when types do not exactly match   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D149918: [InstCombine] Add oneuse checks to shr + cmp constant folds.   Nikita Popov via Phabricator via llvm-commits
• [llvm] [LV] Change loops' interleave count computation (PR #70141)   Nilanjana Basu via llvm-commits
• [llvm] [LV] Relax high loop trip count threshold for deciding to interleave a loop (PR #67725)   Nilanjana Basu via llvm-commits
• [llvm] [LV] Pre-committing tests for changing loop interleaving count computation (PR #70272)   Nilanjana Basu via llvm-commits
• [llvm] [LV] Change loops' interleave count computation (PR #70141)   Nilanjana Basu via llvm-commits
• [llvm] [LV] Change loops' interleave count computation (PR #70141)   Nilanjana Basu via llvm-commits
• [llvm] [LV] Relax high loop trip count threshold for deciding to interleave a loop (PR #67725)   Nilanjana Basu via llvm-commits
• [llvm] [LV] Relax high loop trip count threshold for deciding to interleave a loop (PR #67725)   Nilanjana Basu via llvm-commits
• [llvm] [LV] Relax high loop trip count threshold for deciding to interleave a loop (PR #67725)   Nilanjana Basu via llvm-commits
• [llvm] [LV] Relax high loop trip count threshold for deciding to interleave a loop (PR #67725)   Nilanjana Basu via llvm-commits
• [llvm] [LV] Relax high loop trip count threshold for deciding to interleave a loop (PR #67725)   Nilanjana Basu via llvm-commits
• [llvm] [LV] Relax high loop trip count threshold for deciding to interleave a loop (PR #67725)   Nilanjana Basu via llvm-commits
• [llvm] [LV] Relax high loop trip count threshold for deciding to interleave a loop (PR #67725)   Nilanjana Basu via llvm-commits
• [llvm] [LV] Change loops' interleave count computation (PR #70141)   Nilanjana Basu via llvm-commits
• [llvm] [LV] Relax high loop trip count threshold for deciding to interleave a loop (PR #67725)   Nilanjana Basu via llvm-commits
• [llvm] [LV] Relax high loop trip count threshold for deciding to interleave a loop (PR #67725)   Nilanjana Basu via llvm-commits
• [llvm] [LV] Pre-committing tests for changing loop interleaving count computation (PR #70272)   Nilanjana Basu via llvm-commits
• [llvm] [MLIR] Add SyclRuntimeWrapper (PR #69648)   Nishant Patel via llvm-commits
• [llvm] [MLIR] Add SyclRuntimeWrapper (PR #69648)   Nishant Patel via llvm-commits
• [llvm] [MLIR] Add SyclRuntimeWrapper (PR #69648)   Nishant Patel via llvm-commits
• [llvm] [MLIR] Add SyclRuntimeWrapper (PR #69648)   Nishant Patel via llvm-commits
• [llvm] 731bdce - [InstCombine] Add tests for folding (icmp eq/ne (and (add/sub/xor A, P2), P2), 0/P2); NFC   Noah Goldstein via llvm-commits
• [llvm] 0289dad - [InstCombine] Add folds for (icmp eq/ne (and (add/sub/xor A, P2), P2), 0/P2)   Noah Goldstein via llvm-commits
• [llvm] 5640d28 - [AArch64] Add test showing incorrect code-gen   Oliver Stannard via llvm-commits
• [llvm] 7e8eccd - [AArch64] Move SLS later in pass pipeline   Oliver Stannard via llvm-commits
• [llvm] 339faff - Revert "[AArch64] Move SLS later in pass pipeline"   Oliver Stannard via llvm-commits
• [PATCH] D158511: [AArch64] Move SLS later in pass pipeline   Oliver Stannard via Phabricator via llvm-commits
• [PATCH] D158512: [AArch64] Add test showing incorrect code-gen   Oliver Stannard via Phabricator via llvm-commits
• [PATCH] D158511: [AArch64] Move SLS later in pass pipeline   Oliver Stannard via Phabricator via llvm-commits
• [compiler-rt] Changes to support running tests for Windows arm64 asan (PR #66973)   Omair Javaid via llvm-commits
• [compiler-rt] Changes to support running tests for Windows arm64 asan (PR #66973)   Omair Javaid via llvm-commits
• [compiler-rt] Changes to support running tests for Windows arm64 asan (PR #66973)   Omair Javaid via llvm-commits
• [compiler-rt] Changes to support running tests for Windows arm64 asan (PR #66973)   Omair Javaid via llvm-commits
• [llvm] [lldb][AArch64] Read mte_ctrl register from core files (PR #69689)   Omair Javaid via llvm-commits
• [compiler-rt] Changes to support running tests for Windows arm64 asan (PR #66973)   Omair Javaid via llvm-commits
• [compiler-rt] Changes to support running tests for Windows arm64 asan (PR #66973)   Omair Javaid via llvm-commits
• [llvm] [SROA] Fix incorrect offsets for structured binding variables (PR #69007)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [SROA] Fix incorrect offsets for structured binding variables (PR #69007)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [AArch64] Stack probing for function prologues (PR #66524)   Oskar Wirga via llvm-commits
• [llvm] [CFI] Fix Direct Call Issues in CFI Dispatch Table (PR #69663)   Oskar Wirga via llvm-commits
• [llvm] [AArch64] Stack probing for function prologues (PR #66524)   Oskar Wirga via llvm-commits
• [llvm] [AArch64] Stack probing for function prologues (PR #66524)   Oskar Wirga via llvm-commits
• [llvm] [CFI] Fix Direct Call Issues in CFI Dispatch Table (PR #69663)   Oskar Wirga via llvm-commits
• [llvm] [CFI] Fix Direct Call Issues in CFI Dispatch Table (PR #69663)   Oskar Wirga via llvm-commits
• [llvm] [CFI] Fix Direct Call Issues in CFI Dispatch Table (PR #69663)   Oskar Wirga via llvm-commits
• [llvm] [clang-format] Don't break between string literal operands of << (PR #69871)   Owen Pan via llvm-commits
• [lld] [clang-format] Don't break between string literal operands of << (PR #69871)   Owen Pan via llvm-commits
• [compiler-rt] [clang-format] Don't break between string literal operands of << (PR #69871)   Owen Pan via llvm-commits
• [llvm] [clang-format] Don't break between string literal operands of << (PR #69871)   Owen Pan via llvm-commits
• [polly] bf05be5 - [polly] Reformat due to d68826dfbd98   Owen Pan via llvm-commits
• [PATCH] D150083: [clang-format] ObjCPropertyAttributeOrder to sort ObjC property attributes   Owen Pan via Phabricator via llvm-commits
• [PATCH] D150083: [clang-format] ObjCPropertyAttributeOrder to sort ObjC property attributes   Owen Pan via Phabricator via llvm-commits
• [PATCH] D150083: [clang-format] ObjCPropertyAttributeOrder to sort ObjC property attributes   Owen Pan via Phabricator via llvm-commits
• [PATCH] D150083: [clang-format] ObjCPropertyAttributeOrder to sort ObjC property attributes   Owen Pan via Phabricator via llvm-commits
• [llvm] Introduce DIExpressionOptimizer (PR #69769)   Paul T Robinson via llvm-commits
• [llvm] [docs] Improve README: point to office hours and online sync-ups (PR #69323)   Paul T Robinson via llvm-commits
• [llvm] [SVE][InstCombine] Fold ld1d and splice into ld1ro (PR #69565)   Paul Walker via llvm-commits
• [llvm] [SVE][InstCombine] Fold ld1d and splice into ld1ro (PR #69565)   Paul Walker via llvm-commits
• [llvm] [SVE][InstCombine] Fold ld1d and splice into ld1ro (PR #69565)   Paul Walker via llvm-commits
• [llvm] [SVE][InstCombine] Fold ld1d and splice into ld1ro (PR #69565)   Paul Walker via llvm-commits
• [llvm] [SVE][InstCombine] Fold ld1d and splice into ld1ro (PR #69565)   Paul Walker via llvm-commits
• [llvm] [SVE][InstCombine] Fold ld1d and splice into ld1ro (PR #69565)   Paul Walker via llvm-commits
• [llvm] [llvm][AArch64][Assembly]: Add FP8 instructions assembly and disassembly. (PR #69632)   Paul Walker via llvm-commits
• [llvm] [llvm][AArch64][Assembly]: Add FP8 instructions assembly and disassembly. (PR #69632)   Paul Walker via llvm-commits
• [llvm] [AArch64] Prevent argument promotion of vector with size > 128 bits (PR #70034)   Paul Walker via llvm-commits
• [llvm] [AArch64] Prevent argument promotion of vector with size > 128 bits (PR #70034)   Paul Walker via llvm-commits
• [llvm] [AArch64] Prevent argument promotion of vector with size > 128 bits (PR #70034)   Paul Walker via llvm-commits
• [llvm] [AArch64] Prevent argument promotion of vector with size > 128 bits (PR #70034)   Paul Walker via llvm-commits
• [llvm] [AArch64] Sink vscale calls into loops for better isel (PR #70304)   Paul Walker via llvm-commits
• [llvm] [AArch64] Sink vscale calls into loops for better isel (PR #70304)   Paul Walker via llvm-commits
• [llvm] [AArch64] Sink vscale calls into loops for better isel (PR #70304)   Paul Walker via llvm-commits
• [llvm] [AArch64] Sink vscale calls into loops for better isel (PR #70304)   Paul Walker via llvm-commits
• [llvm] [SVE] Fix incorrect offset calculation when rewriting an instruction's frame index. (PR #70315)   Paul Walker via llvm-commits
• [llvm] [SVE] Fix incorrect offset calculation when rewriting an instruction's frame index. (PR #70315)   Paul Walker via llvm-commits
• [llvm] [SVE] Fix incorrect offset calculation when rewriting an instruction's frame index. (PR #70315)   Paul Walker via llvm-commits
• [llvm] [ConstantHoisting] Add a TTI hook to prevent hoisting. (PR #69004)   Paul Walker via llvm-commits
• [llvm] [SVE] Fix incorrect offset calculation when rewriting an instruction's frame index. (PR #70315)   Paul Walker via llvm-commits
• [llvm] [SVE] Fix incorrect offset calculation when rewriting an instruction's frame index. (PR #70315)   Paul Walker via llvm-commits
• [llvm] [SVE] Fix incorrect offset calculation when rewriting an instruction's frame index. (PR #70315)   Paul Walker via llvm-commits
• [PATCH] D159283: Add intrinsic to count trailing zero elements in a vector   Paul Walker via Phabricator via llvm-commits
• [lld] [ELF] Suppress --no-allow-shlib-undefined diagnostic when a SharedSymbol is overridden by a hidden visibility Defined which is later discarded (PR #70130)   Peter Smith via llvm-commits
• [llvm] [AArch64,ELF] Restrict MOVZ/MOVK to non-PIC large code model (PR #70178)   Peter Smith via llvm-commits
• [llvm] [CMake] Correctly handle LLVM_ENABLE_RUNTIMES in targets (PR #69869)   Petr Hosek via llvm-commits
• [llvm] [CMake] Correctly handle LLVM_ENABLE_RUNTIMES in targets (PR #69869)   Petr Hosek via llvm-commits
• [llvm] [CMake] Correctly handle LLVM_ENABLE_RUNTIMES in targets (PR #69869)   Petr Hosek via llvm-commits
• [llvm] [CMake] Correctly handle LLVM_ENABLE_RUNTIMES in targets (PR #69869)   Petr Hosek via llvm-commits
• [llvm] fb619b3 - [CMake] Address the issue introduced in #69869   Petr Hosek via llvm-commits
• [llvm] [CMake] Correctly handle LLVM_ENABLE_RUNTIMES in targets (PR #69869)   Petr Hosek via llvm-commits
• [llvm] Improvements to RS4GC BDV Algorithm (PR #69795)   Petr Maj via llvm-commits
• [llvm] Improvements to RS4GC BDV Algorithm (PR #69795)   Petr Maj via llvm-commits
• [llvm] Improvements to RS4GC BDV Algorithm (PR #69795)   Petr Maj via llvm-commits
• [llvm] Improvements to RS4GC BDV Algorithm (PR #69795)   Petr Maj via llvm-commits
• [llvm] Improvements to RS4GC BDV Algorithm (PR #69795)   Petr Maj via llvm-commits
• [llvm] Improvements to RS4GC BDV Algorithm (PR #69795)   Petr Maj via llvm-commits
• [llvm] Improvements to RS4GC BDV Algorithm (PR #69795)   Petr Maj via llvm-commits
• [llvm] Improvements to RS4GC BDV Algorithm (PR #69795)   Petr Maj via llvm-commits
• [llvm] Improvements to RS4GC BDV Algorithm (PR #69795)   Petr Maj via llvm-commits
• [llvm] Improvements to RS4GC BDV Algorithm (PR #69795)   Petr Maj via llvm-commits
• [llvm] [RISCV] Allow swapped operands in reduction formation (PR #68634)   Philip Reames via llvm-commits
• [llvm] [RISCV][VSETVLI] Prefer VTYPE for immediate known to be less than VLMAX (PR #69759)   Philip Reames via llvm-commits
• [llvm] [RISCV][VSETVLI] Prefer VTYPE for immediate known to be less than VLMAX (PR #69759)   Philip Reames via llvm-commits
• [llvm] [RISCV][VSETVLI] Prefer VTYPE for immediate known to be less than VLMAX (PR #69759)   Philip Reames via llvm-commits
• [llvm] 17b2935 - Revert "[RISCV][InsertVSETVLI] Make VL preserving vsetvli emission more explicit [nfc]"   Philip Reames via llvm-commits
• [llvm] fa7c50d - [RISCV] Rename hasFixedResult to willVLBeAVL [nfc]   Philip Reames via llvm-commits
• [llvm] 717946f - Revert "[dsymutil] Add support for mergeable libraries"   Philip Reames via llvm-commits
• [llvm] 2732860 - [RISCV][InsertVSETVLI] Add Subtarget variable to class [nfc]   Philip Reames via llvm-commits
• [llvm] [RISCV][VSETVLI] Prefer VTYPE for immediate known to be less than VLMAX (PR #69759)   Philip Reames via llvm-commits
• [llvm] [RISCV] Be more aggressive about forming floating point constants (PR #68433)   Philip Reames via llvm-commits
• [llvm] [RISCV] Add an experimental pseudoinstruction to represent a rematerializable constant materialization sequence. (PR #69983)   Philip Reames via llvm-commits
• [llvm] [RISCV] Add an experimental pseudoinstruction to represent a rematerializable constant materialization sequence. (PR #69983)   Philip Reames via llvm-commits
• [llvm] [RISCV] Add an experimental pseudoinstruction to represent a rematerializable constant materialization sequence. (PR #69983)   Philip Reames via llvm-commits
• [llvm] [RISCV][GISel] Add FP calling convention support (PR #69138)   Philip Reames via llvm-commits
• [llvm] [RISCV][GISel] Add FP calling convention support (PR #69138)   Philip Reames via llvm-commits
• [llvm] [RISCV][GISel] Add FP calling convention support (PR #69138)   Philip Reames via llvm-commits
• [llvm] [RISCV][GISel] Add legalizer support for G_FADD/G_FSUB/G_FMUL/G_FDIV with F/D extensions. (PR #69804)   Philip Reames via llvm-commits
• [llvm] [RISCV][GISel] Add regbank selection for G_FADD/G_FSUB/G_FMUL/G_FDIV with F/D extensions. (PR #69805)   Philip Reames via llvm-commits
• [llvm] [RISCV][GISel] Add instruction selection for G_FADD/G_FSUB/G_FMUL/G_FDIV with F/D extensions. (PR #69808)   Philip Reames via llvm-commits
• [llvm] [RISCV] Remove RISCVISD opcodes for LGA, LA_TLS_IE, and LA_TLS_GD. (PR #70137)   Philip Reames via llvm-commits
• [llvm] [RISCV] Add tests for vmadd for VP intrinsics. NFC (PR #70042)   Philip Reames via llvm-commits
• [llvm] [RISCV] Keep same SEW/LMUL ratio if possible in forward transfer (PR #69788)   Philip Reames via llvm-commits
• [llvm] [RISCV] Keep same SEW/LMUL ratio if possible in forward transfer (PR #69788)   Philip Reames via llvm-commits
• [llvm] [RISCV] Keep same SEW/LMUL ratio if possible in forward transfer (PR #69788)   Philip Reames via llvm-commits
• [llvm] [RISCV] Keep same SEW/LMUL ratio if possible in forward transfer (PR #69788)   Philip Reames via llvm-commits
• [llvm] [RISCV] Keep same SEW/LMUL ratio if possible in forward transfer (PR #69788)   Philip Reames via llvm-commits
• [llvm] [RISCV] Keep same SEW/LMUL ratio if possible in forward transfer (PR #69788)   Philip Reames via llvm-commits
• [llvm] [RISCV] Keep same SEW/LMUL ratio if possible in forward transfer (PR #69788)   Philip Reames via llvm-commits
• [llvm] [RISCV] Add sched model for XiangShan-NanHu (PR #70232)   Philip Reames via llvm-commits
• [llvm] [RISCV] Macro-fusion support for veyron-v1 CPU. (PR #70012)   Philip Reames via llvm-commits
• [llvm] [RISCV] Macro-fusion support for veyron-v1 CPU. (PR #70012)   Philip Reames via llvm-commits
• [llvm] [RISCV] Macro-fusion support for veyron-v1 CPU. (PR #70012)   Philip Reames via llvm-commits
• [llvm] [RISCV] Macro-fusion support for veyron-v1 CPU. (PR #70012)   Philip Reames via llvm-commits
• [llvm] [RISCV] Macro-fusion support for veyron-v1 CPU. (PR #70012)   Philip Reames via llvm-commits
• [llvm] [RISCV] Macro-fusion support for veyron-v1 CPU. (PR #70012)   Philip Reames via llvm-commits
• [llvm] [RISCV][GISel] Add instruction selection for G_FADD/G_FSUB/G_FMUL/G_FDIV with F/D extensions. (PR #69808)   Philip Reames via llvm-commits
• [llvm] 3c2203a - [RISCV] Use a switch instead of a series of if-clauses [nfc]   Philip Reames via llvm-commits
• [llvm] 29181bd - Revert "[RISCV] Use a switch instead of a series of if-clauses [nfc]"   Philip Reames via llvm-commits
• [llvm] ca8d02d - [RISCV] Use a switch instead of a series of if-clauses [nfc] (try 2)   Philip Reames via llvm-commits
• [llvm] [RISCV] Keep same SEW/LMUL ratio if possible in forward transfer (PR #69788)   Philip Reames via llvm-commits
• [llvm] [RISCV] Keep same SEW/LMUL ratio if possible in forward transfer (PR #69788)   Philip Reames via llvm-commits
• [llvm] [RISCV] Keep same SEW/LMUL ratio if possible in forward transfer (PR #69788)   Philip Reames via llvm-commits
• [llvm] [RISCV] Keep same SEW/LMUL ratio if possible in forward transfer (PR #69788)   Philip Reames via llvm-commits
• [llvm] [RISCV] Extend InstSeq (used in constant mat) to support multiple live regs (PR #67159)   Philip Reames via llvm-commits
• [llvm] [RISCV] Be more aggressive about forming floating point constants (PR #68433)   Philip Reames via llvm-commits
• [llvm] [RISCV] Be more aggressive about forming floating point constants (PR #68433)   Philip Reames via llvm-commits
• [llvm] [RISCV] Be more aggressive about forming floating point constants (PR #68433)   Philip Reames via llvm-commits
• [llvm] [RISCV] Be more aggressive about forming floating point constants (PR #68433)   Philip Reames via llvm-commits
• [llvm] [InstSimplify] Fold (a != 0) ? abs(a) : 0 (PR #70305)   Philip Reames via llvm-commits
• [llvm] [RISCV] Begin moving post-isel vector peepholes to a MF pass (PR #70342)   Philip Reames via llvm-commits
• [llvm] [RISCV] Begin moving post-isel vector peepholes to a MF pass (PR #70342)   Philip Reames via llvm-commits
• [llvm] [RISCV] Begin moving post-isel vector peepholes to a MF pass (PR #70342)   Philip Reames via llvm-commits
• [llvm] [RISCV] Separate FPR and VR copyPhysReg implementation. (PR #70492)   Philip Reames via llvm-commits
• [llvm] [RISCV] Add copyPhysRegVector to extract common vector code out of copyPhysRegVector. (PR #70497)   Philip Reames via llvm-commits
• [llvm] [RISCV] Use RISCVInstrInfo::movImm to implement most of RISCVPostRAExpandPseudo::expandMovImm (PR #70389)   Philip Reames via llvm-commits
• [llvm] [RISCV] Reduce the number of parameters to copyPhysRegVector. NFC (PR #70502)   Philip Reames via llvm-commits
• [llvm] [X86][NFC] Reorder the registers to reduce unnecessary iterations (PR #70222)   Phoebe Wang via llvm-commits
• [llvm] [X86][NFC] Reorder the registers to reduce unnecessary iterations (PR #70222)   Phoebe Wang via llvm-commits
• [llvm] [X86][NFC] Reorder the registers to reduce unnecessary iterations (PR #70222)   Phoebe Wang via llvm-commits
• [llvm] [X86][NFC] Reorder the registers to reduce unnecessary iterations (PR #70222)   Phoebe Wang via llvm-commits
• [llvm] [X86][NFC] Reorder the registers to reduce unnecessary iterations (PR #70222)   Phoebe Wang via llvm-commits
• [llvm] [GISel] Restrict G_BSWAP to multiples of 16 bits. (PR #70245)   Phoebe Wang via llvm-commits
• [llvm] [X86][EVEX512] Do not allow 512-bit memcpy without EVEX512 (PR #70420)   Phoebe Wang via llvm-commits
• [llvm] [X86][EVEX512] Restrict attaching EVEX512 for default CPU only, NFCI (PR #65920)   Phoebe Wang via llvm-commits
• [llvm] [X86][EVEX512] Do not allow 512-bit memcpy without EVEX512 (PR #70420)   Phoebe Wang via llvm-commits
• [llvm] [X86][EVEX512] Do not allow 512-bit memcpy without EVEX512 (PR #70420)   Phoebe Wang via llvm-commits
• [llvm] [X86][EVEX512] Do not allow 512-bit memcpy without EVEX512 (PR #70420)   Phoebe Wang via llvm-commits
• [llvm] [X86][EVEX512] Do not allow 512-bit memcpy without EVEX512 (PR #70420)   Phoebe Wang via llvm-commits
• [llvm] [X86] Avoid returning the same shuffle operation for broadcast (PR #70592)   Phoebe Wang via llvm-commits
• [llvm] [X86] Avoid returning the same shuffle operation for broadcast (PR #70592)   Phoebe Wang via llvm-commits
• [llvm] [GlobalISel] Add `GITypeOf` special type (PR #66079)   Pierre van Houtryve via llvm-commits
• [llvm] [DAG] Constant Folding for U/SMUL_LOHI (PR #69437)   Pierre van Houtryve via llvm-commits
• [llvm] [GlobalISel] Add `GITypeOf` special type (PR #66079)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Use `S_BFE_U64` for uniform i1 ext (PR #69703)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Fold uniform readfirstlane + cndmask (PR #70188)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Use `S_BFE_U64` for uniform i1 ext (PR #69703)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Fold uniform readfirstlane + cndmask (PR #70188)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Fold uniform readfirstlane + cndmask (PR #70188)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Fold uniform readfirstlane + cndmask (PR #70188)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Use `S_BFE_U64` for uniform i1 ext (PR #69703)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Use `S_CSELECT` for uniform i1 ext (PR #69703)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Fold uniform readfirstlane + cndmask (PR #70188)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Fold uniform readfirstlane + cndmask (PR #70188)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Fold uniform readfirstlane + cndmask (PR #70188)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Fold uniform readfirstlane + cndmask (PR #70188)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Fold uniform readfirstlane + cndmask (PR #70188)   Pierre van Houtryve via llvm-commits
• [llvm] [GlobalISel] Add `GITypeOf` special type (PR #66079)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Use `S_CSELECT` for uniform i1 ext (PR #69703)   Pierre van Houtryve via llvm-commits
• [llvm] [InstCombine] Fold (a != 0) ? abs(a) : 0 (PR #70305)   Pierre van Houtryve via llvm-commits
• [llvm] [AArch64][GlobalISel] Adopt some Ld1Lane* patterns for GlobalISel to reduce codegen regressions (PR #69607)   Pierre van Houtryve via llvm-commits
• [llvm] [InstCombine] Fold (a != 0) ? abs(a) : 0 (PR #70305)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Fold uniform readfirstlane + cndmask (PR #70188)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Fold uniform readfirstlane + cndmask (PR #70188)   Pierre van Houtryve via llvm-commits
• [llvm] [InstCombine] Fold (a != 0) ? abs(a) : 0 (PR #70305)   Pierre van Houtryve via llvm-commits
• [llvm] [InstSimplify] Fold (a != 0) ? abs(a) : 0 (PR #70305)   Pierre van Houtryve via llvm-commits
• [llvm] [InstSimplify] Fold (a != 0) ? abs(a) : 0 (PR #70305)   Pierre van Houtryve via llvm-commits
• [llvm] [InstSimplify] Fold (a != 0) ? abs(a) : 0 (PR #70305)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Add an option to disable unsafe uses of atomic xor (PR #69229)   Pierre-Andre Saulais via llvm-commits
• [llvm] [AMDGPU] Add an option to disable unsafe uses of atomic xor (PR #69229)   Pierre-Andre Saulais via llvm-commits
• [llvm] [AMDGPU] Rematerialize scalar loads (PR #68778)   Piotr Sobczak via llvm-commits
• [llvm] [AMDGPU] Rematerialize scalar loads (PR #68778)   Piotr Sobczak via llvm-commits
• [llvm] [AMDGPU][wmma] - Add tied wmma intrinsic (PR #69903)   Piotr Sobczak via llvm-commits
• [llvm] [AMDGPU] Rematerialize scalar loads (PR #68778)   Piotr Sobczak via llvm-commits
• [llvm] [AMDGPU][wmma] - Add tied wmma intrinsic (PR #69903)   Piotr Sobczak via llvm-commits
• [llvm] 24865a6 - [Inline Spiller] Pre-commit test   Piotr Sobczak via llvm-commits
• [llvm] 80abbec - [Inline Spiller] Consider bundles when marking defs as dead   Piotr Sobczak via llvm-commits
• [PATCH] D156999: [Inline Spiller] Consider bundles when marking defs as dead   Piotr Sobczak via Phabricator via llvm-commits
• [llvm] Fix #35272: Don't replace typedefs in extern c scope (PR #69102)   Piotr Zegar via llvm-commits
• [llvm] Fix #35272: Don't replace typedefs in extern c scope (PR #69102)   Piotr Zegar via llvm-commits
• [llvm] [clang-tidy] Fix #68492: point to the correct const location (PR #69103)   Piotr Zegar via llvm-commits
• [llvm] [clang-tidy] Fix readability-avoid-const-params-in-decls - point to the correct const location (PR #69103)   Piotr Zegar via llvm-commits
• [llvm] [clang-tidy] Fix readability-avoid-const-params-in-decls - point to the correct const location (PR #69103)   Piotr Zegar via llvm-commits
• [llvm] [RISCV] RISC-V split register allocation and move vsetvl pass in between (PR #70549)   Piyou Chen via llvm-commits
• [compiler-rt] [builtins] Support building the 128-bit float functions on ld80 platforms (PR #68132)   Pranav Kant via llvm-commits
• [compiler-rt] [builtins] Avoid using long double in generic sources (PR #69754)   Pranav Kant via llvm-commits
• [llvm] [libcxx] Fixed uniform_real_distribution.h allowing initializing with non floating point types. (PR #70466)   Pranav Tatavarthy via llvm-commits
• [llvm] [libcxx] Fixed uniform_real_distribution.h allowing initializing with non floating point types. (PR #70466)   Pranav Tatavarthy via llvm-commits
• [llvm] [libcxx] Fixed uniform_real_distribution.h allowing initializing with non floating point types (PR #70468)   Pranav Tatavarthy via llvm-commits
• [llvm] [libc++] Fixed uniform_real_distribution.h where it was allowing initialization with non floating point types (PR #70485)   Pranav Tatavarthy via llvm-commits
• [llvm] [libc++] Fixed uniform_real_distribution.h where it was allowing initialization with non floating point types (PR #70485)   Pranav Tatavarthy via llvm-commits
• [llvm] [libc++] Fixed uniform_real_distribution.h where it was allowing initialization with non floating point types (PR #70485)   Pranav Tatavarthy via llvm-commits
• [compiler-rt] [Clang] Support target attr specifying CPU (PR #68678)   Qiu Chaofan via llvm-commits
• [compiler-rt] [PowerPC] Fix use of FPSCR builtins in smmintrin.h (PR #67299)   Qiu Chaofan via llvm-commits
• [llvm] [Clang][Sema] Skip RecordDecl when checking scope of declarations (PR #69432)   Qiu Chaofan via llvm-commits
• [llvm] [BasicBlockSections] Apply path cloning with -basic-block-sections. (PR #68860)   Rahman Lavaee via llvm-commits
• [llvm] [BasicBlockSections] Apply path cloning with -basic-block-sections. (PR #68860)   Rahman Lavaee via llvm-commits
• [llvm] [CodeLayout] Faster basic block reordering, ext-tsp (PR #68617)   Rahman Lavaee via llvm-commits
• [llvm] [CodeLayout] Faster basic block reordering, ext-tsp (PR #68617)   Rahman Lavaee via llvm-commits
• [llvm] [BasicBlockSections] Apply path cloning with -basic-block-sections. (PR #68860)   Rahman Lavaee via llvm-commits
• [llvm] [BasicBlockSections] Apply path cloning with -basic-block-sections. (PR #68860)   Rahman Lavaee via llvm-commits
• [llvm] [BasicBlockSections] Apply path cloning with -basic-block-sections. (PR #68860)   Rahman Lavaee via llvm-commits
• [llvm] [BasicBlockSections] Apply path cloning with -basic-block-sections. (PR #68860)   Rahman Lavaee via llvm-commits
• [llvm] [BasicBlockSections] Apply path cloning with -basic-block-sections. (PR #68860)   Rahman Lavaee via llvm-commits
• [llvm] [BasicBlockSections] Apply path cloning with -basic-block-sections. (PR #68860)   Rahman Lavaee via llvm-commits
• [llvm] [BasicBlockSections] Apply path cloning with -basic-block-sections. (PR #68860)   Rahman Lavaee via llvm-commits
• [llvm] [BasicBlockSections] Apply path cloning with -basic-block-sections. (PR #68860)   Rahman Lavaee via llvm-commits
• [llvm] [CodeLayout] Faster basic block reordering, ext-tsp (PR #68617)   Rahman Lavaee via llvm-commits
• [llvm] [BasicBlockSections] Apply path cloning with -basic-block-sections. (PR #68860)   Rahman Lavaee via llvm-commits
• [llvm] [BasicBlockSections] Apply path cloning with -basic-block-sections. (PR #68860)   Rahman Lavaee via llvm-commits
• [llvm] [BasicBlockSections] Apply path cloning with -basic-block-sections. (PR #68860)   Rahman Lavaee via llvm-commits
• [llvm] [BasicBlockSections] Apply path cloning with -basic-block-sections. (PR #68860)   Rahman Lavaee via llvm-commits
• [llvm] [BasicBlockSections] Apply path cloning with -basic-block-sections. (PR #68860)   Rahman Lavaee via llvm-commits
• [llvm] [BasicBlockSections] Apply path cloning with -basic-block-sections. (PR #68860)   Rahman Lavaee via llvm-commits
• [llvm] [BasicBlockSections] Apply path cloning with -basic-block-sections. (PR #68860)   Rahman Lavaee via llvm-commits
• [llvm] [BasicBlockSections] Apply path cloning with -basic-block-sections. (PR #68860)   Rahman Lavaee via llvm-commits
• [llvm] [BasicBlockSections] Apply path cloning with -basic-block-sections. (PR #68860)   Rahman Lavaee via llvm-commits
• [compiler-rt] [builtins] Convert more int to fp functions to use common implementation (PR #67540)   Rainer Orth via llvm-commits
• [compiler-rt] [builtins] Convert more int to fp functions to use common implementation (PR #67540)   Rainer Orth via llvm-commits
• [compiler-rt] [builtins] Fix floattitf.c etc. compilation on Solaris/SPARC (PR #70058)   Rainer Orth via llvm-commits
• [compiler-rt] [builtins] Fix floattitf.c etc. compilation on Solaris/SPARC (PR #70058)   Rainer Orth via llvm-commits
• [compiler-rt] [builtins] Fix floattitf.c etc. compilation on Solaris/SPARC (PR #70058)   Rainer Orth via llvm-commits
• [compiler-rt] [builtins] Fix floattitf.c etc. compilation on Solaris/SPARC (PR #70058)   Rainer Orth via llvm-commits
• [llvm] fix: asan support aarch64be (PR #70536)   Rainer Orth via llvm-commits
• [llvm] SLP/RISCV: add negative test for llrint, increase coverage (PR #69940)   Ramkumar Ramachandra via llvm-commits
• [llvm] SLPVectorizer: vectorize lrint, llrint (PR #69945)   Ramkumar Ramachandra via llvm-commits
• [llvm] SLPVectorizer: vectorize lrint, llrint (PR #69945)   Ramkumar Ramachandra via llvm-commits
• [llvm] SLPVectorizer: vectorize lrint, llrint (PR #69945)   Ramkumar Ramachandra via llvm-commits
• [llvm] LoopVectorize/test: clean up intrinsic.ll, regen using UTC (NFC) (PR #70202)   Ramkumar Ramachandra via llvm-commits
• [llvm] Scalarizer: add negative test for lrint, llrint (PR #70203)   Ramkumar Ramachandra via llvm-commits
• [llvm] SLP/RISCV: add negative test for llrint, increase coverage (PR #69940)   Ramkumar Ramachandra via llvm-commits
• [llvm] SLP/RISCV: add negative test for llrint, increase coverage (PR #69940)   Ramkumar Ramachandra via llvm-commits
• [llvm] SLP/RISCV: add negative test for llrint, increase coverage (PR #69940)   Ramkumar Ramachandra via llvm-commits
• [llvm] LoopVectorize: add negative test for lrint, llrint (PR #70211)   Ramkumar Ramachandra via llvm-commits
• [llvm] SLP/RISCV: add negative test for llrint, increase coverage (PR #69940)   Ramkumar Ramachandra via llvm-commits
• [llvm] Scalarizer: add negative test for lrint, llrint (PR #70203)   Ramkumar Ramachandra via llvm-commits
• [llvm] LoopVectorize/test: clean up intrinsic.ll, regen using UTC (NFC) (PR #70202)   Ramkumar Ramachandra via llvm-commits
• [llvm] LoopVectorize/test: clean up intrinsic.ll, regen using UTC (NFC) (PR #70202)   Ramkumar Ramachandra via llvm-commits
• [llvm] LoopVectorize/test: add missing CHECK lines, cleanup intrinsic.ll (PR #70202)   Ramkumar Ramachandra via llvm-commits
• [llvm] LoopVectorize/test: add missing CHECK lines, cleanup intrinsic.ll (PR #70202)   Ramkumar Ramachandra via llvm-commits
• [llvm] LoopVectorize: add negative test for lrint, llrint (PR #70211)   Ramkumar Ramachandra via llvm-commits
• [llvm] LoopVectorize/test: add missing CHECK lines, cleanup intrinsic.ll (PR #70202)   Ramkumar Ramachandra via llvm-commits
• [llvm] LoopVectorize/test: add missing CHECK lines, cleanup intrinsic.ll (PR #70202)   Ramkumar Ramachandra via llvm-commits
• [llvm] LoopVectorize/test: add missing CHECK lines, cleanup intrinsic.ll (PR #70202)   Ramkumar Ramachandra via llvm-commits
• [lld] [lld][COFF]Expose UnifiedLTO options (PR #69904)   Reid Kleckner via llvm-commits
• [compiler-rt] [Bazel][Clang Tidy] Include builtin headers with clang-tidy (PR #67626)   Reid Kleckner via llvm-commits
• [llvm] [Bazel][Clang Tidy] Include builtin headers with clang-tidy (PR #67626)   Reid Kleckner via llvm-commits
• [llvm] [Linker] Do not keep a private member of a non-prevailing comdat group (PR #69143)   Reid Kleckner via llvm-commits
• [llvm] [Linker] Do not keep a private member of a non-prevailing comdat group (PR #69143)   Reid Kleckner via llvm-commits
• [llvm] [Linker] Do not keep a private member of a non-prevailing comdat group (PR #69143)   Reid Kleckner via llvm-commits
• [lld] [LLD] [MinGW] Hook up --icf=safe to -opt:safeicf (PR #70037)   Reid Kleckner via llvm-commits
• [lld] [lld][COFF]Expose UnifiedLTO and PassPipeline Options (PR #69904)   Reid Kleckner via llvm-commits
• [lld] [lld][COFF]Expose UnifiedLTO and PassPipeline Options (PR #69904)   Reid Kleckner via llvm-commits
• [lld] [lld][COFF]Expose UnifiedLTO and PassPipeline Options (PR #69904)   Reid Kleckner via llvm-commits
• [lld] [lld][COFF]Expose UnifiedLTO and PassPipeline Options (PR #69904)   Reid Kleckner via llvm-commits
• [lld] [lld][COFF]Expose UnifiedLTO and PassPipeline Options (PR #69904)   Reid Kleckner via llvm-commits
• [llvm] [X86] Print 'l' section flag for SHF_X86_64_LARGE (PR #70380)   Reid Kleckner via llvm-commits
• [llvm] [Linker] Do not keep a private member of a non-prevailing comdat group (PR #69143)   Reid Kleckner via llvm-commits
• [llvm] [Linker] Do not keep a private member of a non-prevailing comdat group (PR #69143)   Reid Kleckner via llvm-commits
• [llvm] [Linker] Do not keep a private member of a non-prevailing comdat group (PR #69143)   Reid Kleckner via llvm-commits
• [llvm] [Linker] Do not keep a private member of a non-prevailing comdat group (PR #69143)   Reid Kleckner via llvm-commits
• [llvm] [Linker] Do not keep a private member of a non-prevailing comdat group (PR #69143)   Reid Kleckner via llvm-commits
• [llvm] [Linker] Do not keep a private member of a non-prevailing comdat group (PR #69143)   Reid Kleckner via llvm-commits
• [llvm] [Linker] Do not keep a private member of a non-prevailing comdat group (PR #69143)   Reid Kleckner via llvm-commits
• [llvm] [X86] Print 'l' section flag for SHF_X86_64_LARGE (PR #70380)   Reid Kleckner via llvm-commits
• [llvm] [mlir] Verify TestBuiltinAttributeInterfaces eltype (PR #69878)   Rik Huijzer via llvm-commits
• [compiler-rt] [mlir] Verify TestBuiltinAttributeInterfaces eltype (PR #69878)   Rik Huijzer via llvm-commits
• [polly] [mlir] Verify TestBuiltinAttributeInterfaces eltype (PR #69878)   Rik Huijzer via llvm-commits
• [lld] [mlir] Verify TestBuiltinAttributeInterfaces eltype (PR #69878)   Rik Huijzer via llvm-commits
• [llvm] [TOSA] Add TosaToMLProgram conversion (PR #69787)   Rob Suderman via llvm-commits
• [llvm] [TOSA] Add TosaToMLProgram conversion (PR #69787)   Rob Suderman via llvm-commits
• [llvm] [TOSA] Add TosaToMLProgram conversion (PR #69787)   Rob Suderman via llvm-commits
• [llvm] [TOSA] Add TosaToMLProgram conversion (PR #69787)   Rob Suderman via llvm-commits
• [llvm] [TOSA] Add TosaToMLProgram conversion (PR #69787)   Rob Suderman via llvm-commits
• [llvm] [TOSA] Add TosaToMLProgram conversion (PR #69787)   Rob Suderman via llvm-commits
• [llvm] [RISCV] Implement cross basic block VXRM write insertion. (PR #70382)   Roger Ferrer Ibáñez via llvm-commits
• [llvm] [RISCV] Implement cross basic block VXRM write insertion. (PR #70382)   Roger Ferrer Ibáñez via llvm-commits
• [llvm] [RISCV] Implement cross basic block VXRM write insertion. (PR #70382)   Roger Ferrer Ibáñez via llvm-commits
• [llvm] [RISCV] Implement cross basic block VXRM write insertion. (PR #70382)   Roger Ferrer Ibáñez via llvm-commits
• [llvm] [RISCV] Implement cross basic block VXRM write insertion. (PR #70382)   Roger Ferrer Ibáñez via llvm-commits
• [compiler-rt] [NFC][lsan] Extract and rename SizeClassMap type from AP64 (PR #69526)   Roland McGrath via llvm-commits
• [compiler-rt] [compiler-rt][lsan][Fuchsia] Adjust lsan allocator settings (PR #69401)   Roland McGrath via llvm-commits
• [llvm] [AMDGPU] Add documentation for scheduler intrinsics (PR #69854)   Roopa Malavally via llvm-commits
• [llvm] [Workflow] Expand code-format-helper.py error reporting (PR #69686)   Ryan Prichard via llvm-commits
• [llvm] [Workflow] Expand code-format-helper.py error reporting (PR #69686)   Ryan Prichard via llvm-commits
• [llvm] [Workflow] Expand code-format-helper.py error reporting (PR #69686)   Ryan Prichard via llvm-commits
• [llvm] [Workflow] Expand code-format-helper.py error reporting (PR #69686)   Ryan Prichard via llvm-commits
• [compiler-rt] [Fuzzer] Enable custom libc++ for Android (PR #70407)   Ryan Prichard via llvm-commits
• [compiler-rt] [Fuzzer] Enable custom libc++ for Android (PR #70407)   Ryan Prichard via llvm-commits
• [compiler-rt] [Fuzzer] Enable custom libc++ for Android (PR #70407)   Ryan Prichard via llvm-commits
• [compiler-rt] [Fuzzer] Enable custom libc++ for Android (PR #70407)   Ryan Prichard via llvm-commits
• [compiler-rt] [compiler-rt][builtins] Switch to using __builtin_memcpy_inline (PR #69784)   Saleem Abdulrasool via llvm-commits
• [compiler-rt] [compiler-rt][builtins] Switch to using __builtin_memcpy_inline (PR #69784)   Saleem Abdulrasool via llvm-commits
• [llvm] StackProtector: use isInTailCallPosition to verify tail call position (PR #68997)   Saleem Abdulrasool via llvm-commits
• [llvm] StackProtector: use isInTailCallPosition to verify tail call position (PR #68997)   Saleem Abdulrasool via llvm-commits
• [llvm] StackProtector: use isInTailCallPosition to verify tail call position (PR #68997)   Saleem Abdulrasool via llvm-commits
• [llvm] [LowerGlobalDtors] Skip __cxa_atexit call completely when arg0 is unused (PR #68758)   Sam Clegg via llvm-commits
• [llvm] [clangd] Support square bracket escaping in Annotations (PR #69379)   Sam McCall via llvm-commits
• [llvm] [AArch64] Don't generate st2 for 64bit store that can use stp (PR #69901)   Sam Tebbs via llvm-commits
• [llvm] [ARM] Disable UpperBound loop unrolling for MVE tail predicated loops. (PR #69709)   Sam Tebbs via llvm-commits
• [llvm] [AArch64][SME] Remove immediate argument restriction for svldr and svstr (PR #68565)   Sam Tebbs via llvm-commits
• [llvm] [AArch64][SME] Remove immediate argument restriction for svldr and svstr (PR #68565)   Sam Tebbs via llvm-commits
• [llvm] [AArch64][SME] Remove immediate argument restriction for svldr and svstr (PR #68565)   Sam Tebbs via llvm-commits
• [llvm] [SVE] Fix incorrect offset calculation when rewriting an instruction's frame index. (PR #70315)   Sander de Smalen via llvm-commits
• [llvm] [SVE] Fix incorrect offset calculation when rewriting an instruction's frame index. (PR #70315)   Sander de Smalen via llvm-commits
• [llvm] [MLIR] Update convert-gpu-to-spirv pass to prepare using GPU compilat… (PR #69941)   Sang Ik Lee via llvm-commits
• [llvm] [MLIR] Update convert-gpu-to-spirv pass to prepare using GPU compilat… (PR #69941)   Sang Ik Lee via llvm-commits
• [llvm] [MLIR] Update convert-gpu-to-spirv pass to prepare using GPU compilat… (PR #69941)   Sang Ik Lee via llvm-commits
• [llvm] [MLIR] Update convert-gpu-to-spirv pass to prepare using GPU compilat… (PR #69941)   Sang Ik Lee via llvm-commits
• [llvm] [MLIR] Update convert-gpu-to-spirv pass to prepare using GPU compilat… (PR #69941)   Sang Ik Lee via llvm-commits
• [llvm] [AMDGPU] - Add s_bitreplicate intrinsic (PR #69209)   Sebastian Neubauer via llvm-commits
• [llvm] [AMDGPU] - Add s_bitreplicate intrinsic (PR #69209)   Sebastian Neubauer via llvm-commits
• [llvm] [LLVM-C] Add LLVMCreateTargetMachineWithABI (PR #68406)   Sebastian Poeplau via llvm-commits
• [llvm] [LLVM-C] Add LLVMCreateTargetMachineWithABI (PR #68406)   Sebastian Poeplau via llvm-commits
• [llvm] [LLVM-C] Add LLVMCreateTargetMachineWithABI (PR #68406)   Sebastian Poeplau via llvm-commits
• [llvm] [LLVM-C] Add LLVMCreateTargetMachineWithABI (PR #68406)   Sebastian Poeplau via llvm-commits
• [llvm] [LLVM-C] Add LLVMCreateTargetMachineWithABI (PR #68406)   Sebastian Poeplau via llvm-commits
• [llvm] [LLVM-C] Add LLVMCreateTargetMachineWithABI (PR #68406)   Sebastian Poeplau via llvm-commits
• [llvm] [llvm-symbolizer] nfc, use map instead of vector (PR #69552)   Serge Pavlov via llvm-commits
• [llvm] [test] Align behavior of interrupts.test on different platforms (PR #68556)   Serge Pavlov via llvm-commits
• [llvm] [test] Align behavior of interrupts.test on different platforms (PR #68556)   Serge Pavlov via llvm-commits
• [llvm] [Clang] Ensure zero-init is not overridden when initializing a base class in a constant expression context (PR #70150)   Shafik Yaghmour via llvm-commits
• [compiler-rt] [Clang] Ensure zero-init is not overridden when initializing a base class in a constant expression context (PR #70150)   Shafik Yaghmour via llvm-commits
• [llvm] [Clang] Ensure zero-init is not overridden when initializing a base class in a constant expression context (PR #70150)   Shafik Yaghmour via llvm-commits
• [compiler-rt] [Clang] Ensure zero-init is not overridden when initializing a base class in a constant expression context (PR #70150)   Shafik Yaghmour via llvm-commits
• [llvm] [Clang] Ensure zero-init is not overridden when initializing a base class in a constant expression context (PR #70150)   Shafik Yaghmour via llvm-commits
• [llvm] [RISCV] Correct copyPhysReg for GPRPF64. (PR #70419)   Shao-Ce SUN via llvm-commits
• [llvm] [RISCV] Correct copyPhysReg for GPRPF64. (PR #70419)   Shao-Ce SUN via llvm-commits
• [llvm] [X86][NFC] Reorder the registers to reduce unnecessary iterations (PR #70222)   Shengchen Kan via llvm-commits
• [llvm] [X86][NFC] Reorder the registers to reduce unnecessary iterations (PR #70222)   Shengchen Kan via llvm-commits
• [llvm] [X86][NFC] Reorder the registers to reduce unnecessary iterations (PR #70222)   Shengchen Kan via llvm-commits
• [llvm] [X86][NFC] Reorder the registers to reduce unnecessary iterations (PR #70222)   Shengchen Kan via llvm-commits
• [llvm] [X86][NFC] Reorder the registers to reduce unnecessary iterations (PR #70222)   Shengchen Kan via llvm-commits
• [llvm] [X86][NFC] Reorder the registers to reduce unnecessary iterations (PR #70222)   Shengchen Kan via llvm-commits
• [llvm] [X86][NFC] Reorder the registers to reduce unnecessary iterations (PR #70222)   Shengchen Kan via llvm-commits
• [llvm] [X86][NFC] Reorder the registers to reduce unnecessary iterations (PR #70222)   Shengchen Kan via llvm-commits
• [llvm] [X86][NFC] Reorder the registers to reduce unnecessary iterations (PR #70222)   Shengchen Kan via llvm-commits
• [llvm] [X86][NFC] Reorder the registers to reduce unnecessary iterations (PR #70222)   Shengchen Kan via llvm-commits
• [llvm] [X86][NFC] Reorder the registers to reduce unnecessary iterations (PR #70222)   Shengchen Kan via llvm-commits
• [llvm] [X86][NFC] Reorder the registers to reduce unnecessary iterations (PR #70222)   Shengchen Kan via llvm-commits
• [llvm] [X86][NFC] Reorder the registers to reduce unnecessary iterations (PR #70222)   Shengchen Kan via llvm-commits
• [llvm] [X86][NFC] Reorder the registers to reduce unnecessary iterations (PR #70222)   Shengchen Kan via llvm-commits
• [llvm] [X86][NFC] Reorder the registers to reduce unnecessary iterations (PR #70222)   Shengchen Kan via llvm-commits
• [llvm] [X86][NFC] Reorder the registers to reduce unnecessary iterations (PR #70222)   Shengchen Kan via llvm-commits
• [llvm] [X86][NFC] Reorder the registers to reduce unnecessary iterations (PR #70222)   Shengchen Kan via llvm-commits
• [llvm] [X86][NFC] Reorder the registers to reduce unnecessary iterations (PR #70222)   Shengchen Kan via llvm-commits
• [llvm] [X86][EVEX512] Do not allow 512-bit memcpy without EVEX512 (PR #70420)   Shengchen Kan via llvm-commits
• [llvm] [X86][EVEX512] Do not allow 512-bit memcpy without EVEX512 (PR #70420)   Shengchen Kan via llvm-commits
• [llvm] [X86][EVEX512] Do not allow 512-bit memcpy without EVEX512 (PR #70420)   Shengchen Kan via llvm-commits
• [llvm] [X86][NFC] Reorder the registers to reduce unnecessary iterations (PR #70222)   Shengchen Kan via llvm-commits
• [llvm] [X86][NFC] Reorder the registers to reduce unnecessary iterations (PR #70222)   Shengchen Kan via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Shih-Po Hung via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   Shih-Po Hung via llvm-commits
• [llvm] [OpenMP] Introduce support for OMPX extensions and taskgraph frontend (PR #66919)   Shilei Tian via llvm-commits
• [llvm] [OpenMP] Introduce support for OMPX extensions and taskgraph frontend (PR #66919)   Shilei Tian via llvm-commits
• [llvm] [OpenMP] Introduce support for OMPX extensions and taskgraph frontend (PR #66919)   Shilei Tian via llvm-commits
• [llvm] [OpenMP] Introduce support for OMPX extensions and taskgraph frontend (PR #66919)   Shilei Tian via llvm-commits
• [llvm] [Offloading][NFC] Move creation of offloading entries from OpenMP (PR #70116)   Shilei Tian via llvm-commits
• [llvm] [SCEV] Infer loop max trip count from memory accesses (PR #70361)   Shilei Tian via llvm-commits
• [llvm] [SCEV] Infer loop max trip count from memory accesses (PR #70361)   Shilei Tian via llvm-commits
• [llvm] [OpenMP] Unify the min/max thread/teams pathways (PR #70273)   Shilei Tian via llvm-commits
• [llvm] [OpenMP] Unify the min/max thread/teams pathways (PR #70273)   Shilei Tian via llvm-commits
• [llvm] [SCEV] Infer loop max trip count from memory accesses (PR #70361)   Shilei Tian via llvm-commits
• [llvm] [OpenMP] Unify the min/max thread/teams pathways (PR #70273)   Shilei Tian via llvm-commits
• [PATCH] D155049: [ScalarEvolution] Infer loop max trip count from memory accesses   Shilei Tian via Phabricator via llvm-commits
• [PATCH] D155049: [ScalarEvolution] Infer loop max trip count from memory accesses   Shilei Tian via Phabricator via llvm-commits
• [llvm] [Docs][LTO] Updated HowToSubmitABug.rst for LTO crashes (PR #68389)   Shivam Gupta via llvm-commits
• [llvm] [Docs][LTO] Updated HowToSubmitABug.rst for LTO crashes (PR #68389)   Shivam Gupta via llvm-commits
• [llvm] [CMake] Correctly handle LLVM_ENABLE_RUNTIMES in targets (PR #69869)   Shoaib Meenai via llvm-commits
• [llvm] [CMake] Correctly handle LLVM_ENABLE_RUNTIMES in targets (PR #69869)   Shoaib Meenai via llvm-commits
• [llvm] [CMake] Correctly handle LLVM_ENABLE_RUNTIMES in targets (PR #69869)   Shoaib Meenai via llvm-commits
• [compiler-rt] [Fuzzer] Enable custom libc++ for Android (PR #70407)   Shoaib Meenai via llvm-commits
• [llvm] Introduce DIExpressionOptimizer (PR #69769)   Shubham Sandeep Rastogi via llvm-commits
• [PATCH] D156702: Add support for GEP of GEP instruction combining when types do not exactly match   Simeon Krastnikov via Phabricator via llvm-commits
• [llvm] SLPVectorizer: vectorize lrint, llrint (PR #69945)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Add special handling for truncating shuffles (PR #70013)   Simon Pilgrim via llvm-commits
• [llvm] f2eef3f - [DAG] Add test case for Issue #69965   Simon Pilgrim via llvm-commits
• [llvm] [DAG] SimplifyDemandedBits - ensure we demand the high bits for shl nsw/nuw ops (PR #70041)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] SimplifyDemandedBits - ensure we demand the high bits for shl nsw/nuw ops (PR #70041)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] SimplifyDemandedBits - ensure we demand the high bits for shl nsw/nuw ops (PR #70041)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] SimplifyDemandedBits - ensure we demand the high bits for shl nsw/nuw ops (PR #70041)   Simon Pilgrim via llvm-commits
• [llvm] 2df69ed - [X86] Add scalar isel test coverage for AND/OR/XOR types   Simon Pilgrim via llvm-commits
• [llvm] [DAG] SimplifyDemandedBits - ensure we demand the high bits for shl nsw/nuw ops (PR #70041)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Lower mathlib call ldexp into scalef when avx512 is enabled (PR #69710)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Lower mathlib call ldexp into scalef when avx512 is enabled (PR #69710)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Lower mathlib call ldexp into scalef when avx512 is enabled (PR #69710)   Simon Pilgrim via llvm-commits
• [llvm] a8913f8 - [X86] Regenerate pr38539.ll   Simon Pilgrim via llvm-commits
• [llvm] ac534d2 - [X86] combineArithReduction - use PACKUSWB directly for PSADBW(TRUNCATE(v8i16 X)) reduction patterns   Simon Pilgrim via llvm-commits
• [llvm] c9c9bf0 - [DAG] WidenVectorOperand - add basic handling for *_EXTEND_VECTOR_INREG nodes   Simon Pilgrim via llvm-commits
• [llvm] [X86][GlobalISel] Add legalization of 64-bit G_ICMP for i686 (PR #69478)   Simon Pilgrim via llvm-commits
• [llvm] [X86][NFC] Reorder the registers to reduce unnecessary iterations (PR #70222)   Simon Pilgrim via llvm-commits
• [llvm] c60bd0e - [X86] Regenerate select-mmx.ll   Simon Pilgrim via llvm-commits
• [llvm] [DAG] SimplifyDemandedBits - ensure we demand the high bits for shl nsw/nuw ops (PR #70041)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] SimplifyDemandedBits - ensure we demand the high bits for shl nsw/nuw ops (PR #70041)   Simon Pilgrim via llvm-commits
• [llvm] 12dfcc0 - [DAG] Update test case for Issue #69965   Simon Pilgrim via llvm-commits
• [llvm] 547dc46 - [DAG] SimplifyDemandedBits - ensure we drop NSW/NUW flags when we simplify a SHL node's input   Simon Pilgrim via llvm-commits
• [llvm] [DAG] SimplifyDemandedBits - ensure we demand the high bits for shl nsw/nuw ops (PR #70041)   Simon Pilgrim via llvm-commits
• [llvm] [InstCombine] Drop exact flag instead of increasing demanded bits (PR #70311)   Simon Pilgrim via llvm-commits
• [llvm] [VP] Check if VP ops with functional intrinsics are speculatable (PR #69504)   Simon Pilgrim via llvm-commits
• [llvm] 585da26 - [SLP][X86] Regenerate hadd/hsub tests with full set of check-prefixes   Simon Pilgrim via llvm-commits
• [llvm] aaabf50 - [AArch64] Regenerate tests to show missing constant comments   Simon Pilgrim via llvm-commits
• [llvm] 13a3494 - [AArch64] Regenerate addr-of-ret-addr.ll   Simon Pilgrim via llvm-commits
• [llvm] Enable exp10 libcall on linux (PR #68736)   Simon Pilgrim via llvm-commits
• [llvm] 37d9dc4 - [X86] Add test case for Issue #66150   Simon Pilgrim via llvm-commits
• [llvm] [X86] Avoid returning the same shuffle operation for broadcast (PR #70592)   Simon Pilgrim via llvm-commits
• [llvm] d96529a - [DAG] Attempt shl narrowing in SimplifyDemandedBits (REAPPLIED)   Simon Pilgrim via llvm-commits
• [llvm] 64ed116 - [ASan] aarch64be.ll - fix missing aarch64-registered-target requirement and incorrect passes list   Simon Pilgrim via llvm-commits
• [llvm] 8d2efd7 - [DAG] Avoid ComputeNumSignBits call when we know the result is unsigned   Simon Pilgrim via llvm-commits
• [llvm] [CodeGen] Add a helper class to reuse `expandMBB`. NFC. (PR #70325)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Print 'l' section flag for SHF_X86_64_LARGE (PR #70380)   Simon Pilgrim via llvm-commits
• [PATCH] D149742: [SLP]Improve isGatherShuffledEntry by trying per-register shuffle.   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D152928: [RFC][DAG] Initially add nodes in the worklist in topological order.   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D148855: [SLP]Improve tryToGatherExtractElements by using per-register analysis.   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D149742: [SLP]Improve isGatherShuffledEntry by trying per-register shuffle.   Simon Pilgrim via Phabricator via llvm-commits
• [llvm] [PGO] Sampled instrumentation in PGO to speed up instrumentation binary (PR #69535)   Snehasish Kumar via llvm-commits
• [llvm] [PGO] Sampled instrumentation in PGO to speed up instrumentation binary (PR #69535)   Snehasish Kumar via llvm-commits
• [compiler-rt] Support MemProf on darwin (PR #69640)   Snehasish Kumar via llvm-commits
• [llvm] [BasicBlockSections] Apply path cloning with -basic-block-sections. (PR #68860)   Sriraman Tallam via llvm-commits
• [llvm] [BasicBlockSections] Apply path cloning with -basic-block-sections. (PR #68860)   Sriraman Tallam via llvm-commits
• [llvm] [BasicBlockSections] Apply path cloning with -basic-block-sections. (PR #68860)   Sriraman Tallam via llvm-commits
• [llvm] [BasicBlockSections] Apply path cloning with -basic-block-sections. (PR #68860)   Sriraman Tallam via llvm-commits
• [llvm] [AMDGPU] Force the third source operand of the MAI instructions to VGPR if no AGPRs are used. (PR #69720)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Force the third source operand of the MAI instructions to VGPR if no AGPRs are used. (PR #69720)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Fix subreg check in the SIFixSGPRCopies (PR #70007)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Fix subreg check in the SIFixSGPRCopies (PR #70007)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Fix subreg check in the SIFixSGPRCopies (PR #70007)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Fix subreg check in the SIFixSGPRCopies (PR #70007)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] GCNRegPressure printing pass for testing. (PR #70031)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Set Write64Bit = Write64Bit on V_MOV_B64 (PR #70135)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Set SchedRW = Write64Bit on V_MOV_B64 (PR #70135)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Set SchedRW = Write64Bit on V_MOV_B64 (PR #70135)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Shrink to SOPK with 32-bit signed literals (PR #70263)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Prevent folding of the negative i32 literals as i64 (PR #70274)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Shrink to SOPK with 32-bit signed literals (PR #70263)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Shrink to SOPK with 32-bit signed literals (PR #70263)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Shrink to SOPK with 32-bit signed literals (PR #70263)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Prevent folding of the negative i32 literals as i64 (PR #70274)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Prevent folding of the negative i32 literals as i64 (PR #70274)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Prevent folding of the negative i32 literals as i64 (PR #70274)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Prevent folding of the negative i32 literals as i64 (PR #70274)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Prevent folding of the negative i32 literals as i64 (PR #70274)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Prevent folding of the negative i32 literals as i64 (PR #70274)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Prevent folding of the negative i32 literals as i64 (PR #70274)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Prevent folding of the negative i32 literals as i64 (PR #70274)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Give some of the VI V_PK_* instructions a subtarget predicate. (PR #70334)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Prevent folding of the negative i32 literals as i64 (PR #70274)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Prevent folding of the negative i32 literals as i64 (PR #70274)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Prevent folding of the negative i32 literals as i64 (PR #70274)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Set Size to 4 for V_MOV_B64_PSEUDO and S_MOV_B64_IMM_PSEUDO (PR #70376)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Set Size to 4 for V_MOV_B64_PSEUDO and S_MOV_B64_IMM_PSEUDO (PR #70376)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Select 64-bit moves (PR #70395)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Select 64-bit moves (PR #70395)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Select 64-bit moves (PR #70395)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Select 64-bit moves (PR #70395)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Prevent folding of the negative i32 literals as i64 (PR #70274)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Prevent folding of the negative i32 literals as i64 (PR #70274)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Prevent folding of the negative i32 literals as i64 (PR #70274)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Select 64-bit imm moves if can be encoded as 32 bit operand (PR #70395)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Select 64-bit imm moves if can be encoded as 32 bit operand (PR #70395)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Set Size to 4 for V_MOV_B64_PSEUDO and S_MOV_B64_IMM_PSEUDO (PR #70376)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Set Size to 4 for V_MOV_B64_PSEUDO and S_MOV_B64_IMM_PSEUDO (PR #70376)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Select 64-bit imm moves if can be encoded as 32 bit operand (PR #70395)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Select 64-bit imm moves if can be encoded as 32 bit operand (PR #70395)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Shrink to SOPK with 32-bit signed literals (PR #70263)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Fix subtarget predicates for some V_MFMA instructions. (PR #70450)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Remove unneeded implicit-def from shrink-i32-kimm.mir. NFC. (PR #70489)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] GCNRegPressure printing pass for testing. (PR #70031)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Remove unneeded implicit-def from shrink-i32-kimm.mir. NFC. (PR #70489)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Shrink to SOPK with 32-bit signed literals (PR #70263)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] make v32i16/v32f16 legal (PR #70484)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [PowerPC] Fix use of FPSCR builtins in smmintrin.h (PR #67299)   Stefan Pintilie via llvm-commits
• [llvm] [PowerPC] Fix use of FPSCR builtins in smmintrin.h (PR #67299)   Stefan Pintilie via llvm-commits
• [llvm] [PowerPC] Fix use of FPSCR builtins in smmintrin.h (PR #67299)   Stefan Pintilie via llvm-commits
• [compiler-rt] [PowerPC] Fix use of FPSCR builtins in smmintrin.h (PR #67299)   Stefan Pintilie via llvm-commits
• [compiler-rt] [PowerPC] Fix use of FPSCR builtins in smmintrin.h (PR #67299)   Stefan Pintilie via llvm-commits
• [compiler-rt] [PowerPC] Fix use of FPSCR builtins in smmintrin.h (PR #67299)   Stefan Pintilie via llvm-commits
• [llvm] [PowerPC] Add an alias for -mregnames so that full register names used in assembly. (PR #70255)   Stefan Pintilie via llvm-commits
• [llvm] [PowerPC] Add an alias for -mregnames so that full register names used in assembly. (PR #70255)   Stefan Pintilie via llvm-commits
• [llvm] [PowerPC] Add an alias for -mregnames so that full register names used in assembly. (PR #70255)   Stefan Pintilie via llvm-commits
• [llvm] [AMDGPU] Remove unnecessary conditionality on atomic CSUB pseudo-ops (PR #69914)   Stephen Thomas via llvm-commits
• [llvm] [AMDGPU] Remove unnecessary conditionality on atomic CSUB pseudo-ops (PR #69914)   Stephen Thomas via llvm-commits
• [llvm] [ADT] Add TrieRawHashMap (PR #69528)   Steven Wu via llvm-commits
• [PATCH] D123235: [OpenMP] atomic compare fail : Parser & AST support   Sunil K via Phabricator via llvm-commits
• [llvm] [LTO] A static relocation model can override the PIC level wrt treating external address as directly accessible (PR #65512)   Teresa Johnson via llvm-commits
• [llvm] [Internalize] Preserve built-in functions (PR #69216)   Teresa Johnson via llvm-commits
• [llvm] [NFC]Rename collectPGOFuncNameStrings to collectGlobalObjectNameStrings (PR #70287)   Teresa Johnson via llvm-commits
• [llvm] [NFC] In InstrProf, generalize helper functions to take 'GlobalObject'. They currently take 'Functions' as function parameters or have 'Func' in the name. (PR #70287)   Teresa Johnson via llvm-commits
• [llvm] [NFC] In InstrProf, generalize helper functions to take 'GlobalObject'. They currently take 'Functions' as function parameters or have 'Func' in the name. (PR #70287)   Teresa Johnson via llvm-commits
• [llvm] [NFC] In InstrProf, generalize helper functions to take 'GlobalObject'. They currently take 'Functions' as function parameters or have 'Func' in the name. (PR #70287)   Teresa Johnson via llvm-commits
• [compiler-rt] Support MemProf on darwin (PR #69640)   Teresa Johnson via llvm-commits
• [compiler-rt] Support MemProf on darwin (PR #69640)   Teresa Johnson via llvm-commits
• [compiler-rt] Support MemProf on darwin (PR #69640)   Teresa Johnson via llvm-commits
• [compiler-rt] Support MemProf on darwin (PR #69640)   Teresa Johnson via llvm-commits
• [compiler-rt] Support MemProf on darwin (PR #69640)   Teresa Johnson via llvm-commits
• [compiler-rt] Support MemProf on darwin (PR #69640)   Teresa Johnson via llvm-commits
• [compiler-rt] Support MemProf on darwin (PR #69640)   Teresa Johnson via llvm-commits
• [compiler-rt] Support MemProf on darwin (PR #69640)   Teresa Johnson via llvm-commits
• [compiler-rt] Support MemProf on darwin (PR #69640)   Teresa Johnson via llvm-commits
• [llvm] [MemProf] Handle profiles with missing column numbers (PR #70520)   Teresa Johnson via llvm-commits
• [llvm] [LIT] Print discovered tests and percentages (#66057) (PR #69831)   Thomas Preud'homme via llvm-commits
• [llvm] [AMDGPU] - Add s_bitreplicate intrinsic (PR #69209)   Thomas Symalla via llvm-commits
• [llvm] [AMDGPU] - Add s_bitreplicate intrinsic (PR #69209)   Thomas Symalla via llvm-commits
• [compiler-rt] [tsan] Increase size of shadow mappings for C/C++ on linux/x86_64 (PR #70517)   Thurston Dang via llvm-commits
• [compiler-rt] [tsan] Increase size of shadow mappings for C/C++ on linux/x86_64 (PR #70517)   Thurston Dang via llvm-commits
• [compiler-rt] [tsan] Increase size of shadow mappings for C/C++ on linux/x86_64 (PR #70517)   Thurston Dang via llvm-commits
• [compiler-rt] [clang] Correct end for the `CastOperation.OpRange` (PR #69480)   Timm Baeder via llvm-commits
• [llvm] StackProtector: use isInTailCallPosition to verify tail call position (PR #68997)   Timm Baeder via llvm-commits
• [llvm] [Support] Better error msg when cache dir can't be created. (PR #69575)   Tobias Hieta via llvm-commits
• [lld] [Support] Better error msg when cache dir can't be created. (PR #69575)   Tobias Hieta via llvm-commits
• [llvm] [Support] Better error msg when cache dir can't be created. (PR #69575)   Tobias Hieta via llvm-commits
• [lld] [Support] Better error msg when cache dir can't be created. (PR #69575)   Tobias Hieta via llvm-commits
• [llvm] [Workflow] Expand code-format-helper.py error reporting (PR #69686)   Tobias Hieta via llvm-commits
• [llvm] [llvm][Release] Add note about binaries to Github release description (PR #69698)   Tobias Hieta via llvm-commits
• [lld] [Support] Better error msg when cache dir can't be created. (PR #69575)   Tobias Hieta via llvm-commits
• [llvm] [Support] Better error msg when cache dir can't be created. (PR #69575)   Tobias Hieta via llvm-commits
• [lld] [Support] Better error msg when cache dir can't be created. (PR #69575)   Tobias Hieta via llvm-commits
• [llvm] [Support] Better error msg when cache dir can't be created. (PR #69575)   Tobias Hieta via llvm-commits
• [llvm] [Support] Better error msg when cache dir can't be created. (PR #69575)   Tobias Hieta via llvm-commits
• [llvm] [Support] Better error msg when cache dir can't be created. (PR #69575)   Tobias Hieta via llvm-commits
• [llvm] [AArch64][GlobalISel] Fix incorrect ABI when tail call not supported (PR #70215)   Tobias Hieta via llvm-commits
• [llvm] [Github] Fetch all commits in PR for code formatting checks (PR #69766)   Tobias Hieta via llvm-commits
• [llvm] [Github] Fetch all commits in PR for code formatting checks (PR #69766)   Tobias Hieta via llvm-commits
• [llvm] [Github] Fetch all commits in PR for code formatting checks (PR #69766)   Tobias Hieta via llvm-commits
• [llvm] Add support for DFP IR type. (PR #69718)   Tom Honermann via llvm-commits
• [llvm] [llvm][Release] Add note about binaries to Github release description (PR #69698)   Tom Stellard via llvm-commits
• [llvm] [Github] Use API to fetch PR diff for docs action (PR #70001)   Tom Stellard via llvm-commits
• [llvm] [Github] Use API to fetch PR diff for docs action (PR #70001)   Tom Stellard via llvm-commits
• [llvm] Add Scorecard Action (PR #69933)   Tom Stellard via llvm-commits
• [llvm] Add Scorecard Action (PR #69933)   Tom Stellard via llvm-commits
• [llvm] Add Scorecard Action (PR #69933)   Tom Stellard via llvm-commits
• [llvm] [Github] Add OpenMP docs to Github docs action (PR #70529)   Tom Stellard via llvm-commits
• [llvm] [Github] Add Polly docs to Github actions (PR #70531)   Tom Stellard via llvm-commits
• [llvm] [Github] Add OpenMP docs to Github docs action (PR #70529)   Tom Stellard via llvm-commits
• [llvm] [Github] Add OpenMP docs to Github docs action (PR #70529)   Tom Stellard via llvm-commits
• [llvm] [Github] Add Polly docs to Github actions (PR #70531)   Tom Stellard via llvm-commits
• [llvm] [Github] Add flang docs to Github actions (PR #70530)   Tom Stellard via llvm-commits
• LLVM ABI Annotations (PR #67502)   Tom Stellard via llvm-commits
• LLVM ABI Annotations (PR #67502)   Tom Stellard via llvm-commits
• LLVM ABI Annotations (PR #67502)   Tom Stellard via llvm-commits
• [llvm] [SystemZ][NFC] Fix a couple of style issues (PR #69958)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ][NFC] Fix a couple of style issues (PR #69958)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Enable AtomicExpand pass (PR #70398)   Ulrich Weigand via llvm-commits
• [llvm] Revert [clang] Handle templated operators with reversed arguments and [STLExtras] Undo C++20 hack (PR #69937)   Utkarsh Saxena via llvm-commits
• [llvm] Revert [clang] Handle templated operators with reversed arguments and [STLExtras] Undo C++20 hack (PR #69937)   Utkarsh Saxena via llvm-commits
• [llvm] Revert [clang] Handle templated operators with reversed arguments and [STLExtras] Undo C++20 hack (PR #69937)   Utkarsh Saxena via llvm-commits
• [llvm] Revert tests missed in b997ff4 (PR #69974)   Utkarsh Saxena via llvm-commits
• [llvm] Revert tests missed in b997ff4 (PR #69974)   Utkarsh Saxena via llvm-commits
• [llvm] Revert tests missed in b997ff4 (PR #69974)   Utkarsh Saxena via llvm-commits
• [llvm] Revert [clang] Handle templated operators with reversed arguments and [STLExtras] Undo C++20 hack (PR #69937)   Utkarsh Saxena via llvm-commits
• [llvm] [RFC] Perform lifetime bound checks for arguments to coroutine (PR #69360)   Utkarsh Saxena via llvm-commits
• [llvm] [RFC] Perform lifetime bound checks for arguments to coroutine (PR #69360)   Utkarsh Saxena via llvm-commits
• [llvm] [RFC] Perform lifetime bound checks for arguments to coroutine (PR #69360)   Utkarsh Saxena via llvm-commits
• [llvm] [RFC] Perform lifetime bound checks for arguments to coroutine (PR #69360)   Utkarsh Saxena via llvm-commits
• [llvm] [RFC] Perform lifetime bound checks for arguments to coroutine (PR #69360)   Utkarsh Saxena via llvm-commits
• [llvm] [RFC] Perform lifetime bound checks for arguments to coroutine (PR #69360)   Utkarsh Saxena via llvm-commits
• [llvm] [RFC] Perform lifetime bound checks for arguments to coroutine (PR #69360)   Utkarsh Saxena via llvm-commits
• [PATCH] D149742: [SLP]Improve isGatherShuffledEntry by trying per-register shuffle.   Valeriy Dmitriev via Phabricator via llvm-commits
• [PATCH] D149742: [SLP]Improve isGatherShuffledEntry by trying per-register shuffle.   Valeriy Dmitriev via Phabricator via llvm-commits
• [llvm] [NFC][SLP] Add test case for issue #69670. (PR #70088)   Valery Dmitriev via llvm-commits
• [llvm] [NFC][SLP] Add test case for issue #69670. (PR #70088)   Valery Dmitriev via llvm-commits
• [llvm] [NFC][SLP] Add test case for issue #69670. (PR #70088)   Valery Dmitriev via llvm-commits
• [llvm] [SLP] Improve gather tree nodes matching when users are PHIs. (PR #70111)   Valery Dmitriev via llvm-commits
• [llvm] [SLP] Improve gather tree nodes matching when users are PHIs. (PR #70111)   Valery Dmitriev via llvm-commits
• [llvm] [AMDGPU] Fix GCNRewritePartialRegUses pass: vector regclass is selected instead of scalar. (PR #69957)   Valery Pykhtin via llvm-commits
• [llvm] [AMDGPU] Fix GCNRewritePartialRegUses pass: vector regclass is selected instead of scalar. (PR #69957)   Valery Pykhtin via llvm-commits
• [llvm] Improve selection of conditional branch on amdgcn.ballot!=0 condition in SelectionDAG. (PR #68714)   Valery Pykhtin via llvm-commits
• [llvm] [AMDGPU] GCNRegPressure printing pass for testing. (PR #70031)   Valery Pykhtin via llvm-commits
• [llvm] [AMDGPU] GCNRegPressure printing pass for testing. (PR #70031)   Valery Pykhtin via llvm-commits
• [llvm] [AMDGPU] GCNRegPressure printing pass for testing. (PR #70031)   Valery Pykhtin via llvm-commits
• [llvm] Improve selection of conditional branch on amdgcn.ballot!=0 condition in SelectionDAG. (PR #68714)   Valery Pykhtin via llvm-commits
• [llvm] Improve selection of conditional branch on amdgcn.ballot!=0 condition in SelectionDAG. (PR #68714)   Valery Pykhtin via llvm-commits
• [llvm] Improve selection of conditional branch on amdgcn.ballot!=0 condition in SelectionDAG. (PR #68714)   Valery Pykhtin via llvm-commits
• [llvm] [AMDGPU] GCNRegPressure printing pass for testing. (PR #70031)   Valery Pykhtin via llvm-commits
• [llvm] [AMDGPU] GCNRegPressure printing pass for testing. (PR #70031)   Valery Pykhtin via llvm-commits
• [llvm] [AMDGPU] GCNRegPressure printing pass for testing. (PR #70031)   Valery Pykhtin via llvm-commits
• [llvm] [AMDGPU] GCNRegPressure printing pass for testing. (PR #70031)   Valery Pykhtin via llvm-commits
• [llvm] [AMDGPU] GCNRegPressure printing pass for testing. (PR #70031)   Valery Pykhtin via llvm-commits
• [llvm] [AMDGPU] GCNRegPressure printing pass for testing. (PR #70031)   Valery Pykhtin via llvm-commits
• [llvm] [AMDGPU] GCNRegPressure printing pass for testing. (PR #70031)   Valery Pykhtin via llvm-commits
• [llvm] [AMDGPU] GCNRegPressure printing pass for testing. (PR #70031)   Valery Pykhtin via llvm-commits
• [llvm] [AMDGPU] GCNRegPressure printing pass for testing. (PR #70031)   Valery Pykhtin via llvm-commits
• [llvm] [AMDGPU] GCNRegPressure printing pass for testing. (PR #70031)   Valery Pykhtin via llvm-commits
• [llvm] [SimplifyCFG] Prevent merging cbranch to cbranch if the branch probability from the first to second is too low. (PR #69375)   Valery Pykhtin via llvm-commits
• [llvm] [AMDGPU] GCNRegPressure printing pass for testing. (PR #70031)   Valery Pykhtin via llvm-commits
• [llvm] [AMDGPU] GCNRegPressure printing pass for testing. (PR #70031)   Valery Pykhtin via llvm-commits
• [llvm] [AMDGPU] GCNRegPressure printing pass for testing. (PR #70031)   Valery Pykhtin via llvm-commits
• [llvm] [AMDGPU] GCNRegPressure printing pass for testing. (PR #70031)   Valery Pykhtin via llvm-commits
• [llvm] [AMDGPU] GCNRegPressure printing pass for testing. (PR #70031)   Valery Pykhtin via llvm-commits
• [llvm] Disable memtag sanitization for global fnptrs going into .ctors (PR #70186)   Victor Signaevskyi via llvm-commits
• [llvm] Disable memtag sanitization for global fnptrs going into .ctors (PR #70186)   Victor Signaevskyi via llvm-commits
• [llvm] [Attributor] New attribute to identify what byte ranges are alive for an allocation (PR #66148)   Vidhush Singhal via llvm-commits
• [llvm] [Attributor] New attribute to identify what byte ranges are alive for an allocation (PR #66148)   Vidhush Singhal via llvm-commits
• [llvm] [Attributor] New attribute to identify what byte ranges are alive for an allocation (PR #66148)   Vidhush Singhal via llvm-commits
• [llvm] [Attributor] New attribute to identify what byte ranges are alive for an allocation (PR #66148)   Vidhush Singhal via llvm-commits
• [llvm] [Attributor] New attribute to identify what byte ranges are alive for an allocation (PR #66148)   Vidhush Singhal via llvm-commits
• [llvm] [Attributor] New attribute to identify what byte ranges are alive for an allocation (PR #66148)   Vidhush Singhal via llvm-commits
• [llvm] [Attributor] New attribute to identify what byte ranges are alive for an allocation (PR #66148)   Vidhush Singhal via llvm-commits
• [compiler-rt] [HWASan] Prevent same tag for adjacent heap objects (PR #69337)   Vitaly Buka via llvm-commits
• [llvm] [WIP] For Asan instrumented global, emit two symbols, one with actual size and other with instrumented size. (PR #70166)   Vitaly Buka via llvm-commits
• [compiler-rt] Bfi precision (PR #66285)   Vitaly Buka via llvm-commits
• [llvm] fix: asan support aarch64be (PR #70536)   Vitaly Buka via llvm-commits
• [llvm] fix: asan support aarch64be (PR #70536)   Vitaly Buka via llvm-commits
• [llvm] fix: asan support aarch64be (PR #70536)   Vitaly Buka via llvm-commits
• [llvm] [Github] Add PR author name to subscription email (PR #68440)   Vlad Serebrennikov via llvm-commits
• [llvm] [clang][NFC] Annotate `Type` bit-fields with `clang::preferred_type` (PR #70349)   Vlad Serebrennikov via llvm-commits
• [llvm] [AArch64][GlobalISel] Legalize NEON smin,smax,umin,umax,fmin,fmax intrinsics (PR #70060)   Vladislav Dzhidzhoev via llvm-commits
• [llvm] [AArch64][GlobalISel] Legalize NEON smin,smax,umin,umax,fmin,fmax intrinsics (PR #70060)   Vladislav Dzhidzhoev via llvm-commits
• [llvm] [AArch64][GlobalISel] Legalize NEON smin,smax,umin,umax,fmin,fmax intrinsics (PR #70060)   Vladislav Dzhidzhoev via llvm-commits
• [llvm] 2dea7bd - [AArch64][GlobalISel] Legalize NEON smin,smax,umin,umax,fmin,fmax intrinsics   Vladislav Dzhidzhoev via llvm-commits
• [llvm] [AArch64][GlobalISel] Legalize NEON smin,smax,umin,umax,fmin,fmax intrinsics (PR #70060)   Vladislav Dzhidzhoev via llvm-commits
• [llvm] [AArch64][GlobalISel] Adopt some Ld1Lane* patterns for GlobalISel to reduce codegen regressions (PR #69607)   Vladislav Dzhidzhoev via llvm-commits
• [llvm] [DebugMetadata][DwarfDebug] Clone uniqued function-local types after metadata loading (PR #68986)   Vladislav Dzhidzhoev via llvm-commits
• [llvm] [AArch64][GlobalISel] Adopt some Ld1Lane* patterns for GlobalISel to reduce codegen regressions (PR #69607)   Vladislav Dzhidzhoev via llvm-commits
• [llvm] [AArch64][GlobalISel] Adopt some Ld1Lane* patterns for GlobalISel to reduce codegen regressions (PR #69607)   Vladislav Dzhidzhoev via llvm-commits
• [llvm] [BOLT][RISCV] Set minimum function alignment to 2 for RVC (PR #69837)   Vladislav Khmelevsky via llvm-commits
• [llvm] [BOLT] Modify MCPlus annotation internals. NFCI. (PR #70412)   Vladislav Khmelevsky via llvm-commits
• [llvm] [RISCV] Select atomic_{load/store} to pseudos and expand them later (PR #67108)   Wang Pengcheng via llvm-commits
• [llvm] [TableGen][NFC] Add record kind to `Record` class (PR #69919)   Wang Pengcheng via llvm-commits
• [llvm] [RISCV] Add an experimental pseudoinstruction to represent a rematerializable constant materialization sequence. (PR #69983)   Wang Pengcheng via llvm-commits
• [llvm] [TableGen][NFC] Add record kind to `Record` class (PR #69919)   Wang Pengcheng via llvm-commits
• [llvm] [TableGen][NFC] Add record kind to `Record` class (PR #69919)   Wang Pengcheng via llvm-commits
• [llvm] [TableGen][NFC] Add record kind to `Record` class (PR #69919)   Wang Pengcheng via llvm-commits
• [llvm] [TableGen][NFC] Add record kind to `Record` class (PR #69919)   Wang Pengcheng via llvm-commits
• [llvm] [RISCV] Macro-fusion support for veyron-v1 CPU. (PR #70012)   Wang Pengcheng via llvm-commits
• [llvm] [RISCV][NFC] Fix comments in foldMemoryOperandImpl (PR #70033)   Wang Pengcheng via llvm-commits
• [llvm] [RISCV][NFC] Fix comments in foldMemoryOperandImpl (PR #70033)   Wang Pengcheng via llvm-commits
• [llvm] [TableGen][NFC] Format CompressInstEmitter (PR #68564)   Wang Pengcheng via llvm-commits
• [llvm] [RISCV] Macro-fusion support for veyron-v1 CPU. (PR #70012)   Wang Pengcheng via llvm-commits
• [llvm] [RISCV] SiFive7 VLDS Sched should not depend on VL when stride is x0. (PR #70266)   Wang Pengcheng via llvm-commits
• [llvm] [RISCV] SiFive7 VLDS Sched should not depend on VL when stride is x0. (PR #70266)   Wang Pengcheng via llvm-commits
• [llvm] [RISCV] SiFive7 VLDS Sched should not depend on VL when stride is x0. (PR #70266)   Wang Pengcheng via llvm-commits
• [llvm] [RISCV] Add processor definition for XiangShan-NanHu (PR #70294)   Wang Pengcheng via llvm-commits
• [llvm] [RFC][RISCV] Support the large code model. (PR #70308)   Wang Pengcheng via llvm-commits
• [llvm] [RFC][RISCV] Support the large code model. (PR #70308)   Wang Pengcheng via llvm-commits
• [llvm] [RISCV] Add processor definition for XiangShan-NanHu (PR #70294)   Wang Pengcheng via llvm-commits
• [llvm] [RISCV] Add processor definition for XiangShan-NanHu (PR #70294)   Wang Pengcheng via llvm-commits
• [llvm] [RISCV] Add processor definition for XiangShan-NanHu (PR #70294)   Wang Pengcheng via llvm-commits
• [llvm] [RISCV] Add processor definition for XiangShan-NanHu (PR #70294)   Wang Pengcheng via llvm-commits
• [llvm] [RISCV] SiFive7 VLDS Sched should not depend on VL when stride is x0. (PR #70266)   Wang Pengcheng via llvm-commits
• [llvm] [RISCV] SiFive7 VLDS Sched should not depend on VL when stride is x0. (PR #70266)   Wang Pengcheng via llvm-commits
• [llvm] [RISCV] SiFive7 VLDS Sched should not depend on VL when stride is x0. (PR #70266)   Wang Pengcheng via llvm-commits
• [llvm] [RISCV] SiFive7 VLDS Sched should not depend on VL when stride is x0. (PR #70266)   Wang Pengcheng via llvm-commits
• [llvm] [RISCV] SiFive7 VLDS Sched should not depend on VL when stride is x0. (PR #70266)   Wang Pengcheng via llvm-commits
• [llvm] [RISCV] Add experimental support for making i32 a legal type on RV64 in SelectionDAG. (PR #70357)   Wang Pengcheng via llvm-commits
• [llvm] [RISCV] Keep same SEW/LMUL ratio if possible in forward transfer (PR #69788)   Wang Pengcheng via llvm-commits
• [llvm] [RISCV] Fix incorrect use of Zfa fli instruction for negative minimum value. (PR #70411)   Wang Pengcheng via llvm-commits
• [llvm] [RISCV] Add processor definition for XiangShan-NanHu (PR #70294)   Wang Pengcheng via llvm-commits
• [llvm] [RISCV] Keep same SEW/LMUL ratio if possible in forward transfer (PR #69788)   Wang Pengcheng via llvm-commits
• [llvm] [RISCV] Enable LoopDataPrefetch pass (PR #66201)   Wang Pengcheng via llvm-commits
• [llvm] [RISCV] SiFive7 VLDS Sched should not depend on VL when stride is x0. (PR #70266)   Wang Pengcheng via llvm-commits
• [llvm] [RISCV] SiFive7 VLDS Sched should not depend on VL when stride is x0. (PR #70266)   Wang Pengcheng via llvm-commits
• [llvm] [RISCV] SiFive7 VLDS Sched should not depend on VL when stride is x0. (PR #70266)   Wang Pengcheng via llvm-commits
• [llvm] [RISCV] Teach copyPhysReg to allow copies between GPR<->FPR32/FPR64 (PR #70525)   Wang Pengcheng via llvm-commits
• [PATCH] D70401: [RISCV] CodeGen of RVE and ilp32e/lp64e ABIs   Wang Pengcheng via Phabricator via llvm-commits
• [llvm] [PassTimingInfo] Handle nested timers in passes (PR #70165)   Wei Wang via llvm-commits
• [llvm] [PassTimingInfo] Handle nested timers in passes (PR #70165)   Wei Wang via llvm-commits
• [llvm] [PassTimingInfo] Handle nested timers in passes (PR #70165)   Wei Wang via llvm-commits
• [PATCH] D146543: [Coroutines] Look for dbg.declare for temp spills   Wei Wang via Phabricator via llvm-commits
• [PATCH] D146543: [Coroutines] Look for dbg.declare for temp spills   Wei Wang via Phabricator via llvm-commits
• [llvm] [DominanceFrontier] make iterating dereferenced DominanceFrontierBase::find deterministic (PR #69711)   Wenju He via llvm-commits
• [llvm] [DominanceFrontier] make iterating dereferenced DominanceFrontierBase::find deterministic (PR #69711)   Wenju He via llvm-commits
• [llvm] [DominanceFrontier] make iterating dereferenced DominanceFrontierBase::find deterministic (PR #69711)   Wenju He via llvm-commits
• [llvm] [DominanceFrontier] make iterating dereferenced DominanceFrontierBase::find deterministic (PR #69711)   Wenju He via llvm-commits
• [llvm] [DominanceFrontier] make iterating dereferenced DominanceFrontierBase::find deterministic (PR #69711)   Wenju He via llvm-commits
• [llvm] [DominanceFrontier] make iterating dereferenced DominanceFrontierBase::find deterministic (PR #69711)   Wenju He via llvm-commits
• [llvm] [DominanceFrontier] make iterating dereferenced DominanceFrontierBase::find deterministic (PR #69711)   Wenju He via llvm-commits
• [llvm] [DominanceFrontier] make iterating dereferenced DominanceFrontierBase::find deterministic (PR #69711)   Wenju He via llvm-commits
• [llvm] [NFC][DominanceFrontier] Replace std::map with DenseMap for DomSetMapType (PR #70403)   Wenju He via llvm-commits
• [llvm] [DominanceFrontier] make iterating dereferenced DominanceFrontierBase::find deterministic (PR #69711)   Wenju He via llvm-commits
• [llvm] [NFC][DominanceFrontier] Replace std::map with DenseMap for DomSetMapType (PR #70403)   Wenju He via llvm-commits
• [llvm] [InferAddressSpaces] collect flat address expression from return value (PR #70610)   Wenju He via llvm-commits
• [llvm] [InferAddressSpaces] Fix constant replace to avoid modifying other functions (PR #70611)   Wenju He via llvm-commits
• [llvm] [InferAddressSpaces] collect flat address expression from return value (PR #70610)   Wenju He via llvm-commits
• [llvm] [InferAddressSpaces] collect flat address expression from return value (PR #70610)   Wenju He via llvm-commits
• [llvm] [PassBuilder] Add a mechanism for adding passbuilder callbacks for static builds (PR #70171)   William Moses via llvm-commits
• [llvm] [PassBuilder] Add a mechanism for adding passbuilder callbacks for static builds (PR #70171)   William Moses via llvm-commits
• [llvm] [PassBuilder] Add a mechanism for adding passbuilder callbacks for static builds (PR #70171)   William Moses via llvm-commits
• [llvm] [PassBuilder] Add a mechanism for adding passbuilder callbacks for static builds (PR #70171)   William Moses via llvm-commits
• [llvm] [PassBuilder] Add a mechanism for adding passbuilder callbacks for static builds (PR #70171)   William Moses via llvm-commits
• [llvm] [PassBuilder] Add a mechanism for adding passbuilder callbacks for static builds (PR #70171)   William Moses via llvm-commits
• [llvm] [PassBuilder] Add a mechanism for adding passbuilder callbacks for static builds (PR #70171)   William Moses via llvm-commits
• [llvm] [PassBuilder] Add a mechanism for adding passbuilder callbacks for static builds (PR #70171)   William Moses via llvm-commits
• [llvm] [PassBuilder] Add a mechanism for adding passbuilder callbacks for static builds (PR #70171)   William Moses via llvm-commits
• [llvm] [PassBuilder] Add a mechanism for adding passbuilder callbacks for static builds (PR #70171)   William Moses via llvm-commits
• [llvm] [PassBuilder] Add a mechanism for adding passbuilder callbacks for static builds (PR #70171)   William Moses via llvm-commits
• [llvm] [LTO] A static relocation model can override the PIC level wrt treating external address as directly accessible (PR #65512)   Wolfgang Pieb via llvm-commits
• [llvm] [AMDGPU] Add writelane and readlane pseudos for SGPR spilling (PR #69923)   Yashwant Singh via llvm-commits
• [llvm] [AMDGPU] Add writelane and readlane pseudos for SGPR spilling (PR #69923)   Yashwant Singh via llvm-commits
• [llvm] [Offloading][NFC] Move creation of offloading entries from OpenMP (PR #70116)   Yaxun Liu via llvm-commits
• [llvm] [Offloading][NFC] Move creation of offloading entries from OpenMP (PR #70116)   Yaxun Liu via llvm-commits
• [lld] Fix build failure of lld/ELF/OutputSections.cpp (PR #70368)   Yaxun Liu via llvm-commits
• [lld] Fix build failure of lld/ELF/OutputSections.cpp (PR #70368)   Yaxun Liu via llvm-commits
• [lld] Fix build failure of lld/ELF/OutputSections.cpp (PR #70368)   Yaxun Liu via llvm-commits
• [lld] Fix build failure of lld/ELF/OutputSections.cpp (PR #70368)   Yaxun Liu via llvm-commits
• [lld] Fix build failure of lld/ELF/OutputSections.cpp (PR #70368)   Yaxun Liu via llvm-commits
• [llvm] [RISCV] Add MC layer support for Zicfiss. (PR #66043)   Yeting Kuo via llvm-commits
• [llvm] [RISCV] Add MC layer support for Zicfiss. (PR #66043)   Yeting Kuo via llvm-commits
• [llvm] [RISCV] Add MC layer support for Zicfiss. (PR #66043)   Yeting Kuo via llvm-commits
• [llvm] [RISCV] Add MC layer support for Zicfiss. (PR #66043)   Yeting Kuo via llvm-commits
• [llvm] [RISCV] Add MC layer support for Zicfiss. (PR #66043)   Yeting Kuo via llvm-commits
• [llvm] [RISCV] Add processor definition for XiangShan-NanHu (PR #70294)   Yinan Xu via llvm-commits
• [llvm] [RISCV] Add processor definition for XiangShan-NanHu (PR #70294)   Yinan Xu via llvm-commits
• [llvm] [RISCV] Add processor definition for XiangShan-NanHu (PR #70294)   Yinan Xu via llvm-commits
• [llvm] [LV] Invalidate SCEV values in the scalar loop after loop vectorization (PR #69886)   Yingwei Zheng via llvm-commits
• [llvm] [LV] Invalidate SCEV values in the scalar loop after loop vectorization (PR #69886)   Yingwei Zheng via llvm-commits
• [llvm] [LV] Invalidate SCEV values in the scalar loop after loop vectorization (PR #69886)   Yingwei Zheng via llvm-commits
• [llvm] [LV] Invalidate SCEV values in the scalar loop after loop vectorization (PR #69886)   Yingwei Zheng via llvm-commits
• [llvm] [SCEV][LV] Invalidate LCSSA exit phis more thoroughly (PR #69909)   Yingwei Zheng via llvm-commits
• [llvm] [SCEV][LV] Invalidate LCSSA exit phis more thoroughly (PR #69909)   Yingwei Zheng via llvm-commits
• [llvm] [LV] Invalidate SCEV values in the scalar loop after loop vectorization (PR #69886)   Yingwei Zheng via llvm-commits
• [llvm] [LV] Invalidate SCEV values in the scalar loop after loop vectorization (PR #69886)   Yingwei Zheng via llvm-commits
• [llvm] [ConstantRange] Handle `Intrinsic::cttz` (PR #67917)   Yingwei Zheng via llvm-commits
• [llvm] [ConstantRange] Handle `Intrinsic::ctpop` (PR #68310)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Decompose an icmp into multiple ranges (PR #69855)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold `ctpop(X) eq/ne 1` if X is non-zero (PR #67268)   Yingwei Zheng via llvm-commits
• [llvm] [SimplifyCFG] Improve linear mapping in switch lookup tables (PR #67881)   Yingwei Zheng via llvm-commits
• [llvm] [RISCV] Initial ISel support for the experimental zacas extension (PR #67918)   Yingwei Zheng via llvm-commits
• [llvm] [RISCV][SDAG] Prefer ShortForwardBranch to lower sdiv by pow2 (PR #67364)   Yingwei Zheng via llvm-commits
• [llvm] [SimplifyCFG] Improve FoldTwoEntryPHINode when one of phi values is undef (PR #69021)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Decompose an icmp into multiple ranges (PR #69855)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold xored one-complemented operand comparisons (PR #69882)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold xored one-complemented operand comparisons (PR #69882)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold xored one-complemented operand comparisons (PR #69882)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold xored one-complemented operand comparisons (PR #69882)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Improve eq/ne by parts to handle ult/ugt equality pattern (PR #69884)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Improve eq/ne by parts to handle ult/ugt equality pattern (PR #69884)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Improve eq/ne by parts to handle ult/ugt equality pattern (PR #69884)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Improve eq/ne by parts to handle ult/ugt equality pattern (PR #69884)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Improve eq/ne by parts to handle ult/ugt equality pattern (PR #69884)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold xored one-complemented operand comparisons (PR #69882)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold xored one-complemented operand comparisons (PR #69882)   Yingwei Zheng via llvm-commits
• [llvm] [RISCV][SDAG] Prefer ShortForwardBranch to lower sdiv by pow2 (PR #67364)   Yingwei Zheng via llvm-commits
• [llvm] [RISCV][SDAG] Prefer ShortForwardBranch to lower sdiv by pow2 (PR #67364)   Yingwei Zheng via llvm-commits
• [llvm] [RISCV][SDAG] Prefer ShortForwardBranch to lower sdiv by pow2 (PR #67364)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold xored one-complemented operand comparisons (PR #69882)   Yingwei Zheng via llvm-commits
• [llvm] [RISCV] Add sched model for XiangShan-NanHu (PR #70232)   Yingwei Zheng via llvm-commits
• [llvm] [RISCV] Separate addend from FMA operands to support cascade FMA. NFC. (PR #70241)   Yingwei Zheng via llvm-commits
• [llvm] [RISCV] Add sched model for XiangShan-NanHu (PR #70232)   Yingwei Zheng via llvm-commits
• [llvm] [RISCV] Separate addend from FMA operands to support cascade FMA. NFC. (PR #70241)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold xored one-complemented operand comparisons (PR #69882)   Yingwei Zheng via llvm-commits
• [llvm] [RISCV] Add processor definition for XiangShan-NanHu (PR #70294)   Yingwei Zheng via llvm-commits
• [llvm] [RISCV] Add sched model for XiangShan-NanHu (PR #70232)   Yingwei Zheng via llvm-commits
• [llvm] [RISCV] Add processor definition for XiangShan-NanHu (PR #70294)   Yingwei Zheng via llvm-commits
• [llvm] [RISCV] Add sched model for XiangShan-NanHu (PR #70232)   Yingwei Zheng via llvm-commits
• [llvm] [RISCV] Add processor definition for XiangShan-NanHu (PR #70294)   Yingwei Zheng via llvm-commits
• [llvm] [CodeGen] Add a helper class to reuse `expandMBB`. NFC. (PR #70325)   Yingwei Zheng via llvm-commits
• [llvm] [RISCV] Add processor definition for XiangShan-NanHu (PR #70294)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Simplify and/or of icmp eq with op replacement (PR #70335)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Simplify and/or of icmp eq with op replacement (PR #70335)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Simplify and/or of icmp eq with op replacement (PR #70335)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Simplify and/or of icmp eq with op replacement (PR #70335)   Yingwei Zheng via llvm-commits
• [llvm] [RISCV] Add sched model for XiangShan-NanHu (PR #70232)   Yingwei Zheng via llvm-commits
• [llvm] [RISCV] Add sched model for XiangShan-NanHu (PR #70232)   Yingwei Zheng via llvm-commits
• [llvm] [ConstraintElim] Add missing check to make sure the bound is loop-invariant (PR #70555)   Yingwei Zheng via llvm-commits
• [llvm] 4c60c0c - [LowerMemIntrinsics] Remove no-op ptr-to-ptr bitcasts (NFC)   Youngsuk Kim via llvm-commits
• [llvm] 7523b89 - [llvm] Remove no-op ptr-to-ptr bitcasts (NFC)   Youngsuk Kim via llvm-commits
• [llvm] d0f2c28 - [DataFlowSanitizer] Remove no-op ptr-to-ptr bitcasts (NFC)   Youngsuk Kim via llvm-commits
• [llvm] [SystemZ][z/OS] This change adds support for the PPA2 section in zOS (PR #68926)   Yusra Syeda via llvm-commits
• [llvm] [SystemZ][z/OS] This change adds support for the PPA2 section in zOS (PR #68926)   Yusra Syeda via llvm-commits
• [llvm] Add support for DFP IR type. (PR #69718)   Zahira Ammarguellat via llvm-commits
• [llvm] Add support for DFP IR type. (PR #69718)   Zahira Ammarguellat via llvm-commits
• [llvm] Add support for DFP IR type. (PR #69718)   Zahira Ammarguellat via llvm-commits
• [llvm] Add support for DFP IR type. (PR #69718)   Zahira Ammarguellat via llvm-commits
• [llvm] Add support for DFP IR type. (PR #69718)   Zahira Ammarguellat via llvm-commits
• [llvm] Add support for DFP IR type. (PR #69718)   Zahira Ammarguellat via llvm-commits
• [llvm] Add support for DFP IR type. (PR #69718)   Zahira Ammarguellat via llvm-commits
• [llvm] Add support for DFP IR type. (PR #69718)   Zahira Ammarguellat via llvm-commits
• [llvm] Add support for DFP IR type. (PR #69718)   Zahira Ammarguellat via llvm-commits
• [llvm] Testing. (PR #70036)   Zahira Ammarguellat via llvm-commits
• [llvm] Revert "[clang] Support fixed point types in C++ (#67750)" (PR #69963)   Zahira Ammarguellat via llvm-commits
• [llvm] Testing. (PR #70036)   Zahira Ammarguellat via llvm-commits
• [llvm] Add support for DFP IR type. (PR #69718)   Zahira Ammarguellat via llvm-commits
• [llvm] Add support for DFP IR type. (PR #69718)   Zahira Ammarguellat via llvm-commits
• [llvm] Testing PR. (PR #70093)   Zahira Ammarguellat via llvm-commits
• [llvm] Add support for DFP IR type. (PR #69718)   Zahira Ammarguellat via llvm-commits
• [llvm] Testing PR. (PR #70093)   Zahira Ammarguellat via llvm-commits
• [llvm] Dfpir types (PR #70127)   Zahira Ammarguellat via llvm-commits
• [llvm] Dfpir types (PR #70127)   Zahira Ammarguellat via llvm-commits
• [compiler-rt] Complex range (PR #70244)   Zahira Ammarguellat via llvm-commits
• [llvm] Complex range (PR #70244)   Zahira Ammarguellat via llvm-commits
• [compiler-rt] Complex range (PR #70244)   Zahira Ammarguellat via llvm-commits
• [compiler-rt] Test branch (PR #70505)   Zahira Ammarguellat via llvm-commits
• [llvm] [llvm-profdata] Emit error when counter value is greater than 2^56. (PR #69513)   Zequan Wu via llvm-commits
• [llvm] [llvm-profdata] Emit warning when counter value is greater than 2^56. (PR #69513)   Zequan Wu via llvm-commits
• [llvm] [llvm-profdata] Emit warning when counter value is greater than 2^56. (PR #69513)   Zequan Wu via llvm-commits
• [llvm] [llvm-profdata] Emit warning when counter value is greater than 2^56. (PR #69513)   Zequan Wu via llvm-commits
• [llvm] [Profile] Add binary profile correlation to offload profile metadata at runtime. (PR #69493)   Zequan Wu via llvm-commits
• [compiler-rt] [Profile] Add binary profile correlation to offload profile metadata at runtime. (PR #69493)   Zequan Wu via llvm-commits
• [compiler-rt] [Profile] Refactor profile correlation. (PR #69656)   Zequan Wu via llvm-commits
• [compiler-rt] [Profile] Refactor profile correlation. (PR #69656)   Zequan Wu via llvm-commits
• [lld] [LLD] [MinGW] Hook up --icf=safe to -opt:safeicf (PR #70037)   Zequan Wu via llvm-commits
• [llvm] [llvm-profdata] Emit warning when counter value is greater than 2^56. (PR #69513)   Zequan Wu via llvm-commits
• [llvm] [llvm-profdata] Emit warning when counter value is greater than 2^56. (PR #69513)   Zequan Wu via llvm-commits
• [llvm] [llvm-profdata] Emit warning when counter value is greater than 2^56. (PR #69513)   Zequan Wu via llvm-commits
• [llvm] [Coverage] Use uint64_t when calculate execution count. (PR #70131)   Zequan Wu via llvm-commits
• [compiler-rt] [Profile] Refactor profile correlation. (PR #69656)   Zequan Wu via llvm-commits
• [compiler-rt] [Profile] Refactor profile correlation. (PR #69656)   Zequan Wu via llvm-commits
• [llvm] [Profile] Refactor profile correlation. (PR #69656)   Zequan Wu via llvm-commits
• [compiler-rt] [Profile] Refactor profile correlation. (PR #69656)   Zequan Wu via llvm-commits
• [lld] [LLD] [COFF] Recognize Itanium vtables for ICF (PR #70196)   Zequan Wu via llvm-commits
• [compiler-rt] [Profile] Refactor profile correlation. (PR #69656)   Zequan Wu via llvm-commits
• [llvm] [Profile] Refactor profile correlation. (PR #69656)   Zequan Wu via llvm-commits
• [llvm] [Profile] Refactor profile correlation. (PR #69656)   Zequan Wu via llvm-commits
• [compiler-rt] [Profile] Refactor profile correlation. (PR #69656)   Zequan Wu via llvm-commits
• [llvm] [Profile] Refactor profile correlation. (PR #69656)   Zequan Wu via llvm-commits
• [compiler-rt] [Profile] Refactor profile correlation. (PR #69656)   Zequan Wu via llvm-commits
• [compiler-rt] [Profile] Refactor profile correlation. (PR #69656)   Zequan Wu via llvm-commits
• [compiler-rt] [Profile] Refactor profile correlation. (PR #69656)   Zequan Wu via llvm-commits
• [llvm] [MemDep] Use EarliestEscapeInfo (PR #69727)   Zequan Wu via llvm-commits
• [llvm] [MemDep] Use EarliestEscapeInfo (PR #69727)   Zequan Wu via llvm-commits
• [llvm] [Coverage] Use uint64_t when calculate execution count. (PR #70131)   Zequan Wu via llvm-commits
• [llvm] [Coverage] Fix implicit conversion from int64_t to uint64_t (PR #70131)   Zequan Wu via llvm-commits
• [llvm] [Coverage] Fix implicit conversion from int64_t to uint64_t (PR #70131)   Zequan Wu via llvm-commits
• [compiler-rt] [Profile] Refactor profile correlation. (PR #69656)   Zequan Wu via llvm-commits
• [compiler-rt] [Profile] Refactor profile correlation. (PR #69656)   Zequan Wu via llvm-commits
• [PATCH] D149742: [SLP]Improve isGatherShuffledEntry by trying per-register shuffle.   Zequan Wu via Phabricator via llvm-commits
• [PATCH] D149742: [SLP]Improve isGatherShuffledEntry by trying per-register shuffle.   Zequan Wu via Phabricator via llvm-commits
• [llvm] [AArch64] Only clear kill flags if necessary when merging str (PR #69680)   Zhaoxuan Jiang via llvm-commits
• [llvm] [AArch64] Only clear kill flags if necessary when merging str (PR #69680)   Zhaoxuan Jiang via llvm-commits
• [llvm] [AArch64] Only clear kill flags if necessary when merging str (PR #69680)   Zhaoxuan Jiang via llvm-commits
• [llvm] [AArch64] Only clear kill flags if necessary when merging str (PR #69680)   Zhaoxuan Jiang via llvm-commits
• [llvm] [AArch64] Only clear kill flags if necessary when merging str (PR #69680)   Zhaoxuan Jiang via llvm-commits
• [llvm] [TableGen][NFC] Format CompressInstEmitter (PR #68564)   Zi Xuan Wu via llvm-commits
• [PATCH] D70401: [RISCV] CodeGen of RVE and ilp32e/lp64e ABIs   Zixuan Wu via Phabricator via llvm-commits
• [llvm] [LowerSwitch] Don't let pass manager handle the dependency (PR #68662)   via llvm-commits
• [llvm] [LowerSwitch] Don't let pass manager handle the dependency (PR #68662)   via llvm-commits
• [llvm] [AArch64] Don't generate st2 for 64bit store that can use stp (PR #69901)   via llvm-commits
• [llvm] [AArch64] Don't generate st2 for 64bit store that can use stp (PR #69901)   via llvm-commits
• [llvm] 2ad9fde - [MemDep] Use EarliestEscapeInfo (#69727)   via llvm-commits
• [llvm] [llvm][MC] Fix missing SubArch information when calling lookupTarget (PR #69902)   via llvm-commits
• [compiler-rt] [test][compiler-rt] Mark several tests as UNSUPPORTED on LoongArch (PR #69699)   via llvm-commits
• [llvm] [llvm-profdata] Emit error when counter value is greater than 2^56. (PR #69513)   via llvm-commits
• [llvm] [AMDGPU][wmma] - Add tied wmma intrinsic (PR #69903)   via llvm-commits
• [lld] [lld][COFF]Expose UnifiedLTO options (PR #69904)   via llvm-commits
• [lld] [lld][COFF]Expose UnifiedLTO options (PR #69904)   via llvm-commits
• [lld] [lld][COFF]Expose UnifiedLTO options (PR #69904)   via llvm-commits
• [lld] [lld][COFF]Expose UnifiedLTO options (PR #69904)   via llvm-commits
• [lld] [lld][COFF]Expose UnifiedLTO options (PR #69904)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Legalize G_VECREDUCE_{MIN/MAX} (PR #69461)   via llvm-commits
• [llvm] [SCEV][LV] Invalidate LCSSA exit phis more thoroughly (PR #69909)   via llvm-commits
• [llvm] b0cc47c - [InstCombine] Remove scalable vector extracts to and from the same type (#69702)   via llvm-commits
• [llvm] [AMDGPU] Remove unnecessary conditionality on atomic CSUB pseudo-ops (PR #69914)   via llvm-commits
• [llvm] [CSKY] Don't emit `__multi3` on 32-bit CSKY (PR #69732)   via llvm-commits
• [llvm] [CSKY] Don't emit `__multi3` on 32-bit CSKY (PR #69732)   via llvm-commits
• [llvm] [InstCombine] Extend Phi-Icmp use to include or (PR #67682)   via llvm-commits
• [llvm] [Analysis] Add Scalable field in MemoryLocation.h (PR #69716)   via llvm-commits
• [llvm] [llvm][AArch64][Assembly]: Add FP8 instructions assembly and disassembly. (PR #69632)   via llvm-commits
• [compiler-rt] [HWASan] Prevent same tag for adjacent heap objects (PR #69337)   via llvm-commits
• [llvm] [llvm][AArch64][Assembly]: Add FP8 instructions assembly and disassembly. (PR #69632)   via llvm-commits
• [llvm] [AArch64] Lower mathlib call ldexp into fscale when sve is enabled (PR #67552)   via llvm-commits
• [llvm] [AArch64] Lower mathlib call ldexp into fscale when sve is enabled (PR #67552)   via llvm-commits
• [llvm] [AArch64] Lower mathlib call ldexp into fscale when sve is enabled (PR #67552)   via llvm-commits
• [llvm] [AArch64] Lower mathlib call ldexp into fscale when sve is enabled (PR #67552)   via llvm-commits
• [llvm] b507509 - [AArch64] Allow SVE code generation for fixed-width vectors (#67122)   via llvm-commits
• [llvm] [LoopDist] Update the pragma info of loop distribute, NFC (PR #69825)   via llvm-commits
• [llvm] [llvm][AArch64][Assembly]: Add FP8 instructions assembly and disassembly. (PR #69632)   via llvm-commits
• [llvm] [AMDGPU] ISel for @llvm.amdgcn.cs.chain intrinsic (PR #68186)   via llvm-commits
• [llvm] [AMDGPU] Generic lowering for rint and nearbyint (PR #69596)   via llvm-commits
• [llvm] [indvars] Missing variables at Og: (PR #69920)   via llvm-commits
• [llvm] [AMDGPU] Add writelane and readlane pseudos for SGPR spilling (PR #69923)   via llvm-commits
• [llvm] [AMDGPU] Improve isBasicBlockPrologue helper function (PR #69924)   via llvm-commits
• [llvm] [SVE2.1][Clang][LLVM]Int/FP reduce builtin in Clang and LLVM intrinsic (PR #69926)   via llvm-commits
• [llvm] [SVE2.1][Clang][LLVM]Int/FP reduce builtin in Clang and LLVM intrinsic (PR #69926)   via llvm-commits
• [llvm] [llvm][AArch64][Assembly]: Add FP8 instructions assembly and disassembly. (PR #69632)   via llvm-commits
• [polly] [InstCombine] Canonicalise SextADD + GEP (PR #69581)   via llvm-commits
• [llvm] 4458ba8 - [RISCV][GISel] Select G_SELECT (G_ICMP, A, B) (#68247)   via llvm-commits
• [polly] [InstCombine] Canonicalise SextADD + GEP (PR #69581)   via llvm-commits
• [polly] [InstCombine] Canonicalise SextADD + GEP (PR #69581)   via llvm-commits
• [polly] [InstCombine] Canonicalise SextADD + GEP (PR #69581)   via llvm-commits
• [llvm] [AMDGPU] Add writelane and readlane pseudos for SGPR spilling (PR #69923)   via llvm-commits
• [llvm] 600e38b - [llvm][Release] Add note about binaries to Github release description (#69698)   via llvm-commits
• [llvm] [BasicAA] Make isNotCapturedBeforeOrAt() check for calls more precise (PR #69931)   via llvm-commits
• [llvm] [BasicAA] Make isNotCapturedBeforeOrAt() check for calls more precise (PR #69931)   via llvm-commits
• [llvm] Add Scorecard Action (PR #69933)   via llvm-commits
• [llvm] [AMDGPU] Improve isBasicBlockPrologue helper function (PR #69924)   via llvm-commits
• [llvm] [llvm][AArch64][Assembly]: Add FP8 instructions assembly and disassembly. (PR #69632)   via llvm-commits
• [llvm] 2326b2b - [AMDGPU] Remove unnecessary conditionality on atomic CSUB pseudo-ops (#69914)   via llvm-commits
• [llvm] [llvm][AArch64][Assembly]: Add FP8 instructions assembly and disassembly. (PR #69632)   via llvm-commits
• [llvm] [llvm][AArch64][Assembly]: Add FP8 instructions assembly and disassembly. (PR #69632)   via llvm-commits
• [llvm] [llvm][AArch64][Assembly]: Add FP8 instructions assembly and disassembly. (PR #69632)   via llvm-commits
• [llvm] [llvm][AArch64][Assembly]: Add FP8 instructions assembly and disassembly. (PR #69632)   via llvm-commits
• [llvm] [llvm][AArch64][Assembly]: Add FP8 instructions assembly and disassembly. (PR #69632)   via llvm-commits
• [llvm] [llvm][AArch64][Assembly]: Add FP8 instructions assembly and disassembly. (PR #69632)   via llvm-commits
• [llvm] [llvm][AArch64][Assembly]: Add FP8 instructions assembly and disassembly. (PR #69632)   via llvm-commits
• [llvm] [llvm][AArch64][Assembly]: Add FP8 instructions assembly and disassembly. (PR #69632)   via llvm-commits
• [compiler-rt] [Profile] Add binary profile correlation to offload profile metadata at runtime. (PR #69493)   via llvm-commits
• [llvm] b997ff4 - Revert [clang] Handle templated operators with reversed arguments and [STLExtras] Undo C++20 hack (#69937)   via llvm-commits
• [llvm] [PGO] Sampled instrumentation in PGO to speed up instrumentation binary (PR #69535)   via llvm-commits
• [llvm] [PGO] Sampled instrumentation in PGO to speed up instrumentation binary (PR #69535)   via llvm-commits
• [llvm] [PGO] Sampled instrumentation in PGO to speed up instrumentation binary (PR #69535)   via llvm-commits
• [llvm] SLP/RISCV: add negative test for llrint, increase coverage (PR #69940)   via llvm-commits
• [llvm] [CodeGen] Improve ExpandMemCmp for more efficient non-register aligned sizes handling (PR #69942)   via llvm-commits
• [llvm] [llvm][MC] Fix missing SubArch information when calling lookupTarget (PR #69902)   via llvm-commits
• [llvm] [InstCombine] Decompose an icmp into multiple ranges (PR #69855)   via llvm-commits
• [llvm] SLPVectorizer: vectorize lrint, llrint (PR #69945)   via llvm-commits
• [llvm] [SimplifyCFG] Improve linear mapping in switch lookup tables (PR #67881)   via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   via llvm-commits
• [llvm] [Profile] Add binary profile correlation to offload profile metadata at runtime. (PR #69493)   via llvm-commits
• [llvm] [SimplifyCFG] Improve linear mapping in switch lookup tables (PR #67881)   via llvm-commits
• [llvm] 8fe7e88 - [opt] Properly report errors when loading pass plugins (#69745)   via llvm-commits
• [llvm] 4554eac - Update call-long1.ll   via llvm-commits
• [llvm] [VPlan] Use opaque pointers in VPlan unit test IR (PR #69947)   via llvm-commits
• [llvm] [AMDGPU] Force the third source operand of the MAI instructions to VGPR if no AGPRs are used. (PR #69720)   via llvm-commits
• [llvm] [AMDGPU] Force the third source operand of the MAI instructions to VGPR if no AGPRs are used. (PR #69720)   via llvm-commits
• [lld] e01c7d5 - [LowerGlobalDtors] Skip __cxa_atexit call completely when arg0 is unused (#68758)   via llvm-commits
• [llvm] Port Swift's merge function pass to llvm: merging functions that differ in constants (PR #68235)   via llvm-commits
• [llvm] [AMDGPU] Force the third source operand of the MAI instructions to VGPR if no AGPRs are used. (PR #69720)   via llvm-commits
• [llvm] 3654b93 - Fixed Windows build warnings (#68978)   via llvm-commits
• [llvm] [AMDGPU] Force the third source operand of the MAI instructions to VGPR if no AGPRs are used. (PR #69720)   via llvm-commits
• [llvm] 2e69407 - [AArch64] Don't generate st2 for 64bit store that can use stp (#69901)   via llvm-commits
• [llvm] [AMDGPU] Force the third source operand of the MAI instructions to VGPR if no AGPRs are used. (PR #69720)   via llvm-commits
• [llvm] [CVP] Flip signedness icmp predicate in use level (PR #69948)   via llvm-commits
• [llvm] [CVP] Flip signedness icmp predicate in use level (PR #69948)   via llvm-commits
• [lld] Update stdckdint.h and make it available in pre-C23 modes. (PR #69649)   via llvm-commits
• [llvm] 25da9bb - [RISCV] Allow swapped operands in reduction formation (#68634)   via llvm-commits
• [llvm] 2973feb - [AMDGPU] Force the third source operand of the MAI instructions to VGPR if no AGPRs are used. (#69720)   via llvm-commits
• [llvm] [AMDGPU] Force the third source operand of the MAI instructions to VGPR if no AGPRs are used. (PR #69720)   via llvm-commits
• [llvm] [CodeLayout] Faster basic block reordering, ext-tsp (PR #68617)   via llvm-commits
• [compiler-rt] Update stdckdint.h and make it available in pre-C23 modes. (PR #69649)   via llvm-commits
• [llvm] Update stdckdint.h and make it available in pre-C23 modes. (PR #69649)   via llvm-commits
• [compiler-rt] Update stdckdint.h and make it available in pre-C23 modes. (PR #69649)   via llvm-commits
• [lld] Update stdckdint.h and make it available in pre-C23 modes. (PR #69649)   via llvm-commits
• [llvm] [Github] Add support for building libc docs in Github actions (PR #69824)   via llvm-commits
• [llvm] [Github] Add support for building libc docs in Github actions (PR #69824)   via llvm-commits
• [llvm] [Github] Add support for building libc docs in Github actions (PR #69824)   via llvm-commits
• [llvm] [Github] Add support for building libc docs in Github actions (PR #69824)   via llvm-commits
• [llvm] [VPlan] Use opaque pointers in VPlan unit test IR (PR #69947)   via llvm-commits
• [llvm] [AArch64] Fix tryMergeAdjacentSTG function in PrologEpilog pass (PR #68873)   via llvm-commits
• [llvm] [AMDGPU] Fix GCNRewritePartialRegUses pass: vector regclass is selected instead of scalar. (PR #69957)   via llvm-commits
• [llvm] [OpenMP][OMPIRBuilder] Add support to omp target parallel (PR #67000)   via llvm-commits
• [llvm] [llvm-profdata] Emit warning when counter value is greater than 2^56. (PR #69513)   via llvm-commits
• [llvm] [SystemZ][NFC] Fix a couple of style issues (PR #69958)   via llvm-commits
• [llvm] Update stdckdint.h and make it available in pre-C23 modes. (PR #69649)   via llvm-commits
• [lld] Update stdckdint.h and make it available in pre-C23 modes. (PR #69649)   via llvm-commits
• [compiler-rt] Update stdckdint.h and make it available in pre-C23 modes. (PR #69649)   via llvm-commits
• [lld] Update stdckdint.h and make it available in pre-C23 modes. (PR #69649)   via llvm-commits
• [llvm] Update stdckdint.h and make it available in pre-C23 modes. (PR #69649)   via llvm-commits
• [lld] Update stdckdint.h and make it available in pre-C23 modes. (PR #69649)   via llvm-commits
• [llvm] Update stdckdint.h and make it available in pre-C23 modes. (PR #69649)   via llvm-commits
• [compiler-rt] 9efaff1 - [NFC][lsan] Extract and rename SizeClassMap type from AP64 (#69526)   via llvm-commits
• [compiler-rt] [NFC][lsan] Extract and rename SizeClassMap type from AP64 (PR #69526)   via llvm-commits
• [compiler-rt] [compiler-rt][lsan][Fuchsia] Adjust lsan allocator settings (PR #69401)   via llvm-commits
• [compiler-rt] 54fe7ef - [compiler-rt][lsan][Fuchsia] Adjust lsan allocator settings (#69401)   via llvm-commits
• [compiler-rt] [compiler-rt][lsan][Fuchsia] Adjust lsan allocator settings (PR #69401)   via llvm-commits
• [llvm] -fstack-usage: fix filename for functions in an included file (PR #69896)   via llvm-commits
• [llvm] [InstCombine] Fold selection between less than zero and one (PR #69961)   via llvm-commits
• [llvm] [InstCombine] Fold selection between less than zero and one (PR #69961)   via llvm-commits
• [llvm] [InstCombine] Fold selection between less than zero and one (PR #69961)   via llvm-commits
• [llvm] [InstCombine] Fold selection between less than zero and one (PR #69961)   via llvm-commits
• [llvm] Revert [clang] Handle templated operators with reversed arguments and [STLExtras] Undo C++20 hack (PR #69937)   via llvm-commits
• [llvm] [CodeLayout] Faster basic block reordering, ext-tsp (PR #68617)   via llvm-commits
• [llvm] [BOLT][NFC] Rename cds to cdsort (PR #69966)   via llvm-commits
• [llvm] [BOLT][NFC] Rename cds to cdsort (PR #69966)   via llvm-commits
• [llvm] [BOLT] Rename cds to cdsort (PR #69966)   via llvm-commits
• [llvm] [BOLT] Rename cds to cdsort (PR #69966)   via llvm-commits
• [compiler-rt] [scudo] Avoid splitting aligned allocations on Trusty (PR #69281)   via llvm-commits
• [llvm] 6115b1b - [NVPTX] Add lowering for bitcasts float<->v4i8 (#69960)   via llvm-commits
• [llvm] [RISCV][GISel] Add ISel support for SHXADD_UW and SLLI.UW (PR #69972)   via llvm-commits
• [llvm] 42a3a3b - [ThinLTOBitcodeWriter] Do not crash on a typed declaration (#69564)   via llvm-commits
• [llvm] [TOSA] Add TosaToMLProgram conversion (PR #69787)   via llvm-commits
• [llvm] [llvm-profdata] Emit warning when counter value is greater than 2^56. (PR #69513)   via llvm-commits
• [llvm] [TOSA] Add TosaToMLProgram conversion (PR #69787)   via llvm-commits
• [llvm] [TOSA] Add TosaToMLProgram conversion (PR #69787)   via llvm-commits
• [llvm] [TOSA] Add TosaToMLProgram conversion (PR #69787)   via llvm-commits
• [llvm] [TOSA] Add TosaToMLProgram conversion (PR #69787)   via llvm-commits
• [llvm] [TOSA] Add TosaToMLProgram conversion (PR #69787)   via llvm-commits
• [llvm] [TOSA] Add TosaToMLProgram conversion (PR #69787)   via llvm-commits
• [llvm] [llvm-profdata] Emit warning when counter value is greater than 2^56. (PR #69513)   via llvm-commits
• [llvm] [RISCV] Add an experimental pseudoinstruction to represent a rematerializable constant materialization sequence. (PR #69983)   via llvm-commits
• [llvm] [RISCV] Add an experimental pseudoinstruction to represent a rematerializable constant materialization sequence. (PR #69983)   via llvm-commits
• [llvm] cc45503 - [X86][GlobalISel] Reorganize shift scalar tests (NFC) (#68232)   via llvm-commits
• [llvm] [NewPM][CodeGen] Add NPM support to llc (PR #69879)   via llvm-commits
• [llvm] [LowerSwitch] Don't let pass manager handle the dependency (PR #68662)   via llvm-commits
• [llvm] [AArch64] Lower mathlib call ldexp into fscale when sve is enabled (PR #67552)   via llvm-commits
• [llvm] [AArch64] Lower mathlib call ldexp into fscale when sve is enabled (PR #67552)   via llvm-commits
• [llvm] d5b0ad6 - -fstack-usage: fix filename for functions in an included file (#69896)   via llvm-commits
• [lld] [lld][COFF]Expose UnifiedLTO options (PR #69904)   via llvm-commits
• [llvm] dbe8def - [AArch64] Lower mathlib call ldexp into fscale when sve is enabled (#67552)   via llvm-commits
• [llvm] [AArch64] Lower mathlib call ldexp into fscale when sve is enabled (PR #67552)   via llvm-commits
• [llvm] [llvm][MC] Fix missing SubArch information when calling lookupTarget (PR #69902)   via llvm-commits
• [llvm] [InstCombine] optimize powi(X,Y) * X with Ofast (PR #69998)   via llvm-commits
• [llvm] [InstCombine] optimize powi(X,Y) * X with Ofast (PR #69998)   via llvm-commits
• [llvm] [BOLT] Fix incorrect basic block output addresses (PR #70000)   via llvm-commits
• [llvm] [Github] Use API to fetch PR diff for docs action (PR #70001)   via llvm-commits
• [llvm] [CVP] Flip signedness icmp predicate in use level (PR #69948)   via llvm-commits
• [llvm] [InstCombine] Fold selection between less than zero and one (PR #69961)   via llvm-commits
• [llvm] [InstCombine] Fold selection between less than zero and one (PR #69961)   via llvm-commits
• [llvm] f3b20cb - [IPSCCP] Variable not visible at Og. (#66745)   via llvm-commits
• [llvm] 2bc9358 - [DAG] Constant Folding for U/SMUL_LOHI (#69437)   via llvm-commits
• [llvm] [AMDGPU] Add writelane and readlane pseudos for SGPR spilling (PR #69923)   via llvm-commits
• [compiler-rt] [TSAN] Add __tsan_check_no_mutexes_held helper (PR #69372)   via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Introduce isRegType to check for legal types, instead of checking bit width. (PR #68189)   via llvm-commits
• [llvm] 300190f - [AMDGPU] Regenerate udiv.ll   via llvm-commits
• [llvm] d1d3aa3 - [TableGen][NFC] Add record kind to `Record` class (#69919)   via llvm-commits
• [llvm] [InstCombine] Fold selection between less than zero and one (PR #69961)   via llvm-commits
• [llvm] [InstCombine] optimize powi(X,Y) * X with Ofast (PR #69998)   via llvm-commits
• [llvm] 3fb5b18 - Revert 24633ea and 760e7d0 "Enable FoldImmediate for X86"   via llvm-commits
• [llvm] [DAG] Remove OneUse restriction when folding (shl (add x, c1), c2) (PR #69105)   via llvm-commits
• [llvm] [AMDGPU] Fix subreg check in the SIFixSGPRCopies (PR #70007)   via llvm-commits
• [llvm] [IR] Use `const Type*` in DataLayout (PR #70009)   via llvm-commits
• [llvm] [IR] Use `const Type*` in DataLayout (PR #70009)   via llvm-commits
• [llvm] [RISCV] Macro-fusion support for veyron-v1 CPU. (PR #70012)   via llvm-commits
• [llvm] eb86de6 - [IR] Require that ptrmask mask matches pointer index size (#69343)   via llvm-commits
• [llvm] [docs][RISCV] List Zcmp and Zicbop as "Supported" rather than "Assembly support (PR #68717)   via llvm-commits
• [llvm] [NewPM][CodeGen] Add NPM support to llc (PR #69879)   via llvm-commits
• [llvm] [VectorCombine] Add special handling for truncating shuffles (PR #70013)   via llvm-commits
• [llvm] [VectorCombine] Add special handling for truncating shuffles (PR #70013)   via llvm-commits
• [llvm] [ARM] Fix __stack_chk_guard access when non-zero "PIC Level" is used with static relocation model (PR #70014)   via llvm-commits
• [llvm] [llvm][MC] Fix missing SubArch information when calling lookupTarget (PR #69902)   via llvm-commits
• [llvm] [llvm][MC] Fix missing SubArch information when calling lookupTarget (PR #69902)   via llvm-commits
• [llvm] [AMDGPU] Add dynamic LDS size implicit kernel argument to CO-v5 (PR #65273)   via llvm-commits
• [llvm] [AMDGPU] Add dynamic LDS size implicit kernel argument to CO-v5 (PR #65273)   via llvm-commits
• [llvm] [IR] Require index width to be ule pointer width (PR #70015)   via llvm-commits
• [llvm] [AMDGPU] ISel for @llvm.amdgcn.cs.chain intrinsic (PR #68186)   via llvm-commits
• [lld] [lld][COFF]Expose UnifiedLTO options (PR #69904)   via llvm-commits
• [lld] [lld][COFF]Expose UnifiedLTO options (PR #69904)   via llvm-commits
• [llvm] 945e943 - [AMDGPU] Fix subreg check in the SIFixSGPRCopies (#70007)   via llvm-commits
• [llvm] [AMDGPU] ISel for @llvm.amdgcn.cs.chain intrinsic (PR #68186)   via llvm-commits
• [llvm] [AMDGPU] ISel for @llvm.amdgcn.cs.chain intrinsic (PR #68186)   via llvm-commits
• [llvm] [PowerPC] Support tail call optimization on AIX (PR #70016)   via llvm-commits
• [llvm] [SelectionDAG] Salvage debug info for non-constant ADDs (PR #68981)   via llvm-commits
• [llvm] [CVP] Flip signedness icmp predicate in use level (PR #69948)   via llvm-commits
• [llvm] [CVP] Flip signedness icmp predicate in use level (PR #69948)   via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   via llvm-commits
• [llvm] [ValueTracking] isNonZero sub of ptr2int's with recursive GEP (PR #68680)   via llvm-commits
• [lld] [lld][COFF]Expose UnifiedLTO and PassPipeline Options (PR #69904)   via llvm-commits
• [lld] [lld][COFF]Expose UnifiedLTO and PassPipeline Options (PR #69904)   via llvm-commits
• [llvm] [InstCombine] Fold selection between less than zero and one (PR #69961)   via llvm-commits
• [llvm] [ValueTracking] isNonZero sub of ptr2int's with recursive GEP (PR #68680)   via llvm-commits
• [llvm] [InstCombine] Fold selection between less than zero and one (PR #69961)   via llvm-commits
• [llvm] [InstCombine] Fold selection between less than zero and one (PR #69961)   via llvm-commits
• [llvm] [CVP] Flip signedness icmp predicate in use level (PR #69948)   via llvm-commits
• [llvm] [AArch64][SVE2] Use rshrnb for masked stores (PR #70026)   via llvm-commits
• [llvm] [InstCombine] Fold selection between less than zero and one (PR #69961)   via llvm-commits
• [llvm] [InstCombine] Fold selection between less than zero and one (PR #69961)   via llvm-commits
• [llvm] [AArch64][SVE2] Use rshrnb for masked stores (PR #70026)   via llvm-commits
• [llvm] b61d655 - [CVP] Flip signedness icmp predicate in use level (#69948)   via llvm-commits
• [llvm] [CVP] Flip signedness icmp predicate in use level (PR #69948)   via llvm-commits
• [llvm] [InstCombine] optimize powi(X,Y) * X with Ofast (PR #69998)   via llvm-commits
• [llvm] [InstCombine] Fold selection between less than zero and one (PR #69961)   via llvm-commits
• [llvm] [InstCombine] Fold selection between less than zero and one (PR #69961)   via llvm-commits
• [llvm] [AMDGPU] GCNRegPressure printing pass for testing. (PR #70031)   via llvm-commits
• [llvm] [AArch64] Prevent argument promotion of vector with size > 128 bits (PR #70034)   via llvm-commits
• [llvm] [RISCV][NFC] Fix comments in foldMemoryOperandImpl (PR #70033)   via llvm-commits
• [llvm] 4a074f3 - [InstCombine] Extend Phi-Icmp use to include or (#67682)   via llvm-commits
• [llvm] [InstCombine] Extend Phi-Icmp use to include or (PR #67682)   via llvm-commits
• [llvm] [ValueTracking] isNonZero sub of ptr2int's with recursive GEP (PR #68680)   via llvm-commits
• [llvm] [llvm-profdata] Emit warning when counter value is greater than 2^56. (PR #69513)   via llvm-commits
• [llvm] [InstCombine] Fold selection between less than zero and one (PR #69961)   via llvm-commits
• [compiler-rt] [AMDGPU][MachineScheduler] Alternative way to control excess RP. (PR #68004)   via llvm-commits
• [llvm] [AMDGPU][MachineScheduler] Alternative way to control excess RP. (PR #68004)   via llvm-commits
• [lld] [AMDGPU][MachineScheduler] Alternative way to control excess RP. (PR #68004)   via llvm-commits
• [lld] [clang] Correct end for the `CastOperation.OpRange` (PR #69480)   via llvm-commits
• [compiler-rt] [clang] Correct end for the `CastOperation.OpRange` (PR #69480)   via llvm-commits
• [llvm] [clang] Correct end for the `CastOperation.OpRange` (PR #69480)   via llvm-commits
• [llvm] [clang] Correct end for the `CastOperation.OpRange` (PR #69480)   via llvm-commits
• [llvm] [clang] Correct end for the `CastOperation.OpRange` (PR #69480)   via llvm-commits
• [lld] [clang] Correct end for the `CastOperation.OpRange` (PR #69480)   via llvm-commits
• [lld] [clang] Correct end for the `CastOperation.OpRange` (PR #69480)   via llvm-commits
• [lld] [clang] Correct end for the `CastOperation.OpRange` (PR #69480)   via llvm-commits
• [compiler-rt] [clang] Correct end for the `CastOperation.OpRange` (PR #69480)   via llvm-commits
• [compiler-rt] [clang] Correct end for the `CastOperation.OpRange` (PR #69480)   via llvm-commits
• [llvm] [clang] Correct end for the `CastOperation.OpRange` (PR #69480)   via llvm-commits
• [compiler-rt] [clang] Correct end for the `CastOperation.OpRange` (PR #69480)   via llvm-commits
• [compiler-rt] [AMDGPU][MachineScheduler] Alternative way to control excess RP. (PR #68004)   via llvm-commits
• [compiler-rt] [AMDGPU][MachineScheduler] Alternative way to control excess RP. (PR #68004)   via llvm-commits
• [llvm] [AMDGPU][MachineScheduler] Alternative way to control excess RP. (PR #68004)   via llvm-commits
• [lld] [AMDGPU][MachineScheduler] Alternative way to control excess RP. (PR #68004)   via llvm-commits
• [llvm] [SLP] Fix condition for avoiding scheduling of instructions (PR #70035)   via llvm-commits
• [lld] [LLD] [MinGW] Hook up --icf=safe to -opt:safeicf (PR #70037)   via llvm-commits
• [llvm] [SLP] Fix condition for avoiding scheduling of instructions (PR #70035)   via llvm-commits
• [llvm] [AMDGPU] ISel for @llvm.amdgcn.cs.chain intrinsic (PR #68186)   via llvm-commits
• [llvm] [AMDGPU] ISel for @llvm.amdgcn.cs.chain intrinsic (PR #68186)   via llvm-commits
• [llvm] [DAG] SimplifyDemandedBits - ensure we demand the high bits for shl nsw/nuw ops (PR #70041)   via llvm-commits
• [llvm] [DAG] SimplifyDemandedBits - ensure we demand the high bits for shl nsw/nuw ops (PR #70041)   via llvm-commits
• [llvm] [SimplifyCFG] Delete the unnecessary range check for small mask operation (PR #65835)   via llvm-commits
• [llvm] [InstCombine] Fold xored one-complemented operand comparisons (PR #69882)   via llvm-commits
• [llvm] [InstCombine] Fold xored one-complemented operand comparisons (PR #69882)   via llvm-commits
• [llvm] [InstCombine] Fold xored one-complemented operand comparisons (PR #69882)   via llvm-commits
• [llvm] [SimplifyCFG] Delete the unnecessary range check for small mask operation (PR #65835)   via llvm-commits
• [llvm] [SimplifyCFG] Delete the unnecessary range check for small mask operation (PR #65835)   via llvm-commits
• [llvm] [InstCombine] Fold xored one-complemented operand comparisons (PR #69882)   via llvm-commits
• [llvm] 8e31acf - [VectorCombine] Add special handling for truncating shuffles (#70013)   via llvm-commits
• [llvm] [UTC] Recognise CHECK lines with globals matched literally (PR #70050)   via llvm-commits
• [llvm] Improvements to RS4GC BDV Algorithm (PR #69795)   via llvm-commits
• [llvm] Improvements to RS4GC BDV Algorithm (PR #69795)   via llvm-commits
• [llvm] Improvements to RS4GC BDV Algorithm (PR #69795)   via llvm-commits
• [llvm] Improvements to RS4GC BDV Algorithm (PR #69795)   via llvm-commits
• [llvm] Improvements to RS4GC BDV Algorithm (PR #69795)   via llvm-commits
• [llvm] Improvements to RS4GC BDV Algorithm (PR #69795)   via llvm-commits
• [llvm] Improvements to RS4GC BDV Algorithm (PR #69795)   via llvm-commits
• [llvm] Improvements to RS4GC BDV Algorithm (PR #69795)   via llvm-commits
• [llvm] Improvements to RS4GC BDV Algorithm (PR #69795)   via llvm-commits
• [llvm] Improvements to RS4GC BDV Algorithm (PR #69795)   via llvm-commits
• [llvm] [InstCombine] Fold xored one-complemented operand comparisons (PR #69882)   via llvm-commits
• [llvm] [InstCombine] Fold xored one-complemented operand comparisons (PR #69882)   via llvm-commits
• [llvm] 7cce908 - [RISCV][GISel][NFC] Correct the test case in constant32.mir (#70003)   via llvm-commits
• [llvm] Improvements to RS4GC BDV Algorithm (PR #69795)   via llvm-commits
• [llvm] [AMDGPU] ISel for @llvm.amdgcn.cs.chain intrinsic (PR #68186)   via llvm-commits
• [llvm] [InstCombine] Fold xored one-complemented operand comparisons (PR #69882)   via llvm-commits
• [llvm] [InstCombine] Fold xored one-complemented operand comparisons (PR #69882)   via llvm-commits
• [llvm] 93f8e52 - [FunctionAttrs] Improve handling of alias-preserving intrinsic calls (#68453)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Legalize NEON smin,smax,umin,umax,fmin,fmax intrinsics (PR #70060)   via llvm-commits
• [llvm] f65cd04 - [ModuleInliner] Remove an extraneous pair of std::push_heap and std::pop_heap (NFC) (#69672)   via llvm-commits
• [compiler-rt] d2ce3e9 - [builtins] Support building the 128-bit float functions on ld80 platforms (#68132)   via llvm-commits
• [llvm] [CodeLayout] Faster basic block reordering, ext-tsp (PR #68617)   via llvm-commits
• [llvm] 9f592cb - [GISel] Pass MPO and VA to assignValueToAddress by const reference. NFC (#69810)   via llvm-commits
• [llvm] [llvm][AArch64][Assembly]: Add FP8 instructions assembly and disassembly. (PR #69632)   via llvm-commits
• [llvm] [llvm][AArch64][Assembly]: Add FP8 instructions assembly and disassembly. (PR #69632)   via llvm-commits
• [compiler-rt] ad7611d - [builtins] Fix floattitf.c etc. compilation on Solaris/SPARC (#70058)   via llvm-commits
• [llvm] [InstCombine] Fold xored one-complemented operand comparisons (PR #69882)   via llvm-commits
• [llvm] [TOSA] Add TosaToMLProgram conversion (PR #69787)   via llvm-commits
• [llvm] [TOSA] Add TosaToMLProgram conversion (PR #69787)   via llvm-commits
• [llvm] 211dc4a - [Analysis] Add Scalable field in MemoryLocation.h (#69716)   via llvm-commits
• [llvm] 4c28e66 - [ADT] Support appending multiple values (#69891)   via llvm-commits
• [llvm] [ValueTracking] isNonZero sub of ptr2int's with recursive GEP (PR #68680)   via llvm-commits
• [llvm] [ValueTracking] isNonZero sub of ptr2int's with recursive GEP (PR #68680)   via llvm-commits
• [llvm] [ValueTracking] isNonZero sub of ptr2int's with recursive GEP (PR #68680)   via llvm-commits
• [llvm] [DAGCombiner] Fix misuse of getZeroExtendInReg in SimplifySelectCC. (PR #70066)   via llvm-commits
• [llvm] [ValueTracking] isNonZero sub of ptr2int's with recursive GEP (PR #68680)   via llvm-commits
• [llvm] [libc] Fix printf long double inf, bitcast in msan (PR #70067)   via llvm-commits
• [llvm] [TOSA] Add TosaToMLProgram conversion (PR #69787)   via llvm-commits
• [llvm] [libc] Fix printf long double inf, bitcast in msan (PR #70067)   via llvm-commits
• [llvm] [llvm][AArch64][Assembly]: Add FP8 instructions assembly and disassembly. (PR #69632)   via llvm-commits
• [llvm] [Github] Add support for building libc docs in Github actions (PR #69824)   via llvm-commits
• [llvm] [Github] Add support for building libc docs in Github actions (PR #69824)   via llvm-commits
• [llvm] [Github] Add support for building libc docs in Github actions (PR #69824)   via llvm-commits
• [llvm] [TOSA] Add TosaToMLProgram conversion (PR #69787)   via llvm-commits
• [llvm] [TOSA] Add TosaToMLProgram conversion (PR #69787)   via llvm-commits
• [llvm] [InstCombine] enable more factorization in SimplifyUsingDistributiveLaws (PR #69892)   via llvm-commits
• [llvm] [libc] Fix printf long double inf, bitcast in msan (PR #70067)   via llvm-commits
• [llvm] [GISel] Make assignValueToReg take CCValAssign by const reference. (PR #70086)   via llvm-commits
• [llvm] [InstCombine] Fold selection between less than zero and one (PR #69961)   via llvm-commits
• [llvm] [NFC][SLP] Add test case for issue #69670. (PR #70088)   via llvm-commits
• [llvm] [BOLT] Fix build issues after #69836 (PR #70087)   via llvm-commits
• [llvm] [XCOFF] make related SD symbols as isFunction (PR #69553)   via llvm-commits
• [llvm] [XCOFF] make related SD symbols as isFunction (PR #69553)   via llvm-commits
• [llvm] Bfi precision (PR #66285)   via llvm-commits
• [llvm] [AArch64] Enable "sink-and-fold" in MachineSink by default (PR #67432)   via llvm-commits
• [llvm] [InstCombine] Fold xored one-complemented operand comparisons (PR #69882)   via llvm-commits
• [llvm] [RISCV][GlobalISel] Select G_GLOBAL_VALUE (PR #70091)   via llvm-commits
• [llvm] [BOLT] Fix incorrect basic block output addresses (PR #70000)   via llvm-commits
• [llvm] [InstCombine] Fold xored one-complemented operand comparisons (PR #69882)   via llvm-commits
• [llvm] [LoopPeeling] Fix weights updating of peeled off branches (PR #70094)   via llvm-commits
• [llvm] [RISCV][GlobalISel] Select G_GLOBAL_VALUE (PR #70091)   via llvm-commits
• [llvm] [AArch64] Disable by default MachineSink sink-and-fold (PR #70101)   via llvm-commits
• [llvm] [BOLT] Fix incorrect basic block output addresses (PR #70000)   via llvm-commits
• [llvm] [BOLT] Fix incorrect basic block output addresses (PR #70000)   via llvm-commits
• [llvm] [LoopPeeling] Fix weights updating of peeled off branches (PR #70094)   via llvm-commits
• [llvm] 20020c1 - [DAGCombiner] Fix misuse of getZeroExtendInReg in SimplifySelectCC. (#70066)   via llvm-commits
• [llvm] 117041d - [NFC][SLP] Add test case for issue #69670. (#70088)   via llvm-commits
• [llvm] [InstCombine] Fold xored one-complemented operand comparisons (PR #69882)   via llvm-commits
• [llvm] [llvm][support] Show name of overlapping cl option (PR #70108)   via llvm-commits
• [llvm] [RISCV] Mark V0 regclasses as larger superclasses of non-V0 classes (PR #70109)   via llvm-commits
• [llvm] [SLP] Improve gather tree nodes matching when users are PHIs. (PR #70111)   via llvm-commits
• [llvm] [RISCV][GlobalISel] Select G_GLOBAL_VALUE (PR #70091)   via llvm-commits
• [llvm] [LLVM][AArch64][Assembly]: Add FAMINMAX assembly/disasse… (PR #70115)   via llvm-commits
• [llvm] [LLVM][AArch64][Assembly]: Add FAMINMAX assembly/disasse… (PR #70115)   via llvm-commits
• [llvm] [LLVM][AArch64][Assembly]: Add FAMINMAX assembly/disasse… (PR #70115)   via llvm-commits
• [llvm] [LLVM][AArch64][Assembly]: Add FAMINMAX assembly/disasse… (PR #70115)   via llvm-commits
• [llvm] [Offloading][NFC] Move creation of offloading entries from OpenMP (PR #70116)   via llvm-commits
• [llvm] [InstCombine] Add combines/simplifications for `llvm.ptrmask` (PR #67166)   via llvm-commits
• [llvm] [InstCombine] Add combines/simplifications for `llvm.ptrmask` (PR #67166)   via llvm-commits
• [llvm] [InstCombine] Add combines/simplifications for `llvm.ptrmask` (PR #67166)   via llvm-commits
• [llvm] [Offloading][NFC] Move creation of offloading entries from OpenMP (PR #70116)   via llvm-commits
• [llvm] [InstCombine] Improve eq/ne by parts to handle ult/ugt equality pattern (PR #69884)   via llvm-commits
• [llvm] 1b11729 - [AArch64][GlobalISel] Add support for post-indexed loads/stores. (#69532)   via llvm-commits
• [llvm] [InstCombine] Improve eq/ne by parts to handle ult/ugt equality pattern (PR #69884)   via llvm-commits
• [llvm] [InstCombine] Improve eq/ne by parts to handle ult/ugt equality pattern (PR #69884)   via llvm-commits
• [llvm] b2accb9 - [RISCV] Mark V0 regclasses as larger superclasses of non-V0 classes (#70109)   via llvm-commits
• [lld] [ELF] Suppress --no-allow-shlib-undefined diagnostic when a SharedSymbol is overridden by a hidden visibility Defined which is later discarded (PR #70130)   via llvm-commits
• [lld] [ELF] Suppress --no-allow-shlib-undefined diagnostic when a SharedSymbol is overridden by a hidden visibility Defined which is later discarded (PR #70130)   via llvm-commits
• [llvm] [RISCV][GISel] Falling back to SDISel for scalable vector type values (PR #70133)   via llvm-commits
• [llvm] [llvm][AArch64][Assembly]: Add FP8FMA assembly and disassembly. (PR #70134)   via llvm-commits
• [llvm] [llvm][AArch64][Assembly]: Add FP8FMA assembly and disassembly. (PR #70134)   via llvm-commits
• [llvm] [AMDGPU] Set Write64Bit = Write64Bit on V_MOV_B64 (PR #70135)   via llvm-commits
• [llvm] [llvm][AArch64][Assembly]: Add FP8FMA assembly and disassembly. (PR #70134)   via llvm-commits
• [llvm] [llvm][AArch64][Assembly]: Add FP8FMA assembly and disassembly. (PR #70134)   via llvm-commits
• [llvm] [BOLT] Fix address mapping for ICP code (PR #70136)   via llvm-commits
• [llvm] [RISCV] Remove RISCVISD opcodes for LGA, LA_TLS_IE, and LA_TLS_GD. (PR #70137)   via llvm-commits
• [llvm] [RISCV] Remove RISCVISD opcodes for LGA, LA_TLS_IE, and LA_TLS_GD. (PR #70137)   via llvm-commits
• [llvm] [llvm][AArch64][Assembly]: Add FP8FMA assembly and disassembly. (PR #70134)   via llvm-commits
• [llvm] [libc] Fix printf long double inf, bitcast in msan (PR #70067)   via llvm-commits
• [llvm] 2f4328e - [GISel] Make assignValueToReg take CCValAssign by const reference. (#70086)   via llvm-commits
• [llvm] [llvm][AArch64][Assembly]: Add FP8FMA assembly and disassembly. (PR #70134)   via llvm-commits
• [llvm] [llvm][AArch64][Assembly]: Add FP8FMA assembly and disassembly. (PR #70134)   via llvm-commits
• [llvm] [LV] Change loops' interleave count computation (PR #70141)   via llvm-commits
• [llvm] [CodeLayout] Faster basic block reordering, ext-tsp (PR #68617)   via llvm-commits
• [llvm] cdcaef8 - [RISCV][GISel] Add ISel support for SHXADD_UW and SLLI.UW (#69972)   via llvm-commits
• [llvm] 3324776 - [SLP] Improve gather tree nodes matching when users are PHIs. (#70111)   via llvm-commits
• [llvm] [BOLT] Use direct storage for Label annotations. NFCI. (PR #70147)   via llvm-commits
• [compiler-rt] 05a4212 - [builtins] Avoid using long double in generic sources (#69754)   via llvm-commits
• [llvm] [CodeLayout] Faster basic block reordering, ext-tsp (PR #68617)   via llvm-commits
• [llvm] [CodeLayout] Faster basic block reordering, ext-tsp (PR #68617)   via llvm-commits
• [llvm] [AArch64][ABI] Pass v8f32 on the stack (PR #69729)   via llvm-commits
• [llvm] Always use pthread_rwlock on Apple platforms (PR #70151)   via llvm-commits
• [llvm] Always use pthread_rwlock on Apple platforms (PR #70151)   via llvm-commits
• [llvm] [AMDGPU] ISel for @llvm.amdgcn.cs.chain intrinsic (PR #68186)   via llvm-commits
• [llvm] ac24238 - [LowerSwitch] Don't let pass manager handle the dependency (#68662)   via llvm-commits
• [llvm] [LowerSwitch] Don't let pass manager handle the dependency (PR #68662)   via llvm-commits
• [llvm] [InstCombine] Convert or concat to fshl if opposite or concat exists (PR #68502)   via llvm-commits
• [llvm] [AMDGPU] Make getDWordFromOffset robust against exotic types (PR #70153)   via llvm-commits
• [lld] [lld][COFF]Expose UnifiedLTO and PassPipeline Options (PR #69904)   via llvm-commits
• [llvm] 0555c9a - [llvm][support] Show name of overlapping cl option (#70108)   via llvm-commits
• [llvm] [AMDGPU] Improve isBasicBlockPrologue helper function (PR #69924)   via llvm-commits
• [llvm] [AMDGPU] Add writelane and readlane pseudos for SGPR spilling (PR #69923)   via llvm-commits
• [llvm] [InstCombine] Fold selection between less than zero and one (PR #69961)   via llvm-commits
• [llvm] 69ade08 - [RISCV][NFC] Fix comments in foldMemoryOperandImpl (#70033)   via llvm-commits
• [compiler-rt] e3cf80c - BlockFrequencyInfoImpl: Avoid big numbers, increase precision for small spreads   via llvm-commits
• [polly] [ADT] Rename llvm::erase_value to llvm::erase (NFC) (PR #70156)   via llvm-commits
• [llvm] [Internalize] Preserve built-in functions (PR #69216)   via llvm-commits
• [llvm] [Internalize] Preserve built-in functions (PR #69216)   via llvm-commits
• [llvm] [AA][ScopedNoAliasAA] Returns ModRef when an alias exists (PR #70159)   via llvm-commits
• [llvm] [AA][ScopedNoAliasAA] Returns ModRef when an alias exists (PR #70159)   via llvm-commits
• [llvm] f2441a0 - [LoongArch] Set some operations action for LSX and LASX   via llvm-commits
• [llvm] 9abf3df - [ValueTracking] Analyze `Select` in `isKnownNonEqual`. (#68427)   via llvm-commits
• [llvm] [CSKY] Don't emit `__multi3` on 32-bit CSKY (PR #69732)   via llvm-commits
• [llvm] [CSKY] Don't emit `__multi3` on 32-bit CSKY (PR #69732)   via llvm-commits
• [lld] lld allow hidden symbols shared with dso (PR #70163)   via llvm-commits
• [lld] lld allow hidden symbols shared with dso (PR #70163)   via llvm-commits
• [llvm] [PassTimingInfo] Handle nested timers in passes (PR #70165)   via llvm-commits
• [llvm] [WIP] For Asan instrumented global, emit two symbols, one with actual size and other with instrumented size. (PR #70166)   via llvm-commits
• [llvm] [WIP] For Asan instrumented global, emit two symbols, one with actual size and other with instrumented size. (PR #70166)   via llvm-commits
• [compiler-rt] Changes to support running tests for Windows arm64 asan (PR #66973)   via llvm-commits
• [llvm] [NewPM][CodeGen] Add NPM support to llc (PR #69879)   via llvm-commits
• [llvm] [NewPM][CodeGen] Add NPM support to llc (PR #69879)   via llvm-commits
• [llvm] [WIP] For Asan instrumented global, emit two symbols, one with actual size and other with instrumented size. (PR #70166)   via llvm-commits
• [llvm] [ASAN] For Asan instrumented global, emit two symbols, one with actual size and other with instrumented size. (PR #70166)   via llvm-commits
• [llvm] [ASAN] For Asan instrumented global, emit two symbols, one with actual size and other with instrumented size. (PR #70166)   via llvm-commits
• [llvm] [ASAN] For Asan instrumented global, emit two symbols, one with actual size and other with instrumented size. (PR #70166)   via llvm-commits
• [llvm] [ASAN] For Asan instrumented global, emit two symbols, one with actual size and other with instrumented size. (PR #70166)   via llvm-commits
• [llvm] [PassBuilder] Add a mechanism for adding passbuilder callbacks for static builds (PR #70171)   via llvm-commits
• [llvm] [AMDGPU] ISel for @llvm.amdgcn.cs.chain intrinsic (PR #68186)   via llvm-commits
• [llvm] [BOLT] Reduce the number of emitted symbols. NFCI. (PR #70175)   via llvm-commits
• [llvm] [BOLT] Use direct storage for Label annotations. NFCI. (PR #70147)   via llvm-commits
• [llvm] [AArch64,ELF] Restrict MOVZ/MOVK to non-PIC large code model (PR #70178)   via llvm-commits
• [llvm] [SelectionDAG] Salvage debug info for non-constant ADDs (PR #68981)   via llvm-commits
• [llvm] [BOLT] Use Label annotation instead of EHLabel pseudo. NFCI. (PR #70179)   via llvm-commits
• [llvm] [AArch64,ELF] Restrict MOVZ/MOVK to non-PIC large code model (PR #70178)   via llvm-commits
• [llvm] [ASAN] Add "asan_instrumented" llvm ir attribute to identify AddressSanitizer instrumented globals (PR #68865)   via llvm-commits
• [llvm] b81bfea - [llvm][TableGen] Add a README to the main TableGen folder (#69943)   via llvm-commits
• [llvm] d8abce1 - [lldb][AArch64] Read mte_ctrl register from core files (#69689)   via llvm-commits
• [compiler-rt] [libc++] Implement ranges::iota (PR #68494)   via llvm-commits
• [llvm] [libc++] Implement ranges::iota (PR #68494)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Add support for pre-indexed loads/stores. (PR #70185)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Add support for pre-indexed loads/stores. (PR #70185)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Add support for pre-indexed loads/stores. (PR #70185)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Add support for pre-indexed loads/stores. (PR #70185)   via llvm-commits
• [llvm] Disable memtag sanitization for global fnptrs going into .ctors (PR #70186)   via llvm-commits
• [llvm] [AArch64] Disable by default MachineSink sink-and-fold (PR #70101)   via llvm-commits
• [llvm] 9d35387 - [AArch64] Disable by default MachineSink sink-and-fold (#70101)   via llvm-commits
• [llvm] [AMDGPU] Fold uniform readfirstlane + cndmask (PR #70188)   via llvm-commits
• [llvm] [InstCombine] Fold xored one-complemented operand comparisons (PR #69882)   via llvm-commits
• [llvm] 3ab03ad - [SelectionDAG] Salvage debug info for non-constant ADDs (#68981)   via llvm-commits
• [llvm] [SelectionDAG] Salvage debug info for non-constant ADDs (PR #68981)   via llvm-commits
• [llvm] [AMDGPU] Fold uniform readfirstlane + cndmask (PR #70188)   via llvm-commits
• [llvm] Reapply inline spiller subranges (PR #70194)   via llvm-commits
• [lld] [LLD] [COFF] Recognize Itanium vtables for ICF (PR #70196)   via llvm-commits
• [lld] 6d66440 - [LLD] [MinGW] Hook up --icf=safe to -opt:safeicf (#70037)   via llvm-commits
• [llvm] ✨ [Sema, Lex, Parse] Preprocessor embed in C and C++ (and Obj-C and Obj-C++ by-proxy) (PR #68620)   via llvm-commits
• [llvm] [InstCombine] Fold selection between less than zero and one (PR #69961)   via llvm-commits
• [llvm] [AggressiveInstCombine] Ignore debug instructions when load combining (PR #70200)   via llvm-commits
• [llvm] [AggressiveInstCombine] Ignore debug instructions when load combining (PR #70200)   via llvm-commits
• [llvm] d1e3d32 - [AMDGPU][NFCI] Decouple actual register encodings from HWEncoding values. (#69452)   via llvm-commits
• [llvm] [llvm][AArch64][Assembly]: Add FP8 instructions assembly and disassembly. (PR #69632)   via llvm-commits
• [llvm] LoopVectorize/test: clean up intrinsic.ll, regen using UTC (NFC) (PR #70202)   via llvm-commits
• [llvm] Scalarizer: add negative test for lrint, llrint (PR #70203)   via llvm-commits
• [llvm] [LLVM][AArch64][Assembly]: Add FAMINMAX assembly/disasse… (PR #70115)   via llvm-commits
• [llvm] [LLVM][AArch64][Assembly]: Add FAMINMAX assembly/disasse… (PR #70115)   via llvm-commits
• [llvm] [LLVM][AArch64][Assembly]: Add FAMINMAX assembly/disasse… (PR #70115)   via llvm-commits
• [llvm] [AMDGPU] Cleanup hasUnwantedEffectsWhenEXECEmpty function (PR #70206)   via llvm-commits
• [llvm] [InstCombine] Canonicalise SextADD + GEP (PR #69581)   via llvm-commits
• [llvm] 9104e82 - [SystemZ][NFC] Fix a couple of style issues (#69958)   via llvm-commits
• [llvm] [AggressiveInstCombine] Ignore debug instructions when load combining (PR #70200)   via llvm-commits
• [llvm] [AggressiveInstCombine] Ignore debug instructions when load combining (PR #70200)   via llvm-commits
• [llvm] [AggressiveInstCombine] Ignore debug instructions when load combining (PR #70200)   via llvm-commits
• [llvm] 078ae8c - [Offloading][NFC] Move creation of offloading entries from OpenMP (#70116)   via llvm-commits
• [llvm] [llvm][AArch64][Assembly]: Add FP8FMA assembly and disassembly. (PR #70134)   via llvm-commits
• [llvm] [AMDGPU] ISel for @llvm.amdgcn.cs.chain intrinsic (PR #68186)   via llvm-commits
• [llvm] [ValueTracking] isNonZero sub of ptr2int's with recursive GEP (PR #68680)   via llvm-commits
• [llvm] [ValueTracking] isNonZero sub of ptr2int's with recursive GEP (PR #68680)   via llvm-commits
• [llvm] LoopVectorize: add negative test for lrint, llrint (PR #70211)   via llvm-commits
• [compiler-rt] [HWASan] Prevent same tag for adjacent heap objects (PR #69337)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Fix incorrect ABI when tail call not supported (PR #70215)   via llvm-commits
• [llvm] [llvm][AArch64][Assembly]: Add FP8FMA assembly and disassembly. (PR #70134)   via llvm-commits
• [llvm] [llvm][AArch64][Assembly]: Add FP8FMA assembly and disassembly. (PR #70134)   via llvm-commits
• [llvm] [llvm][AArch64][Assembly]: Add FP8FMA assembly and disassembly. (PR #70134)   via llvm-commits
• [llvm] [llvm][AArch64][Assembly]: Add FP8FMA assembly and disassembly. (PR #70134)   via llvm-commits
• [llvm] [llvm][AArch64][Assembly]: Add FP8FMA assembly and disassembly. (PR #70134)   via llvm-commits
• [llvm] [CodeLayout] Faster basic block reordering, ext-tsp (PR #68617)   via llvm-commits
• [llvm] cc2fbc6 - [CodeLayout] Faster basic block reordering, ext-tsp (#68617)   via llvm-commits
• [llvm] [CodeLayout] Faster basic block reordering, ext-tsp (PR #68617)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Fix incorrect ABI when tail call not supported (PR #70215)   via llvm-commits
• [llvm] [ValueTracking] isNonZero sub of ptr2int's with recursive GEP (PR #68680)   via llvm-commits
• [llvm] [ValueTracking] isNonZero sub of ptr2int's with recursive GEP (PR #68680)   via llvm-commits
• [llvm] 2d292ab - [llvm] Followup fix for "Use XMACROS for MachO platforms" (#70140)   via llvm-commits
• [llvm] [InstCombine] Fold xored one-complemented operand comparisons (PR #69882)   via llvm-commits
• [llvm] e696379 - [RISCV][GISel] Falling back to SDISel for scalable vector type values (#70133)   via llvm-commits
• [llvm] [X86][NFC] Reorder the registers to reduce unnecessary iterations (PR #70222)   via llvm-commits
• [llvm] [X86][NFC] Reorder the registers to reduce unnecessary iterations (PR #70222)   via llvm-commits
• [llvm] aa30018 - SLP/RISCV: add negative test for llrint, increase coverage (#69940)   via llvm-commits
• [llvm] 7dad7ab - Scalarizer: add negative test for lrint, llrint (#70203)   via llvm-commits
• [llvm] [ValueTracking] isNonZero sub of ptr2int's with recursive GEP (PR #68680)   via llvm-commits
• [llvm] 7ce613f - [AMDGPU] Cleanup hasUnwantedEffectsWhenEXECEmpty function (#70206)   via llvm-commits
• [llvm] [ValueTracking] isNonZero sub of ptr2int's with recursive GEP (PR #68680)   via llvm-commits
• [llvm] [RISCV][GISEL] Add legalizer for G_BSWAP (PR #70226)   via llvm-commits
• [llvm] [ValueTracking] isNonZero sub of ptr2int's with recursive GEP (PR #68680)   via llvm-commits
• [llvm] [RISCV][GISEL] Add legalizer for G_BSWAP (PR #70226)   via llvm-commits
• [llvm] [RISCV][GISEL] Add legalizer for G_BSWAP (PR #70226)   via llvm-commits
• [llvm] [RISCV] Add sched model for XiangShan-NanHu (PR #70232)   via llvm-commits
• [llvm] [ValueTracking] isNonZero sub of ptr2int's with recursive GEP (PR #68680)   via llvm-commits
• [llvm] [ValueTracking] isNonZero sub of ptr2int's with recursive GEP (PR #68680)   via llvm-commits
• [llvm] [AMDGPU] New ttracedata intrinsics (PR #70235)   via llvm-commits
• [llvm] [ValueTracking] isNonZero sub of ptr2int's with recursive GEP (PR #68680)   via llvm-commits
• [llvm] 8715600 - [AMDGPU] Set SchedRW = Write64Bit on V_MOV_B64 (#70135)   via llvm-commits
• [llvm] [AMDGPU] New ttracedata intrinsics (PR #70235)   via llvm-commits
• [llvm] [llvm][AArch64][Assembly]: Add FP8FMA assembly and disassembly. (PR #70237)   via llvm-commits
• [llvm] [llvm][AArch64][Assembly]: Add FP8FMA assembly and disassembly. (PR #70237)   via llvm-commits
• [llvm] Bfi precision (PR #66285)   via llvm-commits
• [compiler-rt] Bfi precision (PR #66285)   via llvm-commits
• [llvm] Update stdckdint.h and make it available in pre-C23 modes. (PR #69649)   via llvm-commits
• [compiler-rt] Update stdckdint.h and make it available in pre-C23 modes. (PR #69649)   via llvm-commits
• [lld] Update stdckdint.h and make it available in pre-C23 modes. (PR #69649)   via llvm-commits
• [lld] Update stdckdint.h and make it available in pre-C23 modes. (PR #69649)   via llvm-commits
• [llvm] Update stdckdint.h and make it available in pre-C23 modes. (PR #69649)   via llvm-commits
• [compiler-rt] Update stdckdint.h and make it available in pre-C23 modes. (PR #69649)   via llvm-commits
• [llvm] [llvm][AArch64][Assembly]: Add FP8FMA assembly and disassembly. (PR #70237)   via llvm-commits
• [llvm] 7fde4ff - [Mips][GISel] Fix a couple issues with passing f64 in 32-bit GPRs. (#69131)   via llvm-commits
• [llvm] 4d80e93 - [RISCV] Remove RISCVISD opcodes for LGA, LA_TLS_IE, and LA_TLS_GD. (#70137)   via llvm-commits
• [llvm] [AMDGPU] Accept arbitrary sized sources in CalculateByteProvider (PR #70240)   via llvm-commits
• [llvm] [RISCV] Separate addend from FMA operands to support cascade FMA. NFC. (PR #70241)   via llvm-commits
• [llvm] [AMDGPU] Accept arbitrary sized sources in CalculateByteProvider (PR #70240)   via llvm-commits
• [llvm] [RISCV][GISEL] Add legalizer for G_BSWAP (PR #70226)   via llvm-commits
• [compiler-rt] [scudo] Pass the max number of blocks to popBlocks (PR #70243)   via llvm-commits
• [compiler-rt] [scudo] Pass the max number of blocks to popBlocks (PR #70243)   via llvm-commits
• [llvm] [GISel] Restrict G_BSWAP to multiples of 16 bits. (PR #70245)   via llvm-commits
• [llvm] 0fc8f0b - [CMake] Correctly handle LLVM_ENABLE_RUNTIMES in targets (#69869)   via llvm-commits
• [llvm] Complex range (PR #70244)   via llvm-commits
• [llvm] d32e801 - [RISCV][GISel] Add FP calling convention support (#69138)   via llvm-commits
• [llvm] da27c25 - [LLVM[NFC] Refactor to allow debug_names entries to conatain DIE offset (#69399)   via llvm-commits
• [llvm] da1736e - [RISCV][GISel] Add legalizer support for G_FADD/G_FSUB/G_FMUL/G_FDIV with F/D extensions. (#69804)   via llvm-commits
• [llvm] c2b64df - [RISCV][GISel] Add regbank selection for G_FADD/G_FSUB/G_FMUL/G_FDIV with F/D extensions. (#69805)   via llvm-commits
• [llvm] [OpenMP] Pass min/max thread and team count to the OMPIRBuilder (PR #70247)   via llvm-commits
• [llvm] 0a8f54c - [X86][GlobalISel] Add legalization of 64-bit G_ICMP for i686 (#69478)   via llvm-commits
• [llvm] 716c022 - [RISCV][GISel] Add instruction selection for G_FADD/G_FSUB/G_FMUL/G_FDIV with F/D extensions. (#69808)   via llvm-commits
• [llvm] [VPlan] Introduce ComputeReductionResult VPInstruction opcode. (PR #70253)   via llvm-commits
• [llvm] [AMDGPU] Fix gcc -Wparentheses warning. NFC (PR #70239)   via llvm-commits
• [llvm] [PowerPC] Add an alias for -mregnames so that full register names used in assembly. (PR #70255)   via llvm-commits
• [llvm] [AMDGPU] GCNRegPressure printing pass for testing. (PR #70031)   via llvm-commits
• [llvm] [OpenMP][NFC] Add min/max threads/teams count into the KernelEnvironment (PR #70257)   via llvm-commits
• [llvm] [PowerPC] Add an alias for -mregnames so that full register names used in assembly. (PR #70255)   via llvm-commits
• [lld] [libc++][ranges] Implement ranges::contains_subrange (PR #66963)   via llvm-commits
• [llvm] [libc++][ranges] Implement ranges::contains_subrange (PR #66963)   via llvm-commits
• [compiler-rt] [libc++][ranges] Implement ranges::contains_subrange (PR #66963)   via llvm-commits
• [llvm] [MLIR] Add SyclRuntimeWrapper (PR #69648)   via llvm-commits
• [llvm] [AMDGPU] Shrink to SOPK with 32-bit signed literals (PR #70263)   via llvm-commits
• [llvm] [X86] Treat all data under large code model as large (PR #70265)   via llvm-commits
• [llvm] [RISCV] SiFive7 VLDS Sched should not depend on VL when stride is x0. (PR #70266)   via llvm-commits
• [llvm] [AArch64] Implement INIT/ADJUST_TRAMPOLINE (PR #70267)   via llvm-commits
• [llvm] [AArch64] Implement INIT/ADJUST_TRAMPOLINE (PR #70267)   via llvm-commits
• [llvm] c9ca2fe - [AMDGPU] Fix gcc -Wparentheses warning. NFC (#70239)   via llvm-commits
• [llvm] [AMDGPU] Use alloca address space in rewrite-out-arguments.ll (PR #70269)   via llvm-commits
• [llvm] Reland [dsymutil] Add support for mergeable libraries (PR #70256)   via llvm-commits
• [llvm] 109aa58 - [RISCV] Add an experimental pseudoinstruction to represent a rematerializable constant materialization sequence. (#69983)   via llvm-commits
• [llvm] [LV] Pre-committing tests for changing loop interleaving count computation (PR #70272)   via llvm-commits
• [compiler-rt] [scudo] Pass the max number of blocks to popBlocks (PR #70243)   via llvm-commits
• [llvm] [OpenMP] Unify the min/max thread/teams pathways (PR #70273)   via llvm-commits
• [llvm] [AMDGPU] Prevent folding of the negative i32 literals as i64 (PR #70274)   via llvm-commits
• [llvm] [AArch64][ABI] Pass v8f32 on the stack (PR #69729)   via llvm-commits
• [llvm] 44193a0 - [TableGen][NFC] Format CompressInstEmitter (#68564)   via llvm-commits
• [llvm] [AMDGPU] Cleanup hasUnwantedEffectsWhenEXECEmpty function (PR #70206)   via llvm-commits
• [llvm] [AMDGPU] Improve isBasicBlockPrologue helper function (PR #69924)   via llvm-commits
• [llvm] [NFC]Rename collectPGOFuncNameStrings to collectGlobalVariableNameStrings (PR #70287)   via llvm-commits
• [llvm] [RISCV][GISel] Rename XLenVT sXLen to be consistent with other LLTs. (PR #70288)   via llvm-commits
• [llvm] [RISCV][GISel] Rename XLenVT sXLen to be consistent with other LLTs. (PR #70288)   via llvm-commits
• [llvm] [AMDGPU] Correct assert that incorrectly chained multiple == operators. (PR #70291)   via llvm-commits
• [llvm] 9c3c0e3 - [RISCV] Separate addend from FMA operands to support cascade FMA. NFC. (#70241)   via llvm-commits
• [llvm] [AggressiveInstCombine] Ignore debug instructions when load combining (PR #70200)   via llvm-commits
• [llvm] 926173c - [AArch64] Prevent argument promotion of vector with size > 128 bits (#70034)   via llvm-commits
• [llvm] [RISCV] Add processor definition for XiangShan-NanHu (PR #70294)   via llvm-commits
• [lld] a6d509f - [Support] Better error msg when cache dir can't be created. (#69575)   via llvm-commits
• [llvm] c285b7f - [RISCV] Add tests for vmadd for VP intrinsics. NFC (#70042)   via llvm-commits
• [llvm] 4602802 - [AMDGPU] Shrink to SOPK with 32-bit signed literals (#70263)   via llvm-commits
• [llvm] [AggressiveInstCombine] Ignore debug instructions when load combining (PR #70200)   via llvm-commits
• [llvm] 18775a4 - [AArch64][SVE2] Use rshrnb for masked stores (#70026)   via llvm-commits
• [llvm] a1260b5 - [AMDGPU] Use `S_CSELECT` for uniform i1 ext (#69703)   via llvm-commits
• [lld] e58c4c7 - [LLD] [COFF] Recognize Itanium vtables for ICF (#70196)   via llvm-commits
• [llvm] [AggressiveInstCombine] Ignore debug instructions when load combining (PR #70200)   via llvm-commits
• [llvm] [AggressiveInstCombine] Ignore debug instructions when load combining (PR #70200)   via llvm-commits
• [llvm] [AArch64] Clarify that Anyext is OK for MOPS instructions. NFC (PR #70298)   via llvm-commits
• [llvm] 4f131b0 - [IR] Require index width to be ule pointer width (#70015)   via llvm-commits
• [llvm] [AArch64] Clarify that Anyext is OK for MOPS instructions. NFC (PR #70298)   via llvm-commits
• [llvm] [AArch64] Sink vscale calls into loops for better isel (PR #70304)   via llvm-commits
• [llvm] [InstCombine] Fold (a != 0) ? abs(a) : 0 (PR #70305)   via llvm-commits
• [llvm] [AArch64] Sink vscale calls into loops for better isel (PR #70304)   via llvm-commits
• [llvm] [RFC][RISCV] Support the large code model. (PR #70308)   via llvm-commits
• [llvm] [InstCombine] Drop exact flag instead of increasing demanded bits (PR #70311)   via llvm-commits
• [llvm] ba3d6e0 - [AMDGPU] Rematerialize scalar loads (#68778)   via llvm-commits
• [compiler-rt] [RISCV][sanitizer] Fix sanitizer support for different virtual memory layout (PR #66743)   via llvm-commits
• [llvm] [SimplifyCFG] Delete the unnecessary range check for small mask operation (PR #65835)   via llvm-commits
• [llvm] 925f462 - [SimplifyCFG] Precommit tests for PR65835   via llvm-commits
• [llvm] 5e07481 - [SimplifyCFG] Delete the unnecessary range check for small mask operation   via llvm-commits
• [llvm] [SimplifyCFG] Delete the unnecessary range check for small mask operation (PR #65835)   via llvm-commits
• [llvm] [AMDGPU] Cleanup hasUnwantedEffectsWhenEXECEmpty function (PR #70206)   via llvm-commits
• [llvm] b47ff36 - [InstCombine] Drop exact flag instead of increasing demanded bits (#70311)   via llvm-commits
• [llvm] [RISCV][GISEL] Add legalizer for G_BSWAP (PR #70226)   via llvm-commits
• [llvm] [SimplifyCFG] Delete the unnecessary range check for small mask operation (PR #65835)   via llvm-commits
• [llvm] Revert "[SimplifyCFG] Delete the unnecessary range check for small mask operation (PR #70324)   via llvm-commits
• [llvm] Revert "[SimplifyCFG] Delete the unnecessary range check for small mask operation (PR #70324)   via llvm-commits
• [llvm] 851338b - Revert "[SimplifyCFG] Delete the unnecessary range check for small mask operation (#70324)   via llvm-commits
• [llvm] Revert "[SimplifyCFG] Delete the unnecessary range check for small mask operation (PR #70324)   via llvm-commits
• [llvm] Revert "[SimplifyCFG] Delete the unnecessary range check for small mask operation (PR #70324)   via llvm-commits
• [llvm] [AMDGPU] Cleanup hasUnwantedEffectsWhenEXECEmpty function (PR #70206)   via llvm-commits
• [llvm] fabcadf - Let M68kMCCodeEmitter set Scratch size. (#69898)   via llvm-commits
• [llvm] Let M68kMCCodeEmitter set Scratch size. (PR #69898)   via llvm-commits
• [llvm] 2e85123 - [VP] Check if VP ops with functional intrinsics are speculatable (#69504)   via llvm-commits
• [llvm] [llvm][AArch64][Assembly]: Add FP8 instructions assembly and disassembly. (PR #69632)   via llvm-commits
• [llvm] [llvm][AArch64][Assembly]: Add FP8FMA assembly and disassembly. (PR #70237)   via llvm-commits
• [llvm] [llvm][AArch64][Assembly]: Add FDOT2/FDOT4 assembly and disassembly. (PR #70237)   via llvm-commits
• [llvm] [llvm][AArch64][Assembly]: Add FDOT2/FDOT4 assembly and disassembly. (PR #70237)   via llvm-commits
• [llvm] [CodeGen] Add a helper class to reuse `expandMBB`. NFC. (PR #70325)   via llvm-commits
• [llvm] [CodeGen] Add a helper class to reuse `expandMBB`. NFC. (PR #70325)   via llvm-commits
• [llvm] [AArch64][ABI] Pass v8f32 on the stack (PR #69729)   via llvm-commits
• [llvm] [AMDGPU] Assert that we can find subregs in copyPhysReg. NFC. (PR #70332)   via llvm-commits
• [llvm] [AMDGPU] Give some of the VI V_PK_* instructions a subtarget predicate. (PR #70334)   via llvm-commits
• [llvm] [InstCombine] Simplify and/or of icmp eq with op replacement (PR #70335)   via llvm-commits
• [llvm] f118d47 - [AMDGPU] Use alloca address space in rewrite-out-arguments.ll (#70269)   via llvm-commits
• [llvm] [XCOFF] make related SD symbols as isFunction (PR #69553)   via llvm-commits
• [llvm] [XCOFF] make related SD symbols as isFunction (PR #69553)   via llvm-commits
• [llvm] [XCOFF] make related SD symbols as isFunction (PR #69553)   via llvm-commits
• [llvm] [XCOFF] make related SD symbols as isFunction (PR #69553)   via llvm-commits
• [llvm] [InstCombine] Simplify and/or of icmp eq with op replacement (PR #70335)   via llvm-commits
• [llvm] [XCOFF] make related SD symbols as isFunction (PR #69553)   via llvm-commits
• [llvm] [XCOFF] make related SD symbols as isFunction (PR #69553)   via llvm-commits
• [llvm] 4afe550 - [Security Group] add github names of security group members. (#69304)   via llvm-commits
• [llvm] 7caff73 - [AMDGPU] Assert that we can find subregs in copyPhysReg. NFC. (#70332)   via llvm-commits
• [llvm] Fix comment in wasm unreachable test (PR #70340)   via llvm-commits
• [llvm] 35baff8 - [AMDGPU] Correct assert that incorrectly chained multiple == operators. (#70291)   via llvm-commits
• [llvm] [RISCV] Begin moving post-isel vector peepholes to a MF pass (PR #70342)   via llvm-commits
• [llvm] [LLVM][AArch64][Assembly]: Add FAMINMAX assembly/disasse… (PR #70115)   via llvm-commits
• [llvm] 78941e1 - [llvm][AArch64][Assembly]: Add FP8 instructions assembly and disassembly. (#69632)   via llvm-commits
• [llvm] [llvm][AArch64][Assembly]: Add FP8 instructions assembly and disassembly. (PR #69632)   via llvm-commits
• [llvm] [CMake] Correctly handle LLVM_ENABLE_RUNTIMES in targets (PR #69869)   via llvm-commits
• [llvm] [AMDGPU] Improve isBasicBlockPrologue helper function (PR #69924)   via llvm-commits
• [llvm] [llvm][AArch64][Assembly]: Add FDOT2/FDOT4 assembly and disassembly. (PR #70237)   via llvm-commits
• [llvm] [llvm][AArch64][Assembly]: Add FDOT2/FDOT4 assembly and disassembly. (PR #70237)   via llvm-commits
• [llvm] [llvm][AArch64][Assembly]: Add FDOT2/FDOT4 assembly and disassembly. (PR #70237)   via llvm-commits
• [llvm] [LLVM][AArch64][Assembly]: Add FAMINMAX assembly/disasse… (PR #70115)   via llvm-commits
• [llvm] Reapply inline spiller subranges (PR #70194)   via llvm-commits
• [llvm] Improvements to RS4GC BDV Algorithm (PR #69795)   via llvm-commits
• [llvm] Improvements to RS4GC BDV Algorithm (PR #69795)   via llvm-commits
• [llvm] Improvements to RS4GC BDV Algorithm (PR #69795)   via llvm-commits
• [llvm] [AMDGPU] Implement moveToVALU for S_CSELECT_B64 (PR #70352)   via llvm-commits
• [llvm] [PassBuilder] Add a mechanism for adding passbuilder callbacks for static builds (PR #70171)   via llvm-commits
• [llvm] [LLVM][AArch64][Assembly]: Add FAMINMAX assembly/disasse… (PR #70115)   via llvm-commits
• [llvm] bf92eba - Fix comment in wasm unreachable test (#70340)   via llvm-commits
• [llvm] 9365994 - [AArch64][GlobalISel] Add support for pre-indexed loads/stores. (#70185)   via llvm-commits
• [llvm] [RISCV] Add experimental support for making i32 a legal type on RV64 in SelectionDAG. (PR #70357)   via llvm-commits
• [llvm] [AArch64] Disable by default MachineSink sink-and-fold (PR #70101)   via llvm-commits
• [lld] [lld/ELF] Place large executable sections at the end (PR #70358)   via llvm-commits
• [llvm] 88d00a6 - Reland [dsymutil] Add support for mergeable libraries (#70256)   via llvm-commits
• [llvm] [SCEV] Infer loop max trip count from memory accesses (PR #70361)   via llvm-commits
• [llvm] fceb719 - clarify NaN propagation in fptrunc (#68554)   via llvm-commits
• [llvm] [SVE2.1][Clang][LLVM]Add BFloat16 builtin in Clang and LLVM intrinisc (PR #70362)   via llvm-commits
• [llvm] [SVE2.1][Clang][LLVM]Add BFloat16 builtin in Clang and LLVM intrinisc (PR #70362)   via llvm-commits
• [llvm] [SCEV] Infer loop max trip count from memory accesses (PR #70361)   via llvm-commits
• [llvm] [Github] Fix libc docs build (PR #70363)   via llvm-commits
• [llvm] [Github] Fix libc docs build (PR #70363)   via llvm-commits
• [lld] Fix build failure of lld/ELF/OutputSections.cpp (PR #70368)   via llvm-commits
• [llvm] [Github] Fix libc docs build (PR #70363)   via llvm-commits
• [llvm] b13e9ef - Update llvm/docs/MyFirstTypoFix.rst for post-Phabricator / Pull-requests world (#70310)   via llvm-commits
• [compiler-rt] [Profile] Refactor profile correlation. (PR #69656)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Add support for extending indexed loads. (PR #70373)   via llvm-commits
• [llvm] [TOSA] Add TosaToMLProgram conversion (PR #69787)   via llvm-commits
• [llvm] [TOSA] Add TosaToMLProgram conversion (PR #69787)   via llvm-commits
• [llvm] [AMDGPU] Set Size to 4 for V_MOV_B64_PSEUDO and S_MOV_B64_IMM_PSEUDO (PR #70376)   via llvm-commits
• [llvm] c9e8b73 - [AArch64][GlobalISel] Add support for extending indexed loads. (#70373)   via llvm-commits
• [llvm] [X86] Print 'l' section flag for SHF_X86_64_LARGE (PR #70380)   via llvm-commits
• [compiler-rt] [libc++] Implement ranges::iota (PR #68494)   via llvm-commits
• [compiler-rt] [scudo] Pass the max number of blocks to popBlocks (PR #70243)   via llvm-commits
• [compiler-rt] [scudo] Pass the max number of blocks to popBlocks (PR #70243)   via llvm-commits
• [compiler-rt] [scudo] Enable "Delayed release to OS" feature for Android (PR #65942)   via llvm-commits
• [llvm] 0ba57c8 - [OpenMP] Pass min/max thread and team count to the OMPIRBuilder (#70247)   via llvm-commits
• [llvm] [RISCV] Implement cross basic block VXRM write insertion. (PR #70382)   via llvm-commits
• [llvm] c2a1249 - [OpenMP][NFC] Add min/max threads/teams count into the KernelEnvironment (#70257)   via llvm-commits
• [llvm] a1e9777 - [NFC] In InstrProf, generalize helper functions to take 'GlobalObject'. They currently take 'Functions' as function parameters or have 'Func' in the name. (#70287)   via llvm-commits
• [llvm] [OpenMP] Associate the KernelEnvironment with the GenericKernelTy (PR #70383)   via llvm-commits
• [compiler-rt] 4e8d6c4 - [scudo] Pass the max number of blocks to popBlocks (#70243)   via llvm-commits
• [compiler-rt] [scudo] Pass the max number of blocks to popBlocks (PR #70243)   via llvm-commits
• [llvm] f74f213 - Always use pthread_rwlock on Apple platforms (#70151)   via llvm-commits
• [llvm] Always use pthread_rwlock on Apple platforms (PR #70151)   via llvm-commits
• [llvm] 56b99f0 - [RISCV][GISel] Rename XLenVT sXLen to be consistent with other LLTs. (#70288)   via llvm-commits
• [compiler-rt] [HWASAN] Enable memcpy, memmove and memset interceptors (PR #70387)   via llvm-commits
• [llvm] [RISCV] Use RISCVInstrInfo::movImm to implement most of RISCVPostRAExpandPseudo::expandMovImm (PR #70389)   via llvm-commits
• [compiler-rt] [scudo] Store more blocks in each TransferBatch (PR #70390)   via llvm-commits
• [compiler-rt] [scudo] Store more blocks in each TransferBatch (PR #70390)   via llvm-commits
• [compiler-rt] [scudo] Store more blocks in each TransferBatch (PR #70390)   via llvm-commits
• [llvm] [bolt] Add cmake c,cxx,asm,linker flags (PR #68358)   via llvm-commits
• [llvm] [bolt] Add cmake c,cxx,asm,linker flags (PR #68358)   via llvm-commits
• [llvm] [AMDGPU] Select 64-bit moves (PR #70395)   via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   via llvm-commits
• [llvm] [AMDGPU] Select 64-bit moves (PR #70395)   via llvm-commits
• [llvm] [CodeLayout] Changed option names cds to cdsort (PR #69668)   via llvm-commits
• [llvm] [AA][ScopedNoAliasAA] Returns ModRef when an alias exists (PR #70159)   via llvm-commits
• [llvm] [AA][ScopedNoAliasAA] Returns ModRef when an alias exists (PR #70159)   via llvm-commits
• [llvm] [CodeLayout] Changed option names cds to cdsort (PR #69668)   via llvm-commits
• [llvm] f61179f - [CodeLayout] Changed option names cds to cdsort (#69668)   via llvm-commits
• [llvm] [CodeLayout] Changed option names cds to cdsort (PR #69668)   via llvm-commits
• [llvm] 1ab44d5 - [DominanceFrontier] make iterating dereferenced DominanceFrontierBase::find deterministic (#69711)   via llvm-commits
• [llvm] [DominanceFrontier] make iterating dereferenced DominanceFrontierBase::find deterministic (PR #69711)   via llvm-commits
• [llvm] [NewPM][CodeGen] Add NPM support to llc (PR #69879)   via llvm-commits
• [llvm] [NewPM][CodeGen] Add NPM support to llc (PR #69879)   via llvm-commits
• [llvm] [OpenMP] Introduce the KernelLaunchEnvironment as implicit argument (PR #70401)   via llvm-commits
• [llvm] 56cadac - [Workflow] Expand code-format-helper.py error reporting (#69686)   via llvm-commits
• [llvm] [NFC][DominanceFrontier] Replace std::map with DenseMap for DomSetMapType (PR #70403)   via llvm-commits
• [llvm] [X86][EVEX512] Restrict attaching EVEX512 for default CPU only, NFCI (PR #65920)   via llvm-commits
• [llvm] [NewPM][CodeGen] Add NPM support to llc (PR #69879)   via llvm-commits
• [llvm] [NewPM][CodeGen] Add NPM support to llc (PR #69879)   via llvm-commits
• [llvm] 6ca5b81 - [llvm] Add myself as codeowner for TextAPI (#70399)   via llvm-commits
• [llvm] [NewPM][CodeGen] Add NPM support to llc (PR #69879)   via llvm-commits
• [llvm] [VP][RISCV] Add llvm.experimental.vp.reverse. (PR #70405)   via llvm-commits
• [compiler-rt] [Fuzzer] Enable custom libc++ for Android (PR #70407)   via llvm-commits
• [llvm] [VP][RISCV] Add llvm.experimental.vp.reverse. (PR #70405)   via llvm-commits
• [llvm] [RISCV] Fix incorrect use of Zfa fli instruction for negative minimum value. (PR #70411)   via llvm-commits
• [llvm] [BOLT] Modify MCPlus annotation internals. NFCI. (PR #70412)   via llvm-commits
• [llvm] [BOLT] Use direct storage for Label annotations. NFCI. (PR #70147)   via llvm-commits
• [llvm] [libc++] Fix complexity guarantee in std::clamp (PR #68413)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Add support for extending indexed loads. (PR #70373)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Add support for extending indexed loads. (PR #70373)   via llvm-commits
• [llvm] [RISCV] Add `TuneVentanaVeyron` subtarget feature. (PR #70414)   via llvm-commits
• [llvm] Port Swift's merge function pass to llvm: merging functions that differ in constants (PR #68235)   via llvm-commits
• [llvm] [RISCV] Correct copyPhysReg for GPRPF64. (PR #70419)   via llvm-commits
• [llvm] [RISCV] Add `TuneVentanaVeyron` subtarget feature. (PR #70414)   via llvm-commits
• [llvm] [X86][EVEX512] Do not allow 512-bit memcpy without EVEX512 (PR #70420)   via llvm-commits
• [llvm] 116eb32 - [RISCV] Correct copyPhysReg for GPRPF64. (#70419)   via llvm-commits
• [llvm] 58d4fe2 - [X86][EVEX512] Do not allow 512-bit memcpy without EVEX512 (#70420)   via llvm-commits
• [llvm] [RISCV][NFC] consolidate simple conditional statements (PR #70423)   via llvm-commits
• [llvm] [RISCV][NFC] consolidate simple conditional statements (PR #70423)   via llvm-commits
• [llvm] [Clang][LoongArch] Support builtin functions for LSX and LASX (PR #70404)   via llvm-commits
• [compiler-rt] [test][compiler-rt] Mark several tests as UNSUPPORTED on LoongArch (PR #69699)   via llvm-commits
• [compiler-rt] 75b0a99 - [test][compiler-rt] Mark several tests as UNSUPPORTED on LoongArch (#69699)   via llvm-commits
• [compiler-rt] [test][compiler-rt] Mark several tests as UNSUPPORTED on LoongArch (PR #69699)   via llvm-commits
• [llvm] [Clang][LoongArch] Support builtin functions for LSX and LASX (PR #69313)   via llvm-commits
• [llvm] [Clang][LoongArch] Support builtin functions for LSX and LASX (PR #69313)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Add support for extending indexed loads. (PR #70373)   via llvm-commits
• [lld] [LLD] [COFF] Handle undefined weak symbols in LTO (PR #70430)   via llvm-commits
• [llvm] [libc++] Implement ranges::iota (PR #68494)   via llvm-commits
• [compiler-rt] [libc++] Implement ranges::iota (PR #68494)   via llvm-commits
• [llvm] f0899ed - [AMDGPU] Give some of the VI V_PK_* instructions a subtarget predicate. (#70334)   via llvm-commits
• [llvm] b23426e - [LLVM][AArch64][Assembly]: Add FAMINMAX assembly/disasse… (#70115)   via llvm-commits
• [llvm] [LLVM][AArch64][Assembly]: Add FAMINMAX assembly/disasse… (PR #70115)   via llvm-commits
• [llvm] c8e1fbc - [RISCV] Keep same SEW/LMUL ratio if possible in forward transfer (#69788)   via llvm-commits
• [llvm] [NewPM][CodeGen] Add NPM support to llc (PR #69879)   via llvm-commits
• [llvm] 9bcb30d - [CodeGen] Improve ExpandMemCmp for more efficient non-register aligned sizes handling (#69942)   via llvm-commits
• [llvm] [Vectorize] Vectorization for __builtin_prefetch (PR #66160)   via llvm-commits
• [llvm] f9cd789 - [AMDGPU] Add pseudo instructions for SGPR spill to VGPR (#69923)   via llvm-commits
• [llvm] [AArch64][PAC] Refactor aarch64-ptrauth pass for better extensibility (PR #70446)   via llvm-commits
• [lld] [LLD][ELF] Change default flags for NOBITS sections with no inputs (PR #70447)   via llvm-commits
• [llvm] [AMDGPU] Fix legalization of frem(-0.0, y) (PR #70448)   via llvm-commits
• [llvm] [AMDGPU] Fix legalization of frem(-0.0, y) (PR #70448)   via llvm-commits
• [llvm] [NewPM][CodeGen] Add NPM support to llc (PR #69879)   via llvm-commits
• [llvm] [AMDGPU] Fix subtarget predicates for some V_MFMA instructions. (PR #70450)   via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   via llvm-commits
• [llvm] [VPlan] Add initial anlysis to infer scalar type of VPValues. (PR #69013)   via llvm-commits
• [llvm] 4fc1e7d - [InstSimplify] Fold (a != 0) ? abs(a) : 0 (#70305)   via llvm-commits
• [llvm] [SelectionDAG] Update for scalable MemoryType in MMO (PR #70452)   via llvm-commits
• [compiler-rt] [clang]set invalid for lambda which missing capture `this` (PR #70432)   via llvm-commits
• [llvm] [clang]set invalid for lambda which missing capture `this` (PR #70432)   via llvm-commits
• [lld] [clang]set invalid for lambda which missing capture `this` (PR #70432)   via llvm-commits
• [llvm] [SelectionDAG] Update for scalable MemoryType in MMO (PR #70452)   via llvm-commits
• [llvm] b0b8864 - [VPlan] Add initial anlysis to infer scalar type of VPValues. (#69013)   via llvm-commits
• [llvm] a0eb6b8 - [AMDGPU] Try to fix the block prologs broken by RA inserted instructions (#69924)   via llvm-commits
• [llvm] [libc++] Implement ranges::iota (PR #68494)   via llvm-commits
• [compiler-rt] [libc++] Implement ranges::iota (PR #68494)   via llvm-commits
• [llvm] [ASAN] For Asan instrumented global, emit two symbols, one with actual size and other with instrumented size. (PR #70166)   via llvm-commits
• [llvm] [ValueTracking] isNonEqual Pointers with with a recursive GEP (PR #70459)   via llvm-commits
• [llvm] [ValueTracking] isNonEqual Pointers with with a recursive GEP (PR #70459)   via llvm-commits
• [llvm] [ValueTracking] isNonZero sub of ptr2int's with recursive GEP (PR #68680)   via llvm-commits
• [compiler-rt] [clang]set invalid for lambda which missing capture `this` (PR #70432)   via llvm-commits
• [llvm] [ValueTracking] isNonEqual Pointers with with a recursive GEP (PR #70459)   via llvm-commits
• [llvm] [Security Group] add github names of security group members. (PR #69304)   via llvm-commits
• [llvm] [XCOFF] make related SD symbols as isFunction (PR #69553)   via llvm-commits
• [llvm] [XCOFF] make related SD symbols as isFunction (PR #69553)   via llvm-commits
• [llvm] [XCOFF] make related SD symbols as isFunction (PR #69553)   via llvm-commits
• [llvm] [InstCombine] Simplify and/or of icmp eq with op replacement (PR #70335)   via llvm-commits
• [llvm] [InstCombine] Simplify and/or of icmp eq with op replacement (PR #70335)   via llvm-commits
• [llvm] [XCOFF] make related SD symbols as isFunction (PR #69553)   via llvm-commits
• [llvm] [IR] Add zext nneg flag (PR #67982)   via llvm-commits
• [llvm] [libc][bazel] Prevent LIBC_NAMESPACE leakeage (PR #70455)   via llvm-commits
• [llvm] 7c90be2 - [SVE] Fix incorrect offset calculation when rewriting an instruction's frame index. (#70315)   via llvm-commits
• [llvm] [InstCombine] Add combines/simplifications for `llvm.ptrmask` (PR #67166)   via llvm-commits
• [llvm] b00c8b9 - [PassTimingInfo] Handle nested timers in passes (#70165)   via llvm-commits
• [llvm] [CodeGen] Improve ExpandMemCmp for more efficient non-register aligned sizes handling (PR #70469)   via llvm-commits
• [llvm] [LAA] Add a test case to show incorrect dependency classification (NFC). (PR #70473)   via llvm-commits
• [llvm] [AArch64][SVE2.1] Add intrinsics for quadword loads/stores with unscaled offset (PR #70474)   via llvm-commits
• [llvm] [AMDGPU] CodeGen for 64-bit buffer atomic cmpswap intrinsics (PR #70475)   via llvm-commits
• [llvm] [InstCombine] Add combines/simplifications for `llvm.ptrmask` (PR #67166)   via llvm-commits
• [llvm] [AArch64] Add SVE2.1 intrinsics for indexed quadword gather loads and scatter stores (PR #70476)   via llvm-commits
• [llvm] [InstCombine] Add combines/simplifications for `llvm.ptrmask` (PR #67166)   via llvm-commits
• [llvm] [AArch64] Add SVE2.1 intrinsics for indexed quadword gather loads and scatter stores (PR #70476)   via llvm-commits
• [llvm] Changed default value of slp-max-vf to 192 (PR #70479)   via llvm-commits
• [llvm] 4c43c1e - [RISCV][GISEL] Add legalizer for G_BSWAP (#70226)   via llvm-commits
• [llvm] [ASAN] For Asan instrumented global, emit two symbols, one with actual size and other with instrumented size. (PR #70166)   via llvm-commits
• [llvm] Changed default value of slp-max-vf to 192 (PR #70479)   via llvm-commits
• [llvm] 3e6d6f2 - [AMDGPU] Set Size to 4 for V_MOV_B64_PSEUDO and S_MOV_B64_IMM_PSEUDO (#70376)   via llvm-commits
• [llvm] [AMDGPU] make w32i16/w32f16 legal (PR #70484)   via llvm-commits
• [lld] [OpenMP] Improve omp offload profiler (PR #68016)   via llvm-commits
• [llvm] [AMDGPU] make w32i16/w32f16 legal (PR #70484)   via llvm-commits
• [llvm] [XCOFF] make related SD symbols as isFunction (PR #69553)   via llvm-commits
• [llvm] [InstCombine] Add combines/simplifications for `llvm.ptrmask` (PR #67166)   via llvm-commits
• [llvm] [libc++] Fixed uniform_real_distribution.h where it was allowing initialization with non floating point types (PR #70485)   via llvm-commits
• [llvm] [libc++] Fixed uniform_real_distribution.h where it was allowing initialization with non floating point types (PR #70485)   via llvm-commits
• [llvm] [libc++] Fixed uniform_real_distribution.h where it was allowing initialization with non floating point types (PR #70485)   via llvm-commits
• [llvm] [libc++] Fixed uniform_real_distribution.h where it was allowing initialization with non floating point types (PR #70485)   via llvm-commits
• [llvm] [libc++] Fixed uniform_real_distribution.h where it was allowing initialization with non floating point types (PR #70485)   via llvm-commits
• [llvm] [RISCV] Separate FPR and VR copyPhysReg implementation. (PR #70492)   via llvm-commits
• [llvm] [libc] Adding a version of memset with software prefetching (PR #70493)   via llvm-commits
• [llvm] [RISCV] Add copyPhysRegVector to extract common vector code out of copyPhysRegVector. (PR #70497)   via llvm-commits
• [llvm] [RISCV] Add copyPhysRegVector to extract common vector code out of copyPhysRegVector. (PR #70497)   via llvm-commits
• [llvm] 124613c - [RISCV] Separate FPR and VR copyPhysReg implementation. (#70492)   via llvm-commits
• [llvm] [CodeLayout] Pre-process execution counts before layout (PR #70501)   via llvm-commits
• [llvm] [CodeLayout] Pre-process execution counts before layout (PR #70501)   via llvm-commits
• [llvm] [CodeLayout] Pre-process execution counts before layout (PR #70501)   via llvm-commits
• [llvm] c18e78c - [RISCV] Add copyPhysRegVector to extract common vector code out of copyPhysRegVector. (#70497)   via llvm-commits
• [llvm] [CodeLayout] Pre-process execution counts before layout (PR #70501)   via llvm-commits
• [llvm] [RISCV] Reduce the number of parameters to copyPhysRegVector. NFC (PR #70502)   via llvm-commits
• [llvm] [InstCombine] Improve eq/ne by parts to handle ult/ugt equality pattern (PR #69884)   via llvm-commits
• [llvm] [InstCombine] Add combines/simplifications for `llvm.ptrmask` (PR #67166)   via llvm-commits
• [llvm] [InstCombine] Add combines/simplifications for `llvm.ptrmask` (PR #67166)   via llvm-commits
• [llvm] [libc][bazel] Prevent LIBC_NAMESPACE leakeage (PR #70455)   via llvm-commits
• [llvm] [ARM] Fix for undef elements from demanded elements (PR #70504)   via llvm-commits
• [llvm] d136432 - [AMDGPU] Remove unneeded implicit-def from shrink-i32-kimm.mir. NFC. (#70489)   via llvm-commits
• [llvm] 8363996 - [RISCV] Reduce the number of parameters to copyPhysRegVector. NFC (#70502)   via llvm-commits
• [compiler-rt] [libc++] Implement ranges::iota (PR #68494)   via llvm-commits
• [llvm] [XCOFF] make related SD symbols as isFunction (PR #69553)   via llvm-commits
• [llvm] [XCOFF] make related SD symbols as isFunction (PR #69553)   via llvm-commits
• [llvm] [XCOFF] make related SD symbols as isFunction (PR #69553)   via llvm-commits
• [llvm] [NFC] Extract LoopConstrainer from IRCE to reuse it outside the pass (PR #70508)   via llvm-commits
• [llvm] [do not submit] testing baseline (PR #68441)   via llvm-commits
• [llvm] y (PR #70512)   via llvm-commits
• [llvm] [LLVM][DWARF] Add support for monolithic types in .debug_names (PR #70515)   via llvm-commits
• [compiler-rt] [Fuzzer] Enable custom libc++ for Android (PR #70407)   via llvm-commits
• [compiler-rt] [tsan] Increase size of shadow mappings for C/C++ on linux/x86_64 (PR #70517)   via llvm-commits
• [llvm] 8ceb72f - [AMDGPU] make v32i16/v32f16 legal (#70484)   via llvm-commits
• [llvm] [llvm][AArch64][Assembly]: Add FP8FMA assembly and disassembly. (PR #70134)   via llvm-commits
• [llvm] [InstCombine] Add folds for (icmp eq/ne (and (add/sub/xor A, P2), P2), 0/P2) (PR #67836)   via llvm-commits
• [llvm] [InstCombine] Add combines/simplifications for `llvm.ptrmask` (PR #67166)   via llvm-commits
• [llvm] [MemProf] Handle profiles with missing column numbers (PR #70520)   via llvm-commits
• [llvm] [SCEV] Fix incorrect NUW inference (PR #70521)   via llvm-commits
• [llvm] [InstCombine] Add combines/simplifications for `llvm.ptrmask` (PR #67166)   via llvm-commits
• [llvm] [RISCV] Teach copyPhysReg to allow copies between GPR<->FPR32/FPR64 when the GPR is the same size. (PR #70525)   via llvm-commits
• [llvm] [RISCV][GISel] Add a special case to selectCopy for FPR32<->GPR on RV64. (PR #70526)   via llvm-commits
• [llvm] Use Log2_64_Ceil to compute PowerOf2Ceil (PR #67580)   via llvm-commits
• [llvm] Use Log2_64_Ceil to compute PowerOf2Ceil (PR #67580)   via llvm-commits
• [llvm] Use Log2_64_Ceil to compute PowerOf2Ceil (PR #67580)   via llvm-commits
• [llvm] Use Log2_64_Ceil to compute PowerOf2Ceil (PR #67580)   via llvm-commits
• [llvm] Use Log2_64_Ceil to compute PowerOf2Ceil (PR #67580)   via llvm-commits
• [llvm] [Github] Add OpenMP docs to Github docs action (PR #70529)   via llvm-commits
• [llvm] [Github] Add flang docs to Github actions (PR #70530)   via llvm-commits
• [llvm] [Github] Add Polly docs to Github actions (PR #70531)   via llvm-commits
• [llvm] [InstCombine] Add combines/simplifications for `llvm.ptrmask` (PR #67166)   via llvm-commits
• [llvm] Use Log2_64_Ceil to compute PowerOf2Ceil (PR #67580)   via llvm-commits
• [llvm] f70e39e - [BasicBlockSections] Apply path cloning with -basic-block-sections. (#68860)   via llvm-commits
• [llvm] fix: asan support aarch64be (PR #70536)   via llvm-commits
• [llvm] fix: asan support aarch64be (PR #70536)   via llvm-commits
• [llvm] Reland [SimplifyCFG] Delete the unnecessary range check for small mask operation (PR #70542)   via llvm-commits
• [llvm] Reland [SimplifyCFG] Delete the unnecessary range check for small mask operation (PR #70542)   via llvm-commits
• [llvm] [LoopDist] Update the pragma info of loop distribute, NFC (PR #69825)   via llvm-commits
• [llvm] [SimplifyCFG] Reland transform for redirecting phis between unmergeable BB and SuccBB (PR #68473)   via llvm-commits
• [llvm] [SimplifyCFG] Reland transform for redirecting phis between unmergeable BB and SuccBB (PR #68473)   via llvm-commits
• [llvm] [SimplifyCFG] Reland transform for redirecting phis between unmergeable BB and SuccBB (PR #68473)   via llvm-commits
• [llvm] fc6bdb8 - [SimplifyCFG] Reland transform for redirecting phis between unmergeable BB and SuccBB (#68473)   via llvm-commits
• [llvm] [SimplifyCFG] Reland transform for redirecting phis between unmergeable BB and SuccBB (PR #68473)   via llvm-commits
• [llvm] 4f6757c - [JITLink][RISCV] Implement eh_frame handling (#68253)   via llvm-commits
• [llvm] 46cb7e4 - [LoopDist] Update the pragma info of loop distribute, NFC (#69825)   via llvm-commits
• [llvm] [LoopDist] Update the pragma info of loop distribute, NFC (PR #69825)   via llvm-commits
• [llvm] [RISCV] RISC-V split register allocation and move vsetvl pass in between (PR #70549)   via llvm-commits
• [llvm] [RISCV] RISC-V split register allocation and move vsetvl pass in between (PR #70549)   via llvm-commits
• [llvm] [XCOFF] make related SD symbols as isFunction (PR #69553)   via llvm-commits
• [llvm] [XCOFF] make related SD symbols as isFunction (PR #69553)   via llvm-commits
• [llvm] [XCOFF] make related SD symbols as isFunction (PR #69553)   via llvm-commits
• [llvm] [ConstraintElim] Add missing check to make sure the bound is loop-invariant (PR #70555)   via llvm-commits
• [llvm] [AArch64] Enable "sink-and-fold" in MachineSink by default (PR #67432)   via llvm-commits
• [llvm] [InstCombine] Add folds for (icmp eq/ne (and (add/sub/xor A, P2), P2), 0/P2) (PR #67836)   via llvm-commits
• [llvm] b1554fe - [Linker] Do not keep a private member of a non-prevailing comdat group (#69143)   via llvm-commits
• [llvm] [libc++][hardening] Rework macros for enabling the hardening mode. (PR #70575)   via llvm-commits
• [llvm] [libc++][hardening] Rework macros for enabling the hardening mode. (PR #70575)   via llvm-commits
• [llvm] [MemCpyOpt] Combine alias metadatas when replacing byval arguments (PR #70580)   via llvm-commits
• [llvm] [MemCpyOpt] Combine alias metadatas when replacing byval arguments (PR #70580)   via llvm-commits
• [llvm] [MemCpyOpt] Combine alias metadatas when replacing byval arguments (PR #70580)   via llvm-commits
• [llvm] [MemCpyOpt] Combine alias metadatas when replacing byval arguments (PR #70580)   via llvm-commits
• [llvm] 0c4f326 - [MemCpyOpt] Combine alias metadatas when replacing byval arguments (#70580)   via llvm-commits
• [llvm] [MemCpyOpt] Combine alias metadatas when replacing byval arguments (PR #70580)   via llvm-commits
• [llvm] e605fba - fix: asan support aarch64be (#70536)   via llvm-commits
• [llvm] [InstCombine] Canonicalise SextADD + GEP (PR #69581)   via llvm-commits
• [llvm] [InstCombine] Canonicalise SextADD + GEP (PR #69581)   via llvm-commits
• [llvm] [InstCombine] Canonicalise SextADD + GEP (PR #69581)   via llvm-commits
• [llvm] [InstCombine] Canonicalise SextADD + GEP (PR #69581)   via llvm-commits
• [llvm] [InstCombine] Canonicalise SextADD + GEP (PR #69581)   via llvm-commits
• [llvm] [InstCombine] Canonicalise SextADD + GEP (PR #69581)   via llvm-commits
• [llvm] [InstCombine] Canonicalise SextADD + GEP (PR #69581)   via llvm-commits
• [llvm] [InstCombine] Canonicalise SextADD + GEP (PR #69581)   via llvm-commits
• [llvm] [InstCombine] Canonicalise SextADD + GEP (PR #69581)   via llvm-commits
• [llvm] Fix #35272: Don't replace typedefs in extern c scope (PR #69102)   via llvm-commits
• [llvm] [X86] Avoid returning the same shuffle operation for broadcast (PR #70592)   via llvm-commits
• [llvm] Fix #68492: point to the correct const location (PR #69103)   via llvm-commits
• [llvm] b5281af - [X86] Avoid returning the same shuffle operation for broadcast (#70592)   via llvm-commits
• [llvm] d346c82 - [OpenMP] Associate the KernelEnvironment with the GenericKernelTy (#70383)   via llvm-commits
• [llvm] [llvm][NewGVN] Fixing the replacement of incorrect instructions (PR #70599)   via llvm-commits
• [llvm] [llvm][NewGVN] Fixing the replacement of incorrect instructions (PR #70599)   via llvm-commits
• [llvm] [llvm][NewGVN] Fixing the replacement of incorrect instructions (PR #70599)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Fix incorrect ABI when tail call not supported (PR #70215)   via llvm-commits
• [llvm] [InferAddressSpaces] collect flat address expression from return value (PR #70610)   via llvm-commits
• [llvm] [InstCombine] optimize powi(X,Y) * X with Ofast (PR #69998)   via llvm-commits
• [llvm] dbeaee6 - [NFC][DominanceFrontier] Replace std::map with DenseMap for DomSetMapType (#70403)   via llvm-commits
• [llvm] [NFC][DominanceFrontier] Replace std::map with DenseMap for DomSetMapType (PR #70403)   via llvm-commits
• [llvm] [llvm][MC] Fix missing SubArch information when calling lookupTarget (PR #69902)   via llvm-commits
• [llvm] [InstCombine] Canonicalise SextADD + GEP (PR #69581)   via llvm-commits
• [llvm] [InstCombine] Canonicalise SextADD + GEP (PR #69581)   via llvm-commits
• [llvm] [InstCombine] Canonicalise SextADD + GEP (PR #69581)   via llvm-commits
• [llvm] [InstCombine] Canonicalise SextADD + GEP (PR #69581)   via llvm-commits
• [llvm] [InstCombine] Canonicalise SextADD + GEP (PR #69581)   via llvm-commits
• [llvm] [InstCombine] Canonicalise SextADD + GEP (PR #69581)   via llvm-commits
• [llvm] [mlir][Interfaces][NFC] Move `SubsetInsertionOpInterface` to `mlir/Interfaces` (PR #70615)   via llvm-commits
• [llvm] [mlir][Interfaces] Add `SubsetOpInterface` and `SubsetExtractionOpInterface` (PR #70617)   via llvm-commits
• [llvm] [AMDGPU] Move WWM register pre-allocation to during regalloc (PR #70618)   via llvm-commits
• [llvm] [mlir][Transforms] Add loop-invariant subset hoisting pass (PR #70619)   via llvm-commits
• [llvm] [RISCV][NFC] Combine redundant 'if' statements (PR #70423)   via llvm-commits
• [llvm] [RISCV][NFC] Combine redundant 'if' statements (PR #70423)   via llvm-commits
• [llvm] [AMDGPU/VOP3P][NFC] - Simplify wmma instruction defs (PR #70622)   via llvm-commits
• [llvm] [RISCV][NFC] Combine redundant 'if' statements (PR #70423)   via llvm-commits
• [llvm] [mlir][Interfaces] Loop-invariant subset hoisting: Improve bypass analysis (PR #70623)   via llvm-commits
• [llvm] [RISCV][GISel] Add support for G_FCMP with F and D extensions. (PR #70624)   via llvm-commits
• [llvm] [AMDGPU] Add option to pre-allocate SGPR spill VGPRs (PR #70626)   via llvm-commits
• [llvm] [mlir][Interfaces] LISH: Add helpers for hyperrectangular subsets (PR #70628)   via llvm-commits
• [llvm] [RISCV][NFC] Combine redundant 'if' statements (PR #70423)   via llvm-commits
• [llvm] [RISCV][NFC] Combine redundant 'if' statements (PR #70423)   via llvm-commits
• [llvm] [RISCV][NFC] Combine redundant 'if' statements (PR #70423)   via llvm-commits
• [llvm] [mlir][vector] LISH: Implement `SubsetOpInterface` for transfer_read/write (PR #70629)   via llvm-commits
• [llvm] [RISCV][NFC] Combine redundant 'if' statements (PR #70423)   via llvm-commits
• [llvm] [mlir][transform] LISH: Add transform op (PR #70630)   via llvm-commits